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iio: adc: meson-saradc: improve meson_sar_adc_read_raw_sample

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After sampling there should always be only one value in the FIFO.
This also applies to averaging mode as the averaging is done
chip-internally. So we don't have to loop and let the driver
complain if there's not exactly one value in the FIFO.

If the value belongs to a different channel then don't silently
swallow the value but complain.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Heiner Kallweit 2017-02-15 20:31:55 +01:00 committed by Jonathan Cameron
parent 3af109131b
commit 6a882a2cbe
1 changed files with 17 additions and 19 deletions
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36
drivers/iio/adc/meson_saradc.c
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@ -278,33 +278,31 @@ static int meson_sar_adc_read_raw_sample(struct iio_dev *indio_dev,
int *val) int *val)
{ {
struct meson_sar_adc_priv *priv = iio_priv(indio_dev); struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
int regval, fifo_chan, fifo_val, sum = 0, count = 0; int regval, fifo_chan, fifo_val, count;
if(!wait_for_completion_timeout(&priv->done, if(!wait_for_completion_timeout(&priv->done,
msecs_to_jiffies(MESON_SAR_ADC_TIMEOUT))) msecs_to_jiffies(MESON_SAR_ADC_TIMEOUT)))
return -ETIMEDOUT; return -ETIMEDOUT;
while (meson_sar_adc_get_fifo_count(indio_dev) > 0 && count = meson_sar_adc_get_fifo_count(indio_dev);
count < MESON_SAR_ADC_MAX_FIFO_SIZE) { if (count != 1) {
regmap_read(priv->regmap, MESON_SAR_ADC_FIFO_RD, &regval); dev_err(&indio_dev->dev,
"ADC FIFO has %d element(s) instead of one\n", count);
fifo_chan = FIELD_GET(MESON_SAR_ADC_FIFO_RD_CHAN_ID_MASK, return -EINVAL;
regval);
if (fifo_chan != chan->channel)
continue;
fifo_val = FIELD_GET(MESON_SAR_ADC_FIFO_RD_SAMPLE_VALUE_MASK,
regval);
fifo_val &= (BIT(priv->data->resolution) - 1);
sum += fifo_val;
count++;
} }
if (!count) regmap_read(priv->regmap, MESON_SAR_ADC_FIFO_RD, &regval);
return -ENOENT; fifo_chan = FIELD_GET(MESON_SAR_ADC_FIFO_RD_CHAN_ID_MASK, regval);
if (fifo_chan != chan->channel) {
dev_err(&indio_dev->dev,
"ADC FIFO entry belongs to channel %d instead of %d\n",
fifo_chan, chan->channel);
return -EINVAL;
}
*val = sum / count; fifo_val = FIELD_GET(MESON_SAR_ADC_FIFO_RD_SAMPLE_VALUE_MASK, regval);
fifo_val &= GENMASK(priv->data->resolution - 1, 0);
*val = fifo_val;
return 0; return 0;
} }