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ARM: u300: fix timekeeping when periodic mode is used
To determine the value to write to the hardware's timer counter register the symbol CLOCK_TICK_RATE is used. This value is a dummy value on u300 though. So instead use the clock rate that is used for oneshot mode. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -184,11 +184,13 @@
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#define U300_TIMER_APP_CRC (0x100)
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#define U300_TIMER_APP_CRC_CLOCK_REQUEST_ENABLE (0x00000001)
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#define TICKS_PER_JIFFY ((CLOCK_TICK_RATE + (HZ/2)) / HZ)
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#define US_PER_TICK ((1000000 + (HZ/2)) / HZ)
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static void __iomem *u300_timer_base;
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struct u300_clockevent_data {
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struct clock_event_device cevd;
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unsigned ticks_per_jiffy;
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};
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/*
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* The u300_set_mode() function is always called first, if we
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* have oneshot timer active, the oneshot scheduling function
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@ -197,6 +199,9 @@ static void __iomem *u300_timer_base;
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static void u300_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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{
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struct u300_clockevent_data *cevdata =
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container_of(evt, struct u300_clockevent_data, cevd);
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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/* Disable interrupts on GPT1 */
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@ -209,7 +214,7 @@ static void u300_set_mode(enum clock_event_mode mode,
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* Set the periodic mode to a certain number of ticks per
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* jiffy.
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*/
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writel(TICKS_PER_JIFFY,
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writel(cevdata->ticks_per_jiffy,
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u300_timer_base + U300_TIMER_APP_GPT1TC);
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/*
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* Set continuous mode, so the timer keeps triggering
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@ -305,20 +310,23 @@ static int u300_set_next_event(unsigned long cycles,
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return 0;
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}
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/* Use general purpose timer 1 as clock event */
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static struct clock_event_device clockevent_u300_1mhz = {
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.name = "GPT1",
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.rating = 300, /* Reasonably fast and accurate clock event */
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.set_next_event = u300_set_next_event,
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.set_mode = u300_set_mode,
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static struct u300_clockevent_data u300_clockevent_data = {
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/* Use general purpose timer 1 as clock event */
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.cevd = {
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.name = "GPT1",
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/* Reasonably fast and accurate clock event */
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.rating = 300,
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.features = CLOCK_EVT_FEAT_PERIODIC |
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CLOCK_EVT_FEAT_ONESHOT,
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.set_next_event = u300_set_next_event,
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.set_mode = u300_set_mode,
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},
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};
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/* Clock event timer interrupt handler */
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static irqreturn_t u300_timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evt = &clockevent_u300_1mhz;
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struct clock_event_device *evt = &u300_clockevent_data.cevd;
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/* ACK/Clear timer IRQ for the APP GPT1 Timer */
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writel(U300_TIMER_APP_GPT1IA_IRQ_ACK,
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@ -379,6 +387,8 @@ static void __init u300_timer_init_of(struct device_node *np)
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clk_prepare_enable(clk);
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rate = clk_get_rate(clk);
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u300_clockevent_data.ticks_per_jiffy = DIV_ROUND_CLOSEST(rate, HZ);
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setup_sched_clock(u300_read_sched_clock, 32, rate);
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u300_delay_timer.read_current_timer = &u300_read_current_timer;
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@ -428,7 +438,7 @@ static void __init u300_timer_init_of(struct device_node *np)
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pr_err("timer: failed to initialize U300 clock source\n");
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/* Configure and register the clockevent */
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clockevents_config_and_register(&clockevent_u300_1mhz, rate,
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clockevents_config_and_register(&u300_clockevent_data.cevd, rate,
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1, 0xffffffff);
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/*
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