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mxc_udc: add workaround for ENGcm09152 for i.MX35
this patch gives the possibility to workaround bug ENGcm09152 on i.MX35 when the hardware workaround is also implemented on the board. It covers the workaround described on page 25 of the following Errata : http://cache.freescale.com/files/dsp/doc/errata/IMX35CE.pdf Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -155,6 +155,7 @@ static struct mxc_usbh_platform_data usbh1_pdata = {
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static struct fsl_usb2_platform_data otg_device_pdata = {
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.operating_mode = FSL_USB2_DR_DEVICE,
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.phy_mode = FSL_USB2_PHY_UTMI,
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.workaround = FLS_USB2_WORKAROUND_ENGCM09152,
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};
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static int otg_mode_host;
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@ -22,6 +22,10 @@
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static struct clk *mxc_ahb_clk;
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static struct clk *mxc_usb_clk;
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/* workaround ENGcm09152 for i.MX35 */
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#define USBPHYCTRL_OTGBASE_OFFSET 0x608
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#define USBPHYCTRL_EVDO (1 << 23)
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int fsl_udc_clk_init(struct platform_device *pdev)
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{
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struct fsl_usb2_platform_data *pdata;
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@ -84,6 +88,17 @@ eenahb:
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void fsl_udc_clk_finalize(struct platform_device *pdev)
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{
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struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
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#if defined(CONFIG_ARCH_MX35)
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unsigned int v;
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/* workaround ENGcm09152 for i.MX35 */
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if (pdata->workaround & FLS_USB2_WORKAROUND_ENGCM09152) {
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v = readl(MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR +
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USBPHYCTRL_OTGBASE_OFFSET));
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writel(v | USBPHYCTRL_EVDO, MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR +
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USBPHYCTRL_OTGBASE_OFFSET));
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}
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#endif
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/* ULPI transceivers don't need usbpll */
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if (pdata->phy_mode == FSL_USB2_PHY_ULPI) {
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@ -66,6 +66,7 @@ struct fsl_usb2_platform_data {
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enum fsl_usb2_operating_modes operating_mode;
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enum fsl_usb2_phy_modes phy_mode;
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unsigned int port_enables;
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unsigned int workaround;
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int (*init)(struct platform_device *);
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void (*exit)(struct platform_device *);
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@ -84,6 +85,8 @@ struct fsl_usb2_platform_data {
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#define FSL_USB2_PORT0_ENABLED 0x00000001
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#define FSL_USB2_PORT1_ENABLED 0x00000002
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#define FLS_USB2_WORKAROUND_ENGCM09152 (1 << 0)
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struct spi_device;
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struct fsl_spi_platform_data {
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