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drm/amdgpu: remove duplicate amdgpu_fence_process implementation
Looks like that somehow got missed while during porting the radeon changes. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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@ -294,65 +294,8 @@ static void amdgpu_fence_check_lockup(struct work_struct *work)
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*/
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void amdgpu_fence_process(struct amdgpu_ring *ring)
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{
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uint64_t seq, last_seq, last_emitted;
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unsigned count_loop = 0;
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bool wake = false;
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unsigned long irqflags;
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/* Note there is a scenario here for an infinite loop but it's
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* very unlikely to happen. For it to happen, the current polling
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* process need to be interrupted by another process and another
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* process needs to update the last_seq btw the atomic read and
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* xchg of the current process.
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*
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* More over for this to go in infinite loop there need to be
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* continuously new fence signaled ie amdgpu_fence_read needs
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* to return a different value each time for both the currently
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* polling process and the other process that xchg the last_seq
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* btw atomic read and xchg of the current process. And the
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* value the other process set as last seq must be higher than
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* the seq value we just read. Which means that current process
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* need to be interrupted after amdgpu_fence_read and before
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* atomic xchg.
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*
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* To be even more safe we count the number of time we loop and
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* we bail after 10 loop just accepting the fact that we might
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* have temporarly set the last_seq not to the true real last
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* seq but to an older one.
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*/
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spin_lock_irqsave(&ring->fence_lock, irqflags);
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last_seq = atomic64_read(&ring->fence_drv.last_seq);
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do {
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last_emitted = ring->fence_drv.sync_seq[ring->idx];
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seq = amdgpu_fence_read(ring);
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seq |= last_seq & 0xffffffff00000000LL;
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if (seq < last_seq) {
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seq &= 0xffffffff;
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seq |= last_emitted & 0xffffffff00000000LL;
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}
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if (seq <= last_seq || seq > last_emitted) {
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break;
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}
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/* If we loop over we don't want to return without
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* checking if a fence is signaled as it means that the
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* seq we just read is different from the previous on.
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*/
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wake = true;
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last_seq = seq;
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if ((count_loop++) > 10) {
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/* We looped over too many time leave with the
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* fact that we might have set an older fence
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* seq then the current real last seq as signaled
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* by the hw.
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*/
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break;
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}
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} while (atomic64_xchg(&ring->fence_drv.last_seq, seq) > seq);
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if (wake)
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if (amdgpu_fence_activity(ring))
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wake_up_all(&ring->fence_drv.fence_queue);
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spin_unlock_irqrestore(&ring->fence_lock, irqflags);
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}
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/**
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