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iwlwifi: op_mode holds its pointer to the transport
Instead of using the shared area that we be killed. Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com>
This commit is contained in:
parent
9130bab137
commit
68e8dfdadb
@ -60,13 +60,13 @@ static void iwl1000_set_ct_threshold(struct iwl_priv *priv)
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static void iwl1000_nic_config(struct iwl_priv *priv)
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{
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/* set CSR_HW_CONFIG_REG for uCode use */
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iwl_set_bit(trans(priv), CSR_HW_IF_CONFIG_REG,
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iwl_set_bit(priv->trans, CSR_HW_IF_CONFIG_REG,
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CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
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CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
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/* Setting digital SVR for 1000 card to 1.32V */
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/* locking is acquired in iwl_set_bits_mask_prph() function */
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iwl_set_bits_mask_prph(trans(priv), APMG_DIGITAL_SVR_REG,
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iwl_set_bits_mask_prph(priv->trans, APMG_DIGITAL_SVR_REG,
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APMG_SVR_DIGITAL_VOLTAGE_1_32,
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~APMG_SVR_VOLTAGE_CONFIG_BIT_MSK);
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}
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@ -222,7 +222,7 @@ static void iwl2000_nic_config(struct iwl_priv *priv)
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{
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iwl_rf_config(priv);
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iwl_set_bit(trans(priv), CSR_GP_DRIVER_REG,
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iwl_set_bit(priv->trans, CSR_GP_DRIVER_REG,
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CSR_GP_DRIVER_REG_BIT_RADIO_IQ_INVER);
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}
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@ -318,7 +318,7 @@ static void iwl5000_nic_config(struct iwl_priv *priv)
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* (PCIe power is lost before PERST# is asserted),
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* causing ME FW to lose ownership and not being able to obtain it back.
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*/
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iwl_set_bits_mask_prph(trans(priv), APMG_PS_CTRL_REG,
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iwl_set_bits_mask_prph(priv->trans, APMG_PS_CTRL_REG,
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APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,
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~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);
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}
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@ -580,21 +580,21 @@ static void iwl6000_nic_config(struct iwl_priv *priv)
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break;
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case IWL_DEVICE_FAMILY_6000i:
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/* 2x2 IPA phy type */
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iwl_write32(trans(priv), CSR_GP_DRIVER_REG,
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iwl_write32(priv->trans, CSR_GP_DRIVER_REG,
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CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_IPA);
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break;
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case IWL_DEVICE_FAMILY_6050:
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/* Indicate calibration version to uCode. */
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if (iwl_eeprom_calib_version(priv) >= 6)
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iwl_set_bit(trans(priv), CSR_GP_DRIVER_REG,
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iwl_set_bit(priv->trans, CSR_GP_DRIVER_REG,
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CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6);
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break;
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case IWL_DEVICE_FAMILY_6150:
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/* Indicate calibration version to uCode. */
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if (iwl_eeprom_calib_version(priv) >= 6)
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iwl_set_bit(trans(priv), CSR_GP_DRIVER_REG,
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iwl_set_bit(priv->trans, CSR_GP_DRIVER_REG,
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CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6);
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iwl_set_bit(trans(priv), CSR_GP_DRIVER_REG,
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iwl_set_bit(priv->trans, CSR_GP_DRIVER_REG,
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CSR_GP_DRIVER_REG_BIT_6050_1x2);
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break;
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default:
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@ -189,7 +189,7 @@ void iwlagn_dev_txfifo_flush(struct iwl_priv *priv, u16 flush_control)
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goto done;
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}
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IWL_DEBUG_INFO(priv, "wait transmit/flush all frames\n");
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iwl_trans_wait_tx_queue_empty(trans(priv));
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iwl_trans_wait_tx_queue_empty(priv->trans);
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done:
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ieee80211_wake_queues(priv->hw);
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mutex_unlock(&priv->mutex);
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@ -1132,7 +1132,7 @@ int iwlagn_suspend(struct iwl_priv *priv, struct cfg80211_wowlan *wowlan)
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memcpy(&rxon, &ctx->active, sizeof(rxon));
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priv->ucode_loaded = false;
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iwl_trans_stop_device(trans(priv));
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iwl_trans_stop_device(priv->trans);
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priv->wowlan = true;
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@ -1260,7 +1260,7 @@ int iwl_dvm_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
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return -EIO;
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}
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return iwl_trans_send_cmd(trans(priv), cmd);
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return iwl_trans_send_cmd(priv->trans, cmd);
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}
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int iwl_dvm_send_cmd_pdu(struct iwl_priv *priv, u8 id,
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@ -604,16 +604,16 @@ static int iwlagn_rx_card_state_notif(struct iwl_priv *priv,
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if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
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CT_CARD_DISABLED)) {
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iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_SET,
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iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_SET,
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CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
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iwl_write_direct32(trans(priv), HBUS_TARG_MBX_C,
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iwl_write_direct32(priv->trans, HBUS_TARG_MBX_C,
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HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
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if (!(flags & RXON_CARD_DISABLED)) {
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iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_CLR,
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iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_CLR,
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CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
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iwl_write_direct32(trans(priv), HBUS_TARG_MBX_C,
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iwl_write_direct32(priv->trans, HBUS_TARG_MBX_C,
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HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
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}
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if (flags & CT_CARD_DISABLED)
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@ -636,7 +636,7 @@ static int iwlagn_rx_card_state_notif(struct iwl_priv *priv,
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wiphy_rfkill_set_hw_state(priv->hw->wiphy,
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test_bit(STATUS_RF_KILL_HW, &priv->status));
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else
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wake_up(&trans(priv)->wait_command_queue);
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wake_up(&priv->trans->wait_command_queue);
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return 0;
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}
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@ -179,19 +179,19 @@ static void iwl_tt_check_exit_ct_kill(unsigned long data)
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if (tt->state == IWL_TI_CT_KILL) {
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if (priv->thermal_throttle.ct_kill_toggle) {
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iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_CLR,
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iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_CLR,
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CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
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priv->thermal_throttle.ct_kill_toggle = false;
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} else {
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iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_SET,
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iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_SET,
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CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
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priv->thermal_throttle.ct_kill_toggle = true;
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}
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iwl_read32(trans(priv), CSR_UCODE_DRV_GP1);
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spin_lock_irqsave(&trans(priv)->reg_lock, flags);
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if (likely(iwl_grab_nic_access(trans(priv))))
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iwl_release_nic_access(trans(priv));
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spin_unlock_irqrestore(&trans(priv)->reg_lock, flags);
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iwl_read32(priv->trans, CSR_UCODE_DRV_GP1);
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spin_lock_irqsave(&priv->trans->reg_lock, flags);
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if (likely(iwl_grab_nic_access(priv->trans)))
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iwl_release_nic_access(priv->trans);
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spin_unlock_irqrestore(&priv->trans->reg_lock, flags);
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/* Reschedule the ct_kill timer to occur in
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* CT_KILL_EXIT_DURATION seconds to ensure we get a
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@ -467,7 +467,7 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
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else
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txq_id = ctx->ac_to_queue[skb_get_queue_mapping(skb)];
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if (iwl_trans_tx(trans(priv), skb, dev_cmd, txq_id))
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if (iwl_trans_tx(priv->trans, skb, dev_cmd, txq_id))
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goto drop_unlock_sta;
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if (ieee80211_is_data_qos(fc) && !ieee80211_is_qos_nullfunc(fc) &&
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@ -581,7 +581,7 @@ turn_off:
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spin_unlock_bh(&priv->sta_lock);
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if (test_bit(txq_id, priv->agg_q_alloc)) {
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iwl_trans_tx_agg_disable(trans(priv), txq_id);
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iwl_trans_tx_agg_disable(priv->trans, txq_id);
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iwlagn_dealloc_agg_txq(priv, txq_id);
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}
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@ -665,7 +665,7 @@ int iwlagn_tx_agg_oper(struct iwl_priv *priv, struct ieee80211_vif *vif,
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fifo = ctx->ac_to_fifo[tid_to_ac[tid]];
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iwl_trans_tx_agg_setup(trans(priv), q, fifo,
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iwl_trans_tx_agg_setup(priv->trans, q, fifo,
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sta_priv->sta_id, tid,
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buf_size, ssn);
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@ -732,7 +732,7 @@ static void iwlagn_check_ratid_empty(struct iwl_priv *priv, int sta_id, u8 tid)
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IWL_DEBUG_TX_QUEUES(priv,
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"Can continue DELBA flow ssn = next_recl ="
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" %d", tid_data->next_reclaimed);
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iwl_trans_tx_agg_disable(trans(priv),
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iwl_trans_tx_agg_disable(priv->trans,
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tid_data->agg.txq_id);
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iwlagn_dealloc_agg_txq(priv, tid_data->agg.txq_id);
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tid_data->agg.state = IWL_AGG_OFF;
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@ -1092,7 +1092,7 @@ static int iwl_reclaim(struct iwl_priv *priv, int sta_id, int tid,
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return 1;
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}
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iwl_trans_reclaim(trans(priv), txq_id, ssn, skbs);
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iwl_trans_reclaim(priv->trans, txq_id, ssn, skbs);
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return 0;
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}
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@ -348,14 +348,14 @@ static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
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ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
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/* Make sure device is powered up for SRAM reads */
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spin_lock_irqsave(&trans(priv)->reg_lock, reg_flags);
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if (unlikely(!iwl_grab_nic_access(trans(priv)))) {
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spin_unlock_irqrestore(&trans(priv)->reg_lock, reg_flags);
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spin_lock_irqsave(&priv->trans->reg_lock, reg_flags);
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if (unlikely(!iwl_grab_nic_access(priv->trans))) {
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spin_unlock_irqrestore(&priv->trans->reg_lock, reg_flags);
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return;
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}
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/* Set starting address; reads will auto-increment */
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iwl_write32(trans(priv), HBUS_TARG_MEM_RADDR, ptr);
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iwl_write32(priv->trans, HBUS_TARG_MEM_RADDR, ptr);
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/*
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* Refuse to read more than would have fit into the log from
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@ -371,20 +371,20 @@ static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
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* place event id # at far right for easier visual parsing.
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*/
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for (i = 0; i < num_events; i++) {
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ev = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);
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time = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);
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ev = iwl_read32(priv->trans, HBUS_TARG_MEM_RDAT);
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time = iwl_read32(priv->trans, HBUS_TARG_MEM_RDAT);
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if (mode == 0) {
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trace_iwlwifi_dev_ucode_cont_event(
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trans(priv)->dev, 0, time, ev);
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priv->trans->dev, 0, time, ev);
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} else {
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data = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);
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data = iwl_read32(priv->trans, HBUS_TARG_MEM_RDAT);
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trace_iwlwifi_dev_ucode_cont_event(
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trans(priv)->dev, time, data, ev);
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priv->trans->dev, time, data, ev);
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}
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}
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/* Allow device to power down */
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iwl_release_nic_access(trans(priv));
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spin_unlock_irqrestore(&trans(priv)->reg_lock, reg_flags);
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iwl_release_nic_access(priv->trans);
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spin_unlock_irqrestore(&priv->trans->reg_lock, reg_flags);
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}
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static void iwl_continuous_event_trace(struct iwl_priv *priv)
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@ -403,8 +403,7 @@ static void iwl_continuous_event_trace(struct iwl_priv *priv)
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base = priv->device_pointers.log_event_table;
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if (iwlagn_hw_valid_rtc_data_addr(base)) {
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iwl_read_targ_mem_words(trans(priv), base, &read, sizeof(read));
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iwl_read_targ_mem_words(priv->trans, base, &read, sizeof(read));
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capacity = read.capacity;
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mode = read.mode;
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num_wraps = read.wrap_counter;
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@ -444,7 +443,7 @@ static void iwl_continuous_event_trace(struct iwl_priv *priv)
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else
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priv->event_log.wraps_once_count++;
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trace_iwlwifi_dev_ucode_wrap_event(trans(priv)->dev,
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trace_iwlwifi_dev_ucode_wrap_event(priv->trans->dev,
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num_wraps - priv->event_log.num_wraps,
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next_entry, priv->event_log.next_entry);
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@ -670,7 +669,7 @@ void iwl_rf_kill_ct_config(struct iwl_priv *priv)
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struct iwl_ct_kill_throttling_config adv_cmd;
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int ret = 0;
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iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_CLR,
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iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_CLR,
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CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
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priv->thermal_throttle.ct_kill_toggle = false;
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@ -949,7 +948,7 @@ void iwl_down(struct iwl_priv *priv)
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ieee80211_stop_queues(priv->hw);
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priv->ucode_loaded = false;
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iwl_trans_stop_device(trans(priv));
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iwl_trans_stop_device(priv->trans);
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/* Clear out all status bits but a few that are stable across reset */
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priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
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@ -1325,7 +1324,7 @@ static int iwl_init_geos(struct iwl_priv *priv)
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priv->hw_params.sku & EEPROM_SKU_CAP_BAND_52GHZ) {
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IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
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"Please send your %s to maintainer.\n",
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trans(priv)->hw_id_str);
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priv->trans->hw_id_str);
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priv->hw_params.sku &= ~EEPROM_SKU_CAP_BAND_52GHZ;
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}
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@ -1441,32 +1440,32 @@ void iwl_set_hw_params(struct iwl_priv *priv)
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void iwl_debug_config(struct iwl_priv *priv)
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{
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dev_printk(KERN_INFO, trans(priv)->dev, "CONFIG_IWLWIFI_DEBUG "
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dev_printk(KERN_INFO, priv->trans->dev, "CONFIG_IWLWIFI_DEBUG "
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#ifdef CONFIG_IWLWIFI_DEBUG
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"enabled\n");
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#else
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"disabled\n");
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#endif
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dev_printk(KERN_INFO, trans(priv)->dev, "CONFIG_IWLWIFI_DEBUGFS "
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dev_printk(KERN_INFO, priv->trans->dev, "CONFIG_IWLWIFI_DEBUGFS "
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#ifdef CONFIG_IWLWIFI_DEBUGFS
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"enabled\n");
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#else
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"disabled\n");
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#endif
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dev_printk(KERN_INFO, trans(priv)->dev, "CONFIG_IWLWIFI_DEVICE_TRACING "
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dev_printk(KERN_INFO, priv->trans->dev, "CONFIG_IWLWIFI_DEVICE_TRACING "
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#ifdef CONFIG_IWLWIFI_DEVICE_TRACING
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"enabled\n");
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#else
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"disabled\n");
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#endif
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dev_printk(KERN_INFO, trans(priv)->dev, "CONFIG_IWLWIFI_DEVICE_TESTMODE "
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dev_printk(KERN_INFO, priv->trans->dev, "CONFIG_IWLWIFI_DEVICE_TESTMODE "
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#ifdef CONFIG_IWLWIFI_DEVICE_TESTMODE
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"enabled\n");
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#else
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"disabled\n");
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#endif
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dev_printk(KERN_INFO, trans(priv)->dev, "CONFIG_IWLWIFI_P2P "
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dev_printk(KERN_INFO, priv->trans->dev, "CONFIG_IWLWIFI_P2P "
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#ifdef CONFIG_IWLWIFI_P2P
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"enabled\n");
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#else
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@ -1509,6 +1508,7 @@ static struct iwl_op_mode *iwl_op_mode_dvm_start(struct iwl_trans *trans,
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op_mode->ops = &iwl_dvm_ops;
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priv = IWL_OP_MODE_GET_DVM(op_mode);
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priv->shrd = trans->shrd;
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priv->trans = trans;
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priv->fw = fw;
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switch (cfg(priv)->device_family) {
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@ -1587,11 +1587,11 @@ static struct iwl_op_mode *iwl_op_mode_dvm_start(struct iwl_trans *trans,
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}
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/* Configure transport layer */
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iwl_trans_configure(trans(priv), &trans_cfg);
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iwl_trans_configure(priv->trans, &trans_cfg);
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/* At this point both hw and priv are allocated. */
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SET_IEEE80211_DEV(priv->hw, trans(priv)->dev);
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SET_IEEE80211_DEV(priv->hw, priv->trans->dev);
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/* show what debugging capabilities we have */
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iwl_debug_config(priv);
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@ -1615,25 +1615,25 @@ static struct iwl_op_mode *iwl_op_mode_dvm_start(struct iwl_trans *trans,
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/* these spin locks will be used in apm_ops.init and EEPROM access
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* we should init now
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*/
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spin_lock_init(&trans(priv)->reg_lock);
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spin_lock_init(&priv->trans->reg_lock);
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spin_lock_init(&priv->statistics.lock);
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/***********************
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* 2. Read REV register
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***********************/
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IWL_INFO(priv, "Detected %s, REV=0x%X\n",
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cfg(priv)->name, trans(priv)->hw_rev);
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||||
cfg(priv)->name, priv->trans->hw_rev);
|
||||
|
||||
if (iwl_trans_start_hw(trans(priv)))
|
||||
if (iwl_trans_start_hw(priv->trans))
|
||||
goto out_free_traffic_mem;
|
||||
|
||||
/* Read the EEPROM */
|
||||
if (iwl_eeprom_init(priv, trans(priv)->hw_rev)) {
|
||||
if (iwl_eeprom_init(priv, priv->trans->hw_rev)) {
|
||||
IWL_ERR(priv, "Unable to init EEPROM\n");
|
||||
goto out_free_traffic_mem;
|
||||
}
|
||||
/* Reset chip to save power until we load uCode during "up". */
|
||||
iwl_trans_stop_hw(trans(priv));
|
||||
iwl_trans_stop_hw(priv->trans);
|
||||
|
||||
if (iwl_eeprom_check_version(priv))
|
||||
goto out_free_eeprom;
|
||||
@ -1676,7 +1676,7 @@ static struct iwl_op_mode *iwl_op_mode_dvm_start(struct iwl_trans *trans,
|
||||
n_q_to_ac = ARRAY_SIZE(iwlagn_bss_queue_to_ac);
|
||||
|
||||
/* Configure transport layer again*/
|
||||
iwl_trans_configure(trans(priv), &trans_cfg);
|
||||
iwl_trans_configure(priv->trans, &trans_cfg);
|
||||
}
|
||||
|
||||
/*******************
|
||||
@ -1768,7 +1768,7 @@ void iwl_op_mode_dvm_stop(struct iwl_op_mode *op_mode)
|
||||
|
||||
/*This will stop the queues, move the device to low power state */
|
||||
priv->ucode_loaded = false;
|
||||
iwl_trans_stop_device(trans(priv));
|
||||
iwl_trans_stop_device(priv->trans);
|
||||
|
||||
iwl_eeprom_free(priv);
|
||||
|
||||
@ -1860,7 +1860,7 @@ static const char *desc_lookup(u32 num)
|
||||
|
||||
static void iwl_dump_nic_error_log(struct iwl_priv *priv)
|
||||
{
|
||||
struct iwl_trans *trans = trans(priv);
|
||||
struct iwl_trans *trans = priv->trans;
|
||||
u32 base;
|
||||
struct iwl_error_event_table table;
|
||||
|
||||
@ -1950,7 +1950,7 @@ static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
|
||||
u32 ev, time, data; /* event log data */
|
||||
unsigned long reg_flags;
|
||||
|
||||
struct iwl_trans *trans = trans(priv);
|
||||
struct iwl_trans *trans = priv->trans;
|
||||
|
||||
if (num_events == 0)
|
||||
return pos;
|
||||
@ -2068,7 +2068,7 @@ int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
|
||||
u32 logsize;
|
||||
int pos = 0;
|
||||
size_t bufsz = 0;
|
||||
struct iwl_trans *trans = trans(priv);
|
||||
struct iwl_trans *trans = priv->trans;
|
||||
|
||||
base = priv->device_pointers.log_event_table;
|
||||
if (priv->cur_ucode == IWL_UCODE_INIT) {
|
||||
@ -2184,7 +2184,7 @@ static void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand)
|
||||
* commands by clearing the ready bit */
|
||||
clear_bit(STATUS_READY, &priv->status);
|
||||
|
||||
wake_up(&trans(priv)->wait_command_queue);
|
||||
wake_up(&priv->trans->wait_command_queue);
|
||||
|
||||
if (!ondemand) {
|
||||
/*
|
||||
|
@ -472,7 +472,7 @@ static inline void iwl_dvm_set_pmi(struct iwl_priv *priv, bool state)
|
||||
set_bit(STATUS_POWER_PMI, &priv->status);
|
||||
else
|
||||
clear_bit(STATUS_POWER_PMI, &priv->status);
|
||||
iwl_trans_set_pmi(trans(priv), state);
|
||||
iwl_trans_set_pmi(priv->trans, state);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_IWLWIFI_DEBUG
|
||||
|
@ -259,7 +259,7 @@ static ssize_t iwl_dbgfs_sram_read(struct file *file,
|
||||
sram = priv->dbgfs_sram_offset & ~0x3;
|
||||
|
||||
/* read the first u32 from sram */
|
||||
val = iwl_read_targ_mem(trans(priv), sram);
|
||||
val = iwl_read_targ_mem(priv->trans, sram);
|
||||
|
||||
for (; len; len--) {
|
||||
/* put the address at the start of every line */
|
||||
@ -278,7 +278,7 @@ static ssize_t iwl_dbgfs_sram_read(struct file *file,
|
||||
if (++offset == 4) {
|
||||
sram += 4;
|
||||
offset = 0;
|
||||
val = iwl_read_targ_mem(trans(priv), sram);
|
||||
val = iwl_read_targ_mem(priv->trans, sram);
|
||||
}
|
||||
|
||||
/* put in extra spaces and split lines for human readability */
|
||||
@ -2071,7 +2071,7 @@ static ssize_t iwl_dbgfs_power_save_status_read(struct file *file,
|
||||
const size_t bufsz = sizeof(buf);
|
||||
u32 pwrsave_status;
|
||||
|
||||
pwrsave_status = iwl_read32(trans(priv), CSR_GP_CNTRL) &
|
||||
pwrsave_status = iwl_read32(priv->trans, CSR_GP_CNTRL) &
|
||||
CSR_GP_REG_POWER_SAVE_STATUS_MSK;
|
||||
|
||||
pos += scnprintf(buf + pos, bufsz - pos, "Power Save Status: ");
|
||||
@ -2594,7 +2594,7 @@ int iwl_dbgfs_register(struct iwl_priv *priv, const char *name)
|
||||
/* Calibrations disabled/enabled status*/
|
||||
DEBUGFS_ADD_FILE(calib_disabled, dir_rf, S_IRUSR);
|
||||
|
||||
if (iwl_trans_dbgfs_register(trans(priv), dir_debug))
|
||||
if (iwl_trans_dbgfs_register(priv->trans, dir_debug))
|
||||
goto err;
|
||||
return 0;
|
||||
|
||||
|
@ -760,6 +760,7 @@ struct iwl_priv {
|
||||
|
||||
/*data shared among all the driver's layers */
|
||||
struct iwl_shared *shrd;
|
||||
struct iwl_trans *trans;
|
||||
const struct iwl_fw *fw;
|
||||
const struct iwl_lib_ops *lib;
|
||||
unsigned long status;
|
||||
|
@ -189,7 +189,7 @@ static void iwl_eeprom_release_semaphore(struct iwl_trans *trans)
|
||||
|
||||
static int iwl_eeprom_verify_signature(struct iwl_priv *priv)
|
||||
{
|
||||
u32 gp = iwl_read32(trans(priv), CSR_EEPROM_GP) &
|
||||
u32 gp = iwl_read32(priv->trans, CSR_EEPROM_GP) &
|
||||
CSR_EEPROM_GP_VALID_MSK;
|
||||
int ret = 0;
|
||||
|
||||
@ -719,14 +719,14 @@ static void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv)
|
||||
int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev)
|
||||
{
|
||||
__le16 *e;
|
||||
u32 gp = iwl_read32(trans(priv), CSR_EEPROM_GP);
|
||||
u32 gp = iwl_read32(priv->trans, CSR_EEPROM_GP);
|
||||
int sz;
|
||||
int ret;
|
||||
u16 addr;
|
||||
u16 validblockaddr = 0;
|
||||
u16 cache_addr = 0;
|
||||
|
||||
priv->nvm_device_type = iwl_get_nvm_type(trans(priv), hw_rev);
|
||||
priv->nvm_device_type = iwl_get_nvm_type(priv->trans, hw_rev);
|
||||
if (priv->nvm_device_type == -ENOENT)
|
||||
return -ENOENT;
|
||||
/* allocate eeprom */
|
||||
@ -747,7 +747,7 @@ int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev)
|
||||
}
|
||||
|
||||
/* Make sure driver (instead of uCode) is allowed to read EEPROM */
|
||||
ret = iwl_eeprom_acquire_semaphore(trans(priv));
|
||||
ret = iwl_eeprom_acquire_semaphore(priv->trans);
|
||||
if (ret < 0) {
|
||||
IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
|
||||
ret = -ENOENT;
|
||||
@ -756,22 +756,22 @@ int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev)
|
||||
|
||||
if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
|
||||
|
||||
ret = iwl_init_otp_access(trans(priv));
|
||||
ret = iwl_init_otp_access(priv->trans);
|
||||
if (ret) {
|
||||
IWL_ERR(priv, "Failed to initialize OTP access.\n");
|
||||
ret = -ENOENT;
|
||||
goto done;
|
||||
}
|
||||
iwl_write32(trans(priv), CSR_EEPROM_GP,
|
||||
iwl_read32(trans(priv), CSR_EEPROM_GP) &
|
||||
iwl_write32(priv->trans, CSR_EEPROM_GP,
|
||||
iwl_read32(priv->trans, CSR_EEPROM_GP) &
|
||||
~CSR_EEPROM_GP_IF_OWNER_MSK);
|
||||
|
||||
iwl_set_bit(trans(priv), CSR_OTP_GP_REG,
|
||||
iwl_set_bit(priv->trans, CSR_OTP_GP_REG,
|
||||
CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
|
||||
CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
|
||||
/* traversing the linked list if no shadow ram supported */
|
||||
if (!cfg(priv)->base_params->shadow_ram_support) {
|
||||
if (iwl_find_otp_image(trans(priv), &validblockaddr)) {
|
||||
if (iwl_find_otp_image(priv->trans, &validblockaddr)) {
|
||||
ret = -ENOENT;
|
||||
goto done;
|
||||
}
|
||||
@ -780,7 +780,7 @@ int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev)
|
||||
addr += sizeof(u16)) {
|
||||
__le16 eeprom_data;
|
||||
|
||||
ret = iwl_read_otp_word(trans(priv), addr,
|
||||
ret = iwl_read_otp_word(priv->trans, addr,
|
||||
&eeprom_data);
|
||||
if (ret)
|
||||
goto done;
|
||||
@ -792,10 +792,10 @@ int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev)
|
||||
for (addr = 0; addr < sz; addr += sizeof(u16)) {
|
||||
u32 r;
|
||||
|
||||
iwl_write32(trans(priv), CSR_EEPROM_REG,
|
||||
iwl_write32(priv->trans, CSR_EEPROM_REG,
|
||||
CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
|
||||
|
||||
ret = iwl_poll_bit(trans(priv), CSR_EEPROM_REG,
|
||||
ret = iwl_poll_bit(priv->trans, CSR_EEPROM_REG,
|
||||
CSR_EEPROM_REG_READ_VALID_MSK,
|
||||
CSR_EEPROM_REG_READ_VALID_MSK,
|
||||
IWL_EEPROM_ACCESS_TIMEOUT);
|
||||
@ -804,7 +804,7 @@ int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev)
|
||||
"Time out reading EEPROM[%d]\n", addr);
|
||||
goto done;
|
||||
}
|
||||
r = iwl_read32(trans(priv), CSR_EEPROM_REG);
|
||||
r = iwl_read32(priv->trans, CSR_EEPROM_REG);
|
||||
e[addr / 2] = cpu_to_le16(r >> 16);
|
||||
}
|
||||
}
|
||||
@ -816,7 +816,7 @@ int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev)
|
||||
|
||||
ret = 0;
|
||||
done:
|
||||
iwl_eeprom_release_semaphore(trans(priv));
|
||||
iwl_eeprom_release_semaphore(priv->trans);
|
||||
|
||||
err:
|
||||
if (ret)
|
||||
@ -1132,7 +1132,7 @@ void iwl_rf_config(struct iwl_priv *priv)
|
||||
|
||||
/* write radio config values to register */
|
||||
if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) <= EEPROM_RF_CONFIG_TYPE_MAX) {
|
||||
iwl_set_bit(trans(priv), CSR_HW_IF_CONFIG_REG,
|
||||
iwl_set_bit(priv->trans, CSR_HW_IF_CONFIG_REG,
|
||||
EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
|
||||
EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
|
||||
EEPROM_RF_CFG_DASH_MSK(radio_cfg));
|
||||
@ -1144,7 +1144,7 @@ void iwl_rf_config(struct iwl_priv *priv)
|
||||
WARN_ON(1);
|
||||
|
||||
/* set CSR_HW_CONFIG_REG for uCode use */
|
||||
iwl_set_bit(trans(priv), CSR_HW_IF_CONFIG_REG,
|
||||
iwl_set_bit(priv->trans, CSR_HW_IF_CONFIG_REG,
|
||||
CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
|
||||
CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
|
||||
}
|
||||
|
@ -71,7 +71,7 @@ static const struct ieee80211_tpt_blink iwl_blink[] = {
|
||||
/* Set led register off */
|
||||
void iwlagn_led_enable(struct iwl_priv *priv)
|
||||
{
|
||||
iwl_write32(trans(priv), CSR_LED_REG, CSR_LED_REG_TRUN_ON);
|
||||
iwl_write32(priv->trans, CSR_LED_REG, CSR_LED_REG_TRUN_ON);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -107,9 +107,9 @@ static int iwl_send_led_cmd(struct iwl_priv *priv, struct iwl_led_cmd *led_cmd)
|
||||
};
|
||||
u32 reg;
|
||||
|
||||
reg = iwl_read32(trans(priv), CSR_LED_REG);
|
||||
reg = iwl_read32(priv->trans, CSR_LED_REG);
|
||||
if (reg != (reg & CSR_LED_BSM_CTRL_MSK))
|
||||
iwl_write32(trans(priv), CSR_LED_REG,
|
||||
iwl_write32(priv->trans, CSR_LED_REG,
|
||||
reg & CSR_LED_BSM_CTRL_MSK);
|
||||
|
||||
return iwl_dvm_send_cmd(priv, &cmd);
|
||||
@ -207,7 +207,7 @@ void iwl_leds_init(struct iwl_priv *priv)
|
||||
break;
|
||||
}
|
||||
|
||||
ret = led_classdev_register(trans(priv)->dev, &priv->led);
|
||||
ret = led_classdev_register(priv->trans->dev, &priv->led);
|
||||
if (ret) {
|
||||
kfree(priv->led.name);
|
||||
return;
|
||||
|
@ -198,8 +198,8 @@ int iwlagn_mac_setup_register(struct iwl_priv *priv,
|
||||
WIPHY_FLAG_IBSS_RSN;
|
||||
|
||||
if (priv->fw->img[IWL_UCODE_WOWLAN].sec[0].len &&
|
||||
trans(priv)->ops->wowlan_suspend &&
|
||||
device_can_wakeup(trans(priv)->dev)) {
|
||||
priv->trans->ops->wowlan_suspend &&
|
||||
device_can_wakeup(priv->trans->dev)) {
|
||||
hw->wiphy->wowlan.flags = WIPHY_WOWLAN_MAGIC_PKT |
|
||||
WIPHY_WOWLAN_DISCONNECT |
|
||||
WIPHY_WOWLAN_EAP_IDENTITY_REQ |
|
||||
@ -237,7 +237,7 @@ int iwlagn_mac_setup_register(struct iwl_priv *priv,
|
||||
priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
|
||||
&priv->bands[IEEE80211_BAND_5GHZ];
|
||||
|
||||
hw->wiphy->hw_version = trans(priv)->hw_id;
|
||||
hw->wiphy->hw_version = priv->trans->hw_id;
|
||||
|
||||
iwl_leds_init(priv);
|
||||
|
||||
@ -356,7 +356,7 @@ void iwlagn_mac_stop(struct ieee80211_hw *hw)
|
||||
* even if interface is down, trans->down will leave the RF
|
||||
* kill interrupt enabled
|
||||
*/
|
||||
iwl_trans_stop_hw(trans(priv));
|
||||
iwl_trans_stop_hw(priv->trans);
|
||||
|
||||
IWL_DEBUG_MAC80211(priv, "leave\n");
|
||||
}
|
||||
@ -412,9 +412,9 @@ int iwlagn_mac_suspend(struct ieee80211_hw *hw, struct cfg80211_wowlan *wowlan)
|
||||
if (ret)
|
||||
goto error;
|
||||
|
||||
device_set_wakeup_enable(trans(priv)->dev, true);
|
||||
device_set_wakeup_enable(priv->trans->dev, true);
|
||||
|
||||
iwl_trans_wowlan_suspend(trans(priv));
|
||||
iwl_trans_wowlan_suspend(priv->trans);
|
||||
|
||||
goto out;
|
||||
|
||||
@ -441,19 +441,19 @@ static int iwlagn_mac_resume(struct ieee80211_hw *hw)
|
||||
IWL_DEBUG_MAC80211(priv, "enter\n");
|
||||
mutex_lock(&priv->mutex);
|
||||
|
||||
iwl_write32(trans(priv), CSR_UCODE_DRV_GP1_CLR,
|
||||
iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_CLR,
|
||||
CSR_UCODE_DRV_GP1_BIT_D3_CFG_COMPLETE);
|
||||
|
||||
base = priv->device_pointers.error_event_table;
|
||||
if (iwlagn_hw_valid_rtc_data_addr(base)) {
|
||||
spin_lock_irqsave(&trans(priv)->reg_lock, flags);
|
||||
ret = iwl_grab_nic_access_silent(trans(priv));
|
||||
spin_lock_irqsave(&priv->trans->reg_lock, flags);
|
||||
ret = iwl_grab_nic_access_silent(priv->trans);
|
||||
if (likely(ret == 0)) {
|
||||
iwl_write32(trans(priv), HBUS_TARG_MEM_RADDR, base);
|
||||
status = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);
|
||||
iwl_release_nic_access(trans(priv));
|
||||
iwl_write32(priv->trans, HBUS_TARG_MEM_RADDR, base);
|
||||
status = iwl_read32(priv->trans, HBUS_TARG_MEM_RDAT);
|
||||
iwl_release_nic_access(priv->trans);
|
||||
}
|
||||
spin_unlock_irqrestore(&trans(priv)->reg_lock, flags);
|
||||
spin_unlock_irqrestore(&priv->trans->reg_lock, flags);
|
||||
|
||||
#ifdef CONFIG_IWLWIFI_DEBUGFS
|
||||
if (ret == 0) {
|
||||
@ -468,7 +468,7 @@ static int iwlagn_mac_resume(struct ieee80211_hw *hw)
|
||||
|
||||
if (priv->wowlan_sram)
|
||||
_iwl_read_targ_mem_words(
|
||||
trans(priv), 0x800000,
|
||||
priv->trans, 0x800000,
|
||||
priv->wowlan_sram,
|
||||
img->sec[IWL_UCODE_SECTION_DATA].len / 4);
|
||||
}
|
||||
@ -480,7 +480,7 @@ static int iwlagn_mac_resume(struct ieee80211_hw *hw)
|
||||
|
||||
priv->wowlan = false;
|
||||
|
||||
device_set_wakeup_enable(trans(priv)->dev, false);
|
||||
device_set_wakeup_enable(priv->trans->dev, false);
|
||||
|
||||
iwlagn_prepare_restart(priv);
|
||||
|
||||
@ -654,7 +654,7 @@ int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
|
||||
ret = iwl_sta_rx_agg_stop(priv, sta, tid);
|
||||
break;
|
||||
case IEEE80211_AMPDU_TX_START:
|
||||
if (!trans(priv)->ops->tx_agg_setup)
|
||||
if (!priv->trans->ops->tx_agg_setup)
|
||||
break;
|
||||
if (iwlagn_mod_params.disable_11n & IWL_DISABLE_HT_TXAGG)
|
||||
break;
|
||||
@ -1006,7 +1006,7 @@ void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop)
|
||||
}
|
||||
}
|
||||
IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
|
||||
iwl_trans_wait_tx_queue_empty(trans(priv));
|
||||
iwl_trans_wait_tx_queue_empty(priv->trans);
|
||||
done:
|
||||
mutex_unlock(&priv->mutex);
|
||||
IWL_DEBUG_MAC80211(priv, "leave\n");
|
||||
|
@ -378,7 +378,7 @@ int iwl_power_update_mode(struct iwl_priv *priv, bool force)
|
||||
/* initialize to default */
|
||||
void iwl_power_initialize(struct iwl_priv *priv)
|
||||
{
|
||||
priv->power_data.bus_pm = trans(priv)->pm_support;
|
||||
priv->power_data.bus_pm = priv->trans->pm_support;
|
||||
|
||||
priv->power_data.debug_sleep_level_override = -1;
|
||||
|
||||
|
@ -218,7 +218,7 @@ static void iwl_trace_cleanup(struct iwl_priv *priv)
|
||||
if (priv->testmode_trace.trace_enabled) {
|
||||
if (priv->testmode_trace.cpu_addr &&
|
||||
priv->testmode_trace.dma_addr)
|
||||
dma_free_coherent(trans(priv)->dev,
|
||||
dma_free_coherent(priv->trans->dev,
|
||||
priv->testmode_trace.total_size,
|
||||
priv->testmode_trace.cpu_addr,
|
||||
priv->testmode_trace.dma_addr);
|
||||
@ -371,7 +371,7 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)
|
||||
|
||||
switch (cmd) {
|
||||
case IWL_TM_CMD_APP2DEV_DIRECT_REG_READ32:
|
||||
val32 = iwl_read_direct32(trans(priv), ofs);
|
||||
val32 = iwl_read_direct32(priv->trans, ofs);
|
||||
IWL_INFO(priv, "32bit value to read 0x%x\n", val32);
|
||||
|
||||
skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, 20);
|
||||
@ -391,7 +391,7 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)
|
||||
} else {
|
||||
val32 = nla_get_u32(tb[IWL_TM_ATTR_REG_VALUE32]);
|
||||
IWL_INFO(priv, "32bit value to write 0x%x\n", val32);
|
||||
iwl_write_direct32(trans(priv), ofs, val32);
|
||||
iwl_write_direct32(priv->trans, ofs, val32);
|
||||
}
|
||||
break;
|
||||
case IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE8:
|
||||
@ -401,7 +401,7 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)
|
||||
} else {
|
||||
val8 = nla_get_u8(tb[IWL_TM_ATTR_REG_VALUE8]);
|
||||
IWL_INFO(priv, "8bit value to write 0x%x\n", val8);
|
||||
iwl_write8(trans(priv), ofs, val8);
|
||||
iwl_write8(priv->trans, ofs, val8);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
@ -464,7 +464,7 @@ cfg_init_calib_error:
|
||||
static int iwl_testmode_driver(struct ieee80211_hw *hw, struct nlattr **tb)
|
||||
{
|
||||
struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);
|
||||
struct iwl_trans *trans = trans(priv);
|
||||
struct iwl_trans *trans = priv->trans;
|
||||
struct sk_buff *skb;
|
||||
unsigned char *rsp_data_ptr = NULL;
|
||||
int status = 0, rsp_data_len = 0;
|
||||
@ -577,7 +577,7 @@ static int iwl_testmode_driver(struct ieee80211_hw *hw, struct nlattr **tb)
|
||||
break;
|
||||
|
||||
case IWL_TM_CMD_APP2DEV_GET_DEVICE_ID:
|
||||
devid = trans(priv)->hw_id;
|
||||
devid = priv->trans->hw_id;
|
||||
IWL_INFO(priv, "hw version: 0x%x\n", devid);
|
||||
|
||||
skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, 20);
|
||||
@ -642,7 +642,7 @@ static int iwl_testmode_trace(struct ieee80211_hw *hw, struct nlattr **tb)
|
||||
struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);
|
||||
struct sk_buff *skb;
|
||||
int status = 0;
|
||||
struct device *dev = trans(priv)->dev;
|
||||
struct device *dev = priv->trans->dev;
|
||||
|
||||
switch (nla_get_u32(tb[IWL_TM_ATTR_COMMAND])) {
|
||||
case IWL_TM_CMD_APP2DEV_BEGIN_TRACE:
|
||||
@ -782,7 +782,7 @@ static int iwl_testmode_ownership(struct ieee80211_hw *hw, struct nlattr **tb)
|
||||
|
||||
static int iwl_testmode_indirect_read(struct iwl_priv *priv, u32 addr, u32 size)
|
||||
{
|
||||
struct iwl_trans *trans = trans(priv);
|
||||
struct iwl_trans *trans = priv->trans;
|
||||
unsigned long flags;
|
||||
int i;
|
||||
|
||||
@ -822,7 +822,7 @@ static int iwl_testmode_indirect_read(struct iwl_priv *priv, u32 addr, u32 size)
|
||||
static int iwl_testmode_indirect_write(struct iwl_priv *priv, u32 addr,
|
||||
u32 size, unsigned char *buf)
|
||||
{
|
||||
struct iwl_trans *trans = trans(priv);
|
||||
struct iwl_trans *trans = priv->trans;
|
||||
u32 val, i;
|
||||
unsigned long flags;
|
||||
|
||||
|
@ -244,7 +244,7 @@ static int iwl_alive_notify(struct iwl_priv *priv)
|
||||
{
|
||||
int ret;
|
||||
|
||||
iwl_trans_fw_alive(trans(priv));
|
||||
iwl_trans_fw_alive(priv->trans);
|
||||
|
||||
priv->passive_no_rx = false;
|
||||
priv->transport_queue_stop = 0;
|
||||
@ -282,9 +282,9 @@ static int iwl_verify_sec_sparse(struct iwl_priv *priv,
|
||||
/* read data comes through single port, auto-incr addr */
|
||||
/* NOTE: Use the debugless read so we don't flood kernel log
|
||||
* if IWL_DL_IO is set */
|
||||
iwl_write_direct32(trans(priv), HBUS_TARG_MEM_RADDR,
|
||||
iwl_write_direct32(priv->trans, HBUS_TARG_MEM_RADDR,
|
||||
i + fw_desc->offset);
|
||||
val = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);
|
||||
val = iwl_read32(priv->trans, HBUS_TARG_MEM_RDAT);
|
||||
if (val != le32_to_cpu(*image))
|
||||
return -EIO;
|
||||
}
|
||||
@ -303,14 +303,14 @@ static void iwl_print_mismatch_sec(struct iwl_priv *priv,
|
||||
|
||||
IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
|
||||
|
||||
iwl_write_direct32(trans(priv), HBUS_TARG_MEM_RADDR,
|
||||
iwl_write_direct32(priv->trans, HBUS_TARG_MEM_RADDR,
|
||||
fw_desc->offset);
|
||||
|
||||
for (offs = 0;
|
||||
offs < len && errors < 20;
|
||||
offs += sizeof(u32), image++) {
|
||||
/* read data comes through single port, auto-incr addr */
|
||||
val = iwl_read32(trans(priv), HBUS_TARG_MEM_RDAT);
|
||||
val = iwl_read32(priv->trans, HBUS_TARG_MEM_RDAT);
|
||||
if (val != le32_to_cpu(*image)) {
|
||||
IWL_ERR(priv, "uCode INST section at "
|
||||
"offset 0x%x, is 0x%x, s/b 0x%x\n",
|
||||
@ -402,7 +402,7 @@ int iwl_load_ucode_wait_alive(struct iwl_priv *priv,
|
||||
alive_cmd, ARRAY_SIZE(alive_cmd),
|
||||
iwl_alive_fn, &alive_data);
|
||||
|
||||
ret = iwl_trans_start_fw(trans(priv), fw);
|
||||
ret = iwl_trans_start_fw(priv->trans, fw);
|
||||
if (ret) {
|
||||
priv->cur_ucode = old_type;
|
||||
iwl_remove_notification(&priv->notif_wait, &alive_wait);
|
||||
@ -526,7 +526,7 @@ int iwl_run_init_ucode(struct iwl_priv *priv)
|
||||
iwl_remove_notification(&priv->notif_wait, &calib_wait);
|
||||
out:
|
||||
/* Whatever happened, stop the device */
|
||||
iwl_trans_stop_device(trans(priv));
|
||||
iwl_trans_stop_device(priv->trans);
|
||||
priv->ucode_loaded = false;
|
||||
|
||||
return ret;
|
||||
|
Loading…
Reference in New Issue
Block a user