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mtd: rawnand: NAND controller write protect

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Allow NAND controller to be responsible for write protect pin
handling during fast path and exec_op destructive operation
when controller_wp flag is set.

Signed-off-by: David Regan <dregan@broadcom.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20231125012438.15191-2-dregan@broadcom.com
This commit is contained in:
David Regan 2023-11-24 17:24:36 -08:00 committed by Miquel Raynal
parent 578dc962ff
commit 68cce21e3c
2 changed files with 6 additions and 0 deletions
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4
drivers/mtd/nand/raw/nand_base.c
View File

@ -366,6 +366,10 @@ static int nand_check_wp(struct nand_chip *chip)
if (chip->options & NAND_BROKEN_XD)
return 0;
/* controller responsible for NAND write protect */
if (chip->controller->controller_wp)
return 0;
/* Check the WP bit */
ret = nand_status_op(chip, &status);
if (ret)

2
include/linux/mtd/rawnand.h
View File

@ -1115,6 +1115,7 @@ struct nand_controller_ops {
* the bus without restarting an entire read operation nor
* changing the column.
* @supported_op.cont_read: The controller supports sequential cache reads.
* @controller_wp: the controller is in charge of handling the WP pin.
*/
struct nand_controller {
struct mutex lock;
@ -1123,6 +1124,7 @@ struct nand_controller {
unsigned int data_only_read: 1;
unsigned int cont_read: 1;
} supported_op;
bool controller_wp;
};
static inline void nand_controller_init(struct nand_controller *nfc)