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MIPS: ralink: mt7620: Add wdt clock definition

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The watchdog driver of the SoC uses the clk API to
get the clock associated with the watchdog device.
However the MT7620 specific setup code does not
register a clock for the watchdog device yet which
leads to the following error:

  rt2880_wdt: probe of 10000120.watchdog failed with error -2

Register a clock device for the watchdog in order to
avoid the error and make the watchdog usable.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5756/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
John Crispin 2013-08-23 08:31:31 +02:00 committed by Ralf Baechle
parent ded1e9d727
commit 68c9b7ed9e
1 changed files with 1 additions and 0 deletions
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arch/mips/ralink/mt7620.c
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@ -316,6 +316,7 @@ void __init ralink_clk_init(void)
ralink_clk_add("cpu", cpu_rate);
ralink_clk_add("10000100.timer", periph_rate);
ralink_clk_add("10000120.watchdog", periph_rate);
ralink_clk_add("10000500.uart", periph_rate);
ralink_clk_add("10000c00.uartlite", periph_rate);
}