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ASoC: rt711: add two jack detection modes
Some boards use different circuits for jack detection. This patch adds two modes as below 1. JD2/2 ports/external resister 100k 2. JD2/1 port/JD voltage 1.8V Signed-off-by: Shuming Fan <shumingf@realtek.com> Link: https://lore.kernel.org/r/20210617090822.16960-1-shumingf@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -267,7 +267,9 @@ static const struct reg_default rt711_reg_defaults[] = {
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{ 0x8393, 0x00 },
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{ 0x7319, 0x00 },
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{ 0x8399, 0x00 },
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{ 0x752008, 0xa807 },
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{ 0x752009, 0x1029 },
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{ 0x75200b, 0x7770 },
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{ 0x752011, 0x007a },
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{ 0x75201a, 0x8003 },
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{ 0x752045, 0x5289 },
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@ -389,6 +389,36 @@ static void rt711_jack_init(struct rt711_priv *rt711)
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RT711_HP_JD_FINAL_RESULT_CTL_JD12,
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RT711_HP_JD_FINAL_RESULT_CTL_JD12);
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break;
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case RT711_JD2_100K:
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rt711_index_update_bits(rt711->regmap, RT711_VENDOR_REG,
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RT711_JD_CTL2, RT711_JD2_2PORT_100K_DECODE | RT711_JD2_1PORT_TYPE_DECODE |
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RT711_HP_JD_SEL_JD2 | RT711_JD1_2PORT_TYPE_100K_DECODE,
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RT711_JD2_2PORT_100K_DECODE_HP | RT711_JD2_1PORT_JD_HP |
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RT711_HP_JD_SEL_JD2 | RT711_JD1_2PORT_JD_RESERVED);
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rt711_index_update_bits(rt711->regmap, RT711_VENDOR_REG,
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RT711_CC_DET1,
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RT711_HP_JD_FINAL_RESULT_CTL_JD12,
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RT711_HP_JD_FINAL_RESULT_CTL_JD12);
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break;
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case RT711_JD2_1P8V_1PORT:
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rt711_index_update_bits(rt711->regmap, RT711_VENDOR_REG,
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RT711_JD_CTL1, RT711_JD2_DIGITAL_JD_MODE_SEL,
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RT711_JD2_1_JD_MODE);
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rt711_index_update_bits(rt711->regmap, RT711_VENDOR_REG,
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RT711_JD_CTL2, RT711_JD2_1PORT_TYPE_DECODE |
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RT711_HP_JD_SEL_JD2,
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RT711_JD2_1PORT_JD_HP |
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RT711_HP_JD_SEL_JD2);
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rt711_index_update_bits(rt711->regmap, RT711_VENDOR_REG,
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RT711_JD_CTL4, RT711_JD2_PAD_PULL_UP_MASK |
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RT711_JD2_MODE_SEL_MASK,
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RT711_JD2_PAD_PULL_UP |
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RT711_JD2_MODE2_1P8V_1PORT);
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rt711_index_update_bits(rt711->regmap, RT711_VENDOR_REG,
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RT711_CC_DET1,
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RT711_HP_JD_FINAL_RESULT_CTL_JD12,
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RT711_HP_JD_FINAL_RESULT_CTL_JD12);
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break;
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default:
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dev_warn(rt711->component->dev, "Wrong JD source\n");
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break;
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@ -52,7 +52,9 @@ struct sdw_stream_data {
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/* Index (NID:20h) */
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#define RT711_DAC_DC_CALI_CTL1 0x00
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#define RT711_JD_CTL1 0x08
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#define RT711_JD_CTL2 0x09
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#define RT711_JD_CTL4 0x0b
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#define RT711_CC_DET1 0x11
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#define RT711_PARA_VERB_CTL 0x1a
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#define RT711_COMBO_JACK_AUTO_CTL1 0x45
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@ -171,10 +173,33 @@ struct sdw_stream_data {
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/* DAC DC offset calibration control-1 (0x00)(NID:20h) */
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#define RT711_DAC_DC_CALI_TRIGGER (0x1 << 15)
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/* jack detect control 1 (0x08)(NID:20h) */
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#define RT711_JD2_DIGITAL_JD_MODE_SEL (0x1 << 1)
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#define RT711_JD2_1_JD_MODE (0x0 << 1)
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#define RT711_JD2_2_JD_MODE (0x1 << 1)
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/* jack detect control 2 (0x09)(NID:20h) */
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#define RT711_JD2_2PORT_200K_DECODE_HP (0x1 << 13)
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#define RT711_JD2_2PORT_100K_DECODE (0x1 << 12)
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#define RT711_JD2_2PORT_100K_DECODE_HP (0x0 << 12)
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#define RT711_HP_JD_SEL_JD1 (0x0 << 1)
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#define RT711_HP_JD_SEL_JD2 (0x1 << 1)
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#define RT711_JD2_1PORT_TYPE_DECODE (0x3 << 10)
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#define RT711_JD2_1PORT_JD_LINE2 (0x0 << 10)
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#define RT711_JD2_1PORT_JD_HP (0x1 << 10)
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#define RT711_JD2_1PORT_JD_LINE1 (0x2 << 10)
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#define RT711_JD1_2PORT_TYPE_100K_DECODE (0x1 << 0)
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#define RT711_JD1_2PORT_JD_RESERVED (0x0 << 0)
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#define RT711_JD1_2PORT_JD_LINE1 (0x1 << 0)
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/* jack detect control 4 (0x0b)(NID:20h) */
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#define RT711_JD2_PAD_PULL_UP_MASK (0x1 << 3)
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#define RT711_JD2_PAD_NOT_PULL_UP (0x0 << 3)
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#define RT711_JD2_PAD_PULL_UP (0x1 << 3)
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#define RT711_JD2_MODE_SEL_MASK (0x3 << 0)
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#define RT711_JD2_MODE0_2PORT (0x0 << 0)
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#define RT711_JD2_MODE1_3P3V_1PORT (0x1 << 0)
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#define RT711_JD2_MODE2_1P8V_1PORT (0x2 << 0)
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/* CC DET1 (0x11)(NID:20h) */
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#define RT711_HP_JD_FINAL_RESULT_CTL_JD12 (0x1 << 10)
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@ -215,7 +240,9 @@ enum {
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enum rt711_jd_src {
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RT711_JD_NULL,
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RT711_JD1,
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RT711_JD2
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RT711_JD2,
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RT711_JD2_100K,
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RT711_JD2_1P8V_1PORT
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};
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int rt711_io_init(struct device *dev, struct sdw_slave *slave);
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