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arm64: tls: Fix context-switching of tpidrro_el0 when kpti is enabled
Commit18011eac28
("arm64: tls: Avoid unconditional zeroing of tpidrro_el0 for native tasks") tried to optimise the context switching of tpidrro_el0 by eliding the clearing of the register when switching to a native task with kpti enabled, on the erroneous assumption that the kpti trampoline entry code would already have taken care of the write. Although the kpti trampoline does zero the register on entry from a native task, the check in tls_thread_switch() is on the *next* task and so we can end up leaving a stale, non-zero value in the register if the previous task was 32-bit. Drop the broken optimisation and zero tpidrro_el0 unconditionally when switching to a native 64-bit task. Cc: Mark Rutland <mark.rutland@arm.com> Cc: stable@vger.kernel.org Fixes:18011eac28
("arm64: tls: Avoid unconditional zeroing of tpidrro_el0 for native tasks") Signed-off-by: Will Deacon <will@kernel.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Link: https://lore.kernel.org/r/20241114095332.23391-1-will@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -439,7 +439,7 @@ static void tls_thread_switch(struct task_struct *next)
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if (is_compat_thread(task_thread_info(next)))
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write_sysreg(next->thread.uw.tp_value, tpidrro_el0);
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else if (!arm64_kernel_unmapped_at_el0())
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else
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write_sysreg(0, tpidrro_el0);
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write_sysreg(*task_user_tls(next), tpidr_el0);
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