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x86: use not_pci bitmap #4
Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -929,19 +929,19 @@ static int EISA_ELCR(unsigned int irq)
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return 0;
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}
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/* ISA interrupts are always polarity zero edge triggered,
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* when listed as conforming in the MP table. */
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#define default_ISA_trigger(idx) (0)
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#define default_ISA_polarity(idx) (0)
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/* EISA interrupts are always polarity zero and can be edge or level
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* trigger depending on the ELCR value. If an interrupt is listed as
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* EISA conforming in the MP table, that means its trigger type must
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* be read in from the ELCR */
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#define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].mpc_srcbusirq))
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#define default_EISA_polarity(idx) (0)
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/* ISA interrupts are always polarity zero edge triggered,
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* when listed as conforming in the MP table. */
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#define default_ISA_trigger(idx) (0)
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#define default_ISA_polarity(idx) (0)
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#define default_EISA_polarity(idx) default_ISA_polarity(idx)
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/* PCI interrupts are always polarity one level triggered,
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* when listed as conforming in the MP table. */
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@ -953,7 +953,7 @@ static int EISA_ELCR(unsigned int irq)
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* when listed as conforming in the MP table. */
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#define default_MCA_trigger(idx) (1)
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#define default_MCA_polarity(idx) (0)
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#define default_MCA_polarity(idx) default_ISA_polarity(idx)
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static int MPBIOS_polarity(int idx)
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{
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@ -967,35 +967,9 @@ static int MPBIOS_polarity(int idx)
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{
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case 0: /* conforms, ie. bus-type dependent polarity */
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{
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switch (mp_bus_id_to_type[bus])
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{
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case MP_BUS_ISA: /* ISA pin */
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{
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polarity = default_ISA_polarity(idx);
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break;
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}
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case MP_BUS_EISA: /* EISA pin */
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{
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polarity = default_EISA_polarity(idx);
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break;
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}
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case MP_BUS_PCI: /* PCI pin */
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{
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polarity = default_PCI_polarity(idx);
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break;
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}
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case MP_BUS_MCA: /* MCA pin */
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{
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polarity = default_MCA_polarity(idx);
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break;
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}
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default:
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{
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printk(KERN_WARNING "broken BIOS!!\n");
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polarity = 1;
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break;
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}
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}
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polarity = test_bit(bus, mp_bus_not_pci)?
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default_ISA_polarity(idx):
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default_PCI_polarity(idx);
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break;
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}
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case 1: /* high active */
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