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sata_mv: workaround errata PCI#7
Workaround for 60x1-B2 errata PCI#7. Write-combining may be unreliable when chip operates in PCI-X mode, so disable write-combining when in PCI-X mode. Also, update the errata comments at the top of sata_mv, and include a note about errata PCI#11. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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@ -28,10 +28,6 @@
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/*
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/*
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* sata_mv TODO list:
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* sata_mv TODO list:
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*
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*
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* --> More errata workarounds for PCI-X.
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*
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* --> Complete a full errata audit for all chipsets to identify others.
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*
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* --> Develop a low-power-consumption strategy, and implement it.
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* --> Develop a low-power-consumption strategy, and implement it.
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*
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*
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* --> Add sysfs attributes for per-chip / per-HC IRQ coalescing thresholds.
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* --> Add sysfs attributes for per-chip / per-HC IRQ coalescing thresholds.
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@ -44,6 +40,15 @@
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* connect two SATA ports.
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* connect two SATA ports.
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*/
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*/
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/*
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* 80x1-B2 errata PCI#11:
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*
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* Users of the 6041/6081 Rev.B2 chips (current is C0)
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* should be careful to insert those cards only onto PCI-X bus #0,
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* and only in device slots 0..7, not higher. The chips may not
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* work correctly otherwise (note: this is a pretty rare condition).
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*/
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/pci.h>
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@ -181,6 +186,7 @@ enum {
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/* PCI interface registers */
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/* PCI interface registers */
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PCI_COMMAND_OFS = 0xc00,
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PCI_COMMAND_OFS = 0xc00,
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PCI_COMMAND_MWRCOM = (1 << 4), /* PCI Master Write Combining */
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PCI_COMMAND_MRDTRIG = (1 << 7), /* PCI Master Read Trigger */
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PCI_COMMAND_MRDTRIG = (1 << 7), /* PCI Master Read Trigger */
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PCI_MAIN_CMD_STS_OFS = 0xd30,
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PCI_MAIN_CMD_STS_OFS = 0xd30,
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@ -3527,6 +3533,18 @@ static int mv_pci_cut_through_okay(struct ata_host *host)
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return 1; /* okay */
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return 1; /* okay */
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}
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}
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static void mv_60x1b2_errata_pci7(struct ata_host *host)
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{
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struct mv_host_priv *hpriv = host->private_data;
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void __iomem *mmio = hpriv->base;
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/* workaround for 60x1-B2 errata PCI#7 */
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if (mv_in_pcix_mode(host)) {
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u32 reg = readl(mmio + PCI_COMMAND_OFS);
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writelfl(reg & ~PCI_COMMAND_MWRCOM, mmio + PCI_COMMAND_OFS);
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}
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}
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static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
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static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
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{
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{
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struct pci_dev *pdev = to_pci_dev(host->dev);
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struct pci_dev *pdev = to_pci_dev(host->dev);
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@ -3580,6 +3598,7 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
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switch (pdev->revision) {
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switch (pdev->revision) {
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case 0x7:
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case 0x7:
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mv_60x1b2_errata_pci7(host);
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hp_flags |= MV_HP_ERRATA_60X1B2;
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hp_flags |= MV_HP_ERRATA_60X1B2;
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break;
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break;
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case 0x9:
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case 0x9:
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