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ASoC: SOF: rename cores_mask to host_managed_cores_mask
Rename the cores_mask in struct sof_intel_dsp_desc to host_managed_cores_mask to be more indicative of the fact that only these cores can be powered up/down by the host. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@linux.intel.com> Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com> Reviewed-by: Keyon Jie <yang.jie@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Link: https://lore.kernel.org/r/20200910164125.2033062-2-kai.vehmanen@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -129,7 +129,7 @@ const struct sof_intel_dsp_desc apl_chip_info = {
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/* Apollolake */
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.cores_num = 2,
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.init_core_mask = 1,
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.cores_mask = HDA_DSP_CORE_MASK(0) | HDA_DSP_CORE_MASK(1),
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.host_managed_cores_mask = HDA_DSP_CORE_MASK(0) | HDA_DSP_CORE_MASK(1),
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.ipc_req = HDA_DSP_REG_HIPCI,
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.ipc_req_mask = HDA_DSP_REG_HIPCI_BUSY,
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.ipc_ack = HDA_DSP_REG_HIPCIE,
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@ -655,7 +655,7 @@ EXPORT_SYMBOL_NS(sof_bdw_ops, SND_SOC_SOF_BROADWELL);
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const struct sof_intel_dsp_desc bdw_chip_info = {
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.cores_num = 1,
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.cores_mask = 1,
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.host_managed_cores_mask = 1,
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};
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EXPORT_SYMBOL_NS(bdw_chip_info, SND_SOC_SOF_BROADWELL);
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@ -651,7 +651,7 @@ EXPORT_SYMBOL_NS(sof_tng_ops, SND_SOC_SOF_MERRIFIELD);
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const struct sof_intel_dsp_desc tng_chip_info = {
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.cores_num = 1,
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.cores_mask = 1,
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.host_managed_cores_mask = 1,
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};
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EXPORT_SYMBOL_NS(tng_chip_info, SND_SOC_SOF_MERRIFIELD);
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@ -896,7 +896,7 @@ EXPORT_SYMBOL_NS(sof_byt_ops, SND_SOC_SOF_BAYTRAIL);
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const struct sof_intel_dsp_desc byt_chip_info = {
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.cores_num = 1,
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.cores_mask = 1,
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.host_managed_cores_mask = 1,
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};
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EXPORT_SYMBOL_NS(byt_chip_info, SND_SOC_SOF_BAYTRAIL);
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@ -976,7 +976,7 @@ EXPORT_SYMBOL_NS(sof_cht_ops, SND_SOC_SOF_BAYTRAIL);
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const struct sof_intel_dsp_desc cht_chip_info = {
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.cores_num = 1,
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.cores_mask = 1,
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.host_managed_cores_mask = 1,
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};
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EXPORT_SYMBOL_NS(cht_chip_info, SND_SOC_SOF_BAYTRAIL);
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@ -334,7 +334,7 @@ const struct sof_intel_dsp_desc cnl_chip_info = {
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/* Cannonlake */
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.cores_num = 4,
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.init_core_mask = 1,
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.cores_mask = HDA_DSP_CORE_MASK(0) |
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.host_managed_cores_mask = HDA_DSP_CORE_MASK(0) |
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HDA_DSP_CORE_MASK(1) |
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HDA_DSP_CORE_MASK(2) |
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HDA_DSP_CORE_MASK(3),
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@ -353,7 +353,7 @@ const struct sof_intel_dsp_desc icl_chip_info = {
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/* Icelake */
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.cores_num = 4,
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.init_core_mask = 1,
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.cores_mask = HDA_DSP_CORE_MASK(0) |
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.host_managed_cores_mask = HDA_DSP_CORE_MASK(0) |
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HDA_DSP_CORE_MASK(1) |
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HDA_DSP_CORE_MASK(2) |
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HDA_DSP_CORE_MASK(3),
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@ -372,7 +372,7 @@ const struct sof_intel_dsp_desc ehl_chip_info = {
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/* Elkhartlake */
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.cores_num = 4,
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.init_core_mask = 1,
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.cores_mask = HDA_DSP_CORE_MASK(0),
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.host_managed_cores_mask = HDA_DSP_CORE_MASK(0),
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.ipc_req = CNL_DSP_REG_HIPCIDR,
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.ipc_req_mask = CNL_DSP_REG_HIPCIDR_BUSY,
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.ipc_ack = CNL_DSP_REG_HIPCIDA,
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@ -388,7 +388,7 @@ const struct sof_intel_dsp_desc jsl_chip_info = {
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/* Jasperlake */
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.cores_num = 2,
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.init_core_mask = 1,
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.cores_mask = HDA_DSP_CORE_MASK(0) |
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.host_managed_cores_mask = HDA_DSP_CORE_MASK(0) |
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HDA_DSP_CORE_MASK(1),
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.ipc_req = CNL_DSP_REG_HIPCIDR,
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.ipc_req_mask = CNL_DSP_REG_HIPCIDR_BUSY,
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@ -610,7 +610,7 @@ static int hda_suspend(struct snd_sof_dev *sdev, bool runtime_suspend)
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#endif
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/* power down DSP */
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ret = hda_dsp_core_reset_power_down(sdev, chip->cores_mask);
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ret = hda_dsp_core_reset_power_down(sdev, chip->host_managed_cores_mask);
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if (ret < 0) {
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dev_err(sdev->dev,
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"error: failed to power down core during suspend\n");
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@ -91,7 +91,7 @@ static int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag, int iteration)
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int i;
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/* step 1: power up corex */
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ret = hda_dsp_core_power_up(sdev, chip->cores_mask);
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ret = hda_dsp_core_power_up(sdev, chip->host_managed_cores_mask);
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if (ret < 0) {
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if (iteration == HDA_FW_BOOT_ATTEMPTS)
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dev_err(sdev->dev, "error: dsp core 0/1 power up failed\n");
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@ -147,7 +147,7 @@ static int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag, int iteration)
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/* step 5: power down corex */
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ret = hda_dsp_core_power_down(sdev,
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chip->cores_mask & ~(HDA_DSP_CORE_MASK(0)));
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chip->host_managed_cores_mask & ~(HDA_DSP_CORE_MASK(0)));
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if (ret < 0) {
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if (iteration == HDA_FW_BOOT_ATTEMPTS)
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dev_err(sdev->dev,
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@ -176,7 +176,7 @@ static int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag, int iteration)
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err:
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hda_dsp_dump(sdev, SOF_DBG_REGS | SOF_DBG_PCI | SOF_DBG_MBOX);
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hda_dsp_core_reset_power_down(sdev, chip->cores_mask);
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hda_dsp_core_reset_power_down(sdev, chip->host_managed_cores_mask);
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return ret;
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}
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@ -928,7 +928,7 @@ int hda_dsp_remove(struct snd_sof_dev *sdev)
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/* disable cores */
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if (chip)
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hda_dsp_core_reset_power_down(sdev, chip->cores_mask);
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hda_dsp_core_reset_power_down(sdev, chip->host_managed_cores_mask);
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/* disable DSP */
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snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
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@ -154,7 +154,7 @@
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/* DSP hardware descriptor */
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struct sof_intel_dsp_desc {
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int cores_num;
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int cores_mask;
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int host_managed_cores_mask;
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int init_core_mask; /* cores available after fw boot */
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int ipc_req;
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int ipc_req_mask;
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@ -124,7 +124,7 @@ const struct sof_intel_dsp_desc tgl_chip_info = {
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/* Tigerlake */
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.cores_num = 4,
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.init_core_mask = 1,
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.cores_mask = HDA_DSP_CORE_MASK(0),
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.host_managed_cores_mask = HDA_DSP_CORE_MASK(0),
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.ipc_req = CNL_DSP_REG_HIPCIDR,
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.ipc_req_mask = CNL_DSP_REG_HIPCIDR_BUSY,
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.ipc_ack = CNL_DSP_REG_HIPCIDA,
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