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ASoC: ti: davinci-i2s: Add features to McBSP
Merge series from Bastien Curutchet <bastien.curutchet@bootlin.com>: This series aims to add some features to McBSP driver. Convert bindings from .txt to .yaml. Add possibility to use an external clock as sample rate generator's input. Add handling of new formats (TDM, S24_LE, BP_FC). Enable the detection of unexpected frame pulses. Set the clock free-running mode according to SND_SOC_DAIFMT_[GATED/CONT] configuration in DAI format. Add ti,T1-framing[tx/rx] properties in DT. They allow to set the data delay to two bit-clock periods. This has been tested on a platform designed off of the DAVINCI/OMAP-L138 connected to 3 daisy-chained AD7767. An external clock drives the sample rate generator through the CLKS pin. The hardware I have only allowed me to test acquisition side of McBSP. It is connected to a 6 channels TDM and acts as Bit clock provider and Frame clock consumer.
This commit is contained in:
Mark Brown
commit
6451246884
@ -1,50 +0,0 @@
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Texas Instruments DaVinci McBSP module
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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This binding describes the "Multi-channel Buffered Serial Port" (McBSP)
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audio interface found in some TI DaVinci processors like the OMAP-L138 or AM180x.
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Required properties:
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~~~~~~~~~~~~~~~~~~~~
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- compatible :
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"ti,da850-mcbsp" : for DA850, AM180x and OPAM-L138 platforms
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- reg : physical base address and length of the controller memory mapped
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region(s).
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- reg-names : Should contain:
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* "mpu" for the main registers (required).
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* "dat" for the data FIFO (optional).
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- dmas: three element list of DMA controller phandles, DMA request line and
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TC channel ordered triplets.
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- dma-names: identifier string for each DMA request line in the dmas property.
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These strings correspond 1:1 with the ordered pairs in dmas. The dma
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identifiers must be "rx" and "tx".
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Optional properties:
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~~~~~~~~~~~~~~~~~~~~
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- interrupts : Interrupt numbers for McBSP
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- interrupt-names : Known interrupt names are "rx" and "tx"
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- pinctrl-0: Should specify pin control group used for this controller.
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- pinctrl-names: Should contain only one value - "default", for more details
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please refer to pinctrl-bindings.txt
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Example (AM1808):
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~~~~~~~~~~~~~~~~~
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mcbsp0: mcbsp@1d10000 {
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compatible = "ti,da850-mcbsp";
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pinctrl-names = "default";
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pinctrl-0 = <&mcbsp0_pins>;
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reg = <0x00110000 0x1000>,
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<0x00310000 0x1000>;
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reg-names = "mpu", "dat";
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interrupts = <97 98>;
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interrupt-names = "rx", "tx";
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dmas = <&edma0 3 1
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&edma0 2 1>;
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dma-names = "tx", "rx";
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};
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113
Documentation/devicetree/bindings/sound/davinci-mcbsp.yaml
Normal file
113
Documentation/devicetree/bindings/sound/davinci-mcbsp.yaml
Normal file
@ -0,0 +1,113 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/davinci-mcbsp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: McBSP Controller for TI SoCs
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maintainers:
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- Bastien Curutchet <bastien.curutchet@bootlin.com>
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allOf:
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- $ref: dai-common.yaml#
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properties:
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compatible:
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enum:
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- ti,da850-mcbsp
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reg:
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minItems: 1
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items:
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- description: CFG registers
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- description: data registers
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reg-names:
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minItems: 1
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items:
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- const: mpu
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- const: dat
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dmas:
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items:
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- description: transmission DMA channel
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- description: reception DMA channel
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dma-names:
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items:
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- const: tx
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- const: rx
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interrupts:
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items:
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- description: RX interrupt
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- description: TX interrupt
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interrupt-names:
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items:
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- const: rx
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- const: tx
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clocks:
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minItems: 1
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items:
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- description: functional clock
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- description: external input clock for sample rate generator.
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clock-names:
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minItems: 1
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items:
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- const: fck
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- const: clks
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power-domains:
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maxItems: 1
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"#sound-dai-cells":
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const: 0
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ti,T1-framing-tx:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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If the property is present, tx data delay is set to 2 bit clock periods.
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McBSP will insert a blank period (high-impedance period) before the first
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data bit. This can be used to interface to T1-framing devices.
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ti,T1-framing-rx:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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If the property is present, rx data delay is set to 2 bit clock periods.
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McBSP will discard the bit preceding the data stream (called framing bit).
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This can be used to interface to T1-framing devices.
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required:
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- "#sound-dai-cells"
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- compatible
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- reg
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- reg-names
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- dmas
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- dma-names
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- clocks
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unevaluatedProperties: false
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examples:
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- |
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mcbsp0@1d10000 {
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#sound-dai-cells = <0>;
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compatible = "ti,da850-mcbsp";
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pinctrl-names = "default";
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pinctrl-0 = <&mcbsp0_pins>;
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reg = <0x111000 0x1000>,
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<0x311000 0x1000>;
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reg-names = "mpu", "dat";
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interrupts = <97>, <98>;
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interrupt-names = "rx", "tx";
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dmas = <&edma0 3 1>,
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<&edma0 2 1>;
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dma-names = "tx", "rx";
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clocks = <&psc1 14>;
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};
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@ -25,16 +25,6 @@ struct davinci_mcasp_pdata {
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unsigned sram_size_capture;
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struct gen_pool *sram_pool;
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/*
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* If McBSP peripheral gets the clock from an external pin,
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* there are three chooses, that are MCBSP_CLKX, MCBSP_CLKR
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* and MCBSP_CLKS.
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* Depending on different hardware connections it is possible
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* to use this setting to change the behaviour of McBSP
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* driver.
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*/
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int clk_input_pin;
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/*
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* This flag works when both clock and FS are outputs for the cpu
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* and makes clock more accurate (FS is not symmetrical and the
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@ -91,11 +81,6 @@ enum {
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MCASP_VERSION_OMAP, /* OMAP4/5 */
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};
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enum mcbsp_clk_input_pin {
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MCBSP_CLKR = 0, /* as in DM365 */
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MCBSP_CLKS,
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};
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#define INACTIVE_MODE 0
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#define TX_MODE 1
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#define RX_MODE 2
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@ -19,7 +19,6 @@
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/platform_data/davinci_asp.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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@ -62,6 +61,9 @@
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#define DAVINCI_MCBSP_SPCR_RRST (1 << 0)
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#define DAVINCI_MCBSP_SPCR_RINTM(v) ((v) << 4)
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#define DAVINCI_MCBSP_SPCR_RJUST(v) ((v) << 13)
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#define DAVINCI_MCBSP_SPCR_RJUST_Z_LE DAVINCI_MCBSP_SPCR_RJUST(0)
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#define DAVINCI_MCBSP_SPCR_RJUST_S_LE DAVINCI_MCBSP_SPCR_RJUST(1)
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#define DAVINCI_MCBSP_SPCR_XRST (1 << 16)
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#define DAVINCI_MCBSP_SPCR_XINTM(v) ((v) << 20)
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#define DAVINCI_MCBSP_SPCR_GRST (1 << 22)
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@ -108,15 +110,10 @@ enum {
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DAVINCI_MCBSP_WORD_32,
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};
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static const unsigned char data_type[SNDRV_PCM_FORMAT_S32_LE + 1] = {
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[SNDRV_PCM_FORMAT_S8] = 1,
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[SNDRV_PCM_FORMAT_S16_LE] = 2,
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[SNDRV_PCM_FORMAT_S32_LE] = 4,
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};
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static const unsigned char asp_word_length[SNDRV_PCM_FORMAT_S32_LE + 1] = {
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[SNDRV_PCM_FORMAT_S8] = DAVINCI_MCBSP_WORD_8,
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[SNDRV_PCM_FORMAT_S16_LE] = DAVINCI_MCBSP_WORD_16,
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[SNDRV_PCM_FORMAT_S24_LE] = DAVINCI_MCBSP_WORD_24,
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[SNDRV_PCM_FORMAT_S32_LE] = DAVINCI_MCBSP_WORD_32,
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};
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@ -135,6 +132,7 @@ struct davinci_mcbsp_dev {
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int mode;
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u32 pcr;
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struct clk *clk;
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struct clk *ext_clk;
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/*
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* Combining both channels into 1 element will at least double the
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* amount of time between servicing the dma channel, increase
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@ -159,8 +157,13 @@ struct davinci_mcbsp_dev {
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unsigned int fmt;
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int clk_div;
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int clk_input_pin;
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bool i2s_accurate_sck;
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int tdm_slots;
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int slot_width;
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bool tx_framing_bit;
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bool rx_framing_bit;
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};
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static inline void davinci_mcbsp_write_reg(struct davinci_mcbsp_dev *dev,
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@ -214,6 +217,63 @@ static void davinci_mcbsp_stop(struct davinci_mcbsp_dev *dev, int playback)
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toggle_clock(dev, playback);
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}
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static int davinci_i2s_tdm_word_length(int tdm_slot_width)
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{
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switch (tdm_slot_width) {
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case 8:
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return DAVINCI_MCBSP_WORD_8;
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case 12:
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return DAVINCI_MCBSP_WORD_12;
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case 16:
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return DAVINCI_MCBSP_WORD_16;
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case 20:
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return DAVINCI_MCBSP_WORD_20;
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case 24:
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return DAVINCI_MCBSP_WORD_24;
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case 32:
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return DAVINCI_MCBSP_WORD_32;
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default:
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return -EINVAL;
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}
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}
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static int davinci_i2s_set_tdm_slot(struct snd_soc_dai *cpu_dai,
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unsigned int tx_mask,
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unsigned int rx_mask,
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int slots, int slot_width)
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{
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struct davinci_mcbsp_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
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dev_dbg(dev->dev, "slots %d, slot_width %d\n", slots, slot_width);
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if (slots > 128 || !slots) {
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dev_err(dev->dev, "Invalid number of slots\n");
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return -EINVAL;
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}
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if (rx_mask != (1 << slots) - 1) {
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dev_err(dev->dev, "Invalid RX mask (0x%08x) : all slots must be used by McBSP\n",
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rx_mask);
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return -EINVAL;
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}
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if (tx_mask != (1 << slots) - 1) {
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dev_err(dev->dev, "Invalid TX mask (0x%08x) : all slots must be used by McBSP\n",
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tx_mask);
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return -EINVAL;
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}
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if (davinci_i2s_tdm_word_length(slot_width) < 0) {
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dev_err(dev->dev, "%s: Unsupported slot_width %d\n", __func__, slot_width);
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return -EINVAL;
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}
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dev->tdm_slots = slots;
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dev->slot_width = slot_width;
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return 0;
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}
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#define DEFAULT_BITPERSAMPLE 16
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static int davinci_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
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@ -221,6 +281,7 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
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{
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struct davinci_mcbsp_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
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unsigned int pcr;
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unsigned int spcr;
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unsigned int srgr;
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bool inv_fs = false;
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/* Attention srgr is updated by hw_params! */
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@ -229,6 +290,23 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
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DAVINCI_MCBSP_SRGR_FWID(DEFAULT_BITPERSAMPLE - 1);
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dev->fmt = fmt;
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spcr = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
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switch (fmt & SND_SOC_DAIFMT_CLOCK_MASK) {
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case SND_SOC_DAIFMT_CONT:
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spcr |= DAVINCI_MCBSP_SPCR_FREE;
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dev_dbg(dev->dev, "Free-running mode ON\n");
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break;
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case SND_SOC_DAIFMT_GATED:
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spcr &= ~DAVINCI_MCBSP_SPCR_FREE;
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dev_dbg(dev->dev, "Free-running mode OFF\n");
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break;
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default:
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dev_err(dev->dev, "Invalid clock gating\n");
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return -EINVAL;
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}
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davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, spcr);
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/* set master/slave audio interface */
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switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
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case SND_SOC_DAIFMT_BP_FP:
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@ -239,28 +317,30 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
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DAVINCI_MCBSP_PCR_CLKRM;
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break;
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case SND_SOC_DAIFMT_BC_FP:
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pcr = DAVINCI_MCBSP_PCR_FSRM | DAVINCI_MCBSP_PCR_FSXM;
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/*
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* Selection of the clock input pin that is the
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* input for the Sample Rate Generator.
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* McBSP FSR and FSX are driven by the Sample Rate
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* Generator.
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*/
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switch (dev->clk_input_pin) {
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case MCBSP_CLKS:
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pcr |= DAVINCI_MCBSP_PCR_CLKXM |
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DAVINCI_MCBSP_PCR_CLKRM;
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break;
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case MCBSP_CLKR:
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pcr |= DAVINCI_MCBSP_PCR_SCLKME;
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break;
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default:
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dev_err(dev->dev, "bad clk_input_pin\n");
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if (dev->tdm_slots || dev->slot_width) {
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dev_err(dev->dev, "TDM is not supported for BC_FP format\n");
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return -EINVAL;
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}
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/*
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* McBSP CLKR pin is the input for the Sample Rate Generator.
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* McBSP FSR and FSX are driven by the Sample Rate Generator.
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*/
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pcr = DAVINCI_MCBSP_PCR_FSRM | DAVINCI_MCBSP_PCR_FSXM;
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pcr |= DAVINCI_MCBSP_PCR_SCLKME;
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break;
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case SND_SOC_DAIFMT_BP_FC:
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/* cpu is bitclock provider */
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pcr = DAVINCI_MCBSP_PCR_CLKXM |
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DAVINCI_MCBSP_PCR_CLKRM;
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break;
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case SND_SOC_DAIFMT_BC_FC:
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if (dev->tdm_slots || dev->slot_width) {
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dev_err(dev->dev, "TDM is not supported for BC_FC format\n");
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return -EINVAL;
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}
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/* codec is master */
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pcr = 0;
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break;
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@ -380,30 +460,58 @@ static int davinci_i2s_hw_params(struct snd_pcm_substream *substream,
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struct davinci_mcbsp_dev *dev = snd_soc_dai_get_drvdata(dai);
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struct snd_interval *i = NULL;
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int mcbsp_word_length, master;
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unsigned int rcr, xcr, srgr, clk_div, freq, framesize;
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unsigned int clk_div, freq, framesize;
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unsigned int srgr = 0;
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unsigned int rcr = 0;
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unsigned int xcr = 0;
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u32 spcr;
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snd_pcm_format_t fmt;
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unsigned element_cnt = 1;
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/* general line settings */
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spcr = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG);
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/* Determine xfer data type */
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fmt = params_format(params);
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switch (fmt) {
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case SNDRV_PCM_FORMAT_S16_LE:
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case SNDRV_PCM_FORMAT_S32_LE:
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break;
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case SNDRV_PCM_FORMAT_S24_LE:
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spcr |= DAVINCI_MCBSP_SPCR_RJUST_S_LE;
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break;
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default:
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dev_warn(dev->dev, "davinci-i2s: unsupported PCM format\n");
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return -EINVAL;
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}
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/* general line settings */
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
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spcr |= DAVINCI_MCBSP_SPCR_RINTM(3) | DAVINCI_MCBSP_SPCR_FREE;
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spcr |= DAVINCI_MCBSP_SPCR_RINTM(3);
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davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, spcr);
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} else {
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spcr |= DAVINCI_MCBSP_SPCR_XINTM(3) | DAVINCI_MCBSP_SPCR_FREE;
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spcr |= DAVINCI_MCBSP_SPCR_XINTM(3);
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davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, spcr);
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}
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master = dev->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK;
|
||||
fmt = params_format(params);
|
||||
mcbsp_word_length = asp_word_length[fmt];
|
||||
if (dev->slot_width)
|
||||
mcbsp_word_length = davinci_i2s_tdm_word_length(dev->slot_width);
|
||||
else
|
||||
mcbsp_word_length = asp_word_length[fmt];
|
||||
|
||||
if (mcbsp_word_length < 0)
|
||||
return mcbsp_word_length;
|
||||
|
||||
switch (master) {
|
||||
case SND_SOC_DAIFMT_BP_FP:
|
||||
freq = clk_get_rate(dev->clk);
|
||||
srgr = DAVINCI_MCBSP_SRGR_FSGM |
|
||||
DAVINCI_MCBSP_SRGR_CLKSM;
|
||||
if (dev->ext_clk) {
|
||||
freq = clk_get_rate(dev->ext_clk);
|
||||
} else {
|
||||
freq = clk_get_rate(dev->clk);
|
||||
srgr = DAVINCI_MCBSP_SRGR_CLKSM;
|
||||
}
|
||||
srgr |= DAVINCI_MCBSP_SRGR_FSGM;
|
||||
srgr |= DAVINCI_MCBSP_SRGR_FWID(mcbsp_word_length *
|
||||
8 - 1);
|
||||
if (dev->i2s_accurate_sck) {
|
||||
@ -434,6 +542,23 @@ static int davinci_i2s_hw_params(struct snd_pcm_substream *substream,
|
||||
clk_div &= 0xFF;
|
||||
srgr |= clk_div;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_BP_FC:
|
||||
if (dev->ext_clk) {
|
||||
freq = clk_get_rate(dev->ext_clk);
|
||||
} else {
|
||||
freq = clk_get_rate(dev->clk);
|
||||
srgr = DAVINCI_MCBSP_SRGR_CLKSM;
|
||||
}
|
||||
if (dev->tdm_slots && dev->slot_width) {
|
||||
clk_div = freq / (params->rate_num * params->rate_den)
|
||||
/ (dev->tdm_slots * dev->slot_width) - 1;
|
||||
} else {
|
||||
clk_div = freq / (mcbsp_word_length * 16) /
|
||||
params->rate_num * params->rate_den;
|
||||
}
|
||||
clk_div &= 0xFF;
|
||||
srgr |= clk_div;
|
||||
break;
|
||||
case SND_SOC_DAIFMT_BC_FC:
|
||||
/* Clock and frame sync given from external sources */
|
||||
i = hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS);
|
||||
@ -450,8 +575,6 @@ static int davinci_i2s_hw_params(struct snd_pcm_substream *substream,
|
||||
}
|
||||
davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SRGR_REG, srgr);
|
||||
|
||||
rcr = DAVINCI_MCBSP_RCR_RFIG;
|
||||
xcr = DAVINCI_MCBSP_XCR_XFIG;
|
||||
if (dev->mode == MOD_DSP_B) {
|
||||
rcr |= DAVINCI_MCBSP_RCR_RDATDLY(0);
|
||||
xcr |= DAVINCI_MCBSP_XCR_XDATDLY(0);
|
||||
@ -459,11 +582,14 @@ static int davinci_i2s_hw_params(struct snd_pcm_substream *substream,
|
||||
rcr |= DAVINCI_MCBSP_RCR_RDATDLY(1);
|
||||
xcr |= DAVINCI_MCBSP_XCR_XDATDLY(1);
|
||||
}
|
||||
/* Determine xfer data type */
|
||||
fmt = params_format(params);
|
||||
if ((fmt > SNDRV_PCM_FORMAT_S32_LE) || !data_type[fmt]) {
|
||||
printk(KERN_WARNING "davinci-i2s: unsupported PCM format\n");
|
||||
return -EINVAL;
|
||||
|
||||
if (dev->tx_framing_bit) {
|
||||
xcr &= ~DAVINCI_MCBSP_XCR_XDATDLY(1);
|
||||
xcr |= DAVINCI_MCBSP_XCR_XDATDLY(2);
|
||||
}
|
||||
if (dev->rx_framing_bit) {
|
||||
rcr &= ~DAVINCI_MCBSP_RCR_RDATDLY(1);
|
||||
rcr |= DAVINCI_MCBSP_RCR_RDATDLY(2);
|
||||
}
|
||||
|
||||
if (params_channels(params) == 2) {
|
||||
@ -489,13 +615,17 @@ static int davinci_i2s_hw_params(struct snd_pcm_substream *substream,
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
mcbsp_word_length = asp_word_length[fmt];
|
||||
|
||||
switch (master) {
|
||||
case SND_SOC_DAIFMT_BP_FP:
|
||||
case SND_SOC_DAIFMT_BP_FC:
|
||||
rcr |= DAVINCI_MCBSP_RCR_RFRLEN1(0);
|
||||
xcr |= DAVINCI_MCBSP_XCR_XFRLEN1(0);
|
||||
if (dev->tdm_slots > 0) {
|
||||
rcr |= DAVINCI_MCBSP_RCR_RFRLEN1(dev->tdm_slots - 1);
|
||||
xcr |= DAVINCI_MCBSP_XCR_XFRLEN1(dev->tdm_slots - 1);
|
||||
} else {
|
||||
rcr |= DAVINCI_MCBSP_RCR_RFRLEN1(0);
|
||||
xcr |= DAVINCI_MCBSP_XCR_XFRLEN1(0);
|
||||
}
|
||||
break;
|
||||
case SND_SOC_DAIFMT_BC_FC:
|
||||
case SND_SOC_DAIFMT_BC_FP:
|
||||
@ -599,6 +729,7 @@ static void davinci_i2s_shutdown(struct snd_pcm_substream *substream,
|
||||
|
||||
#define DAVINCI_I2S_RATES SNDRV_PCM_RATE_8000_96000
|
||||
#define DAVINCI_I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
|
||||
SNDRV_PCM_FMTBIT_S24_LE | \
|
||||
SNDRV_PCM_FMTBIT_S32_LE)
|
||||
|
||||
static int davinci_i2s_dai_probe(struct snd_soc_dai *dai)
|
||||
@ -620,19 +751,20 @@ static const struct snd_soc_dai_ops davinci_i2s_dai_ops = {
|
||||
.hw_params = davinci_i2s_hw_params,
|
||||
.set_fmt = davinci_i2s_set_dai_fmt,
|
||||
.set_clkdiv = davinci_i2s_dai_set_clkdiv,
|
||||
.set_tdm_slot = davinci_i2s_set_tdm_slot,
|
||||
|
||||
};
|
||||
|
||||
static struct snd_soc_dai_driver davinci_i2s_dai = {
|
||||
.playback = {
|
||||
.channels_min = 2,
|
||||
.channels_max = 2,
|
||||
.channels_max = 128,
|
||||
.rates = DAVINCI_I2S_RATES,
|
||||
.formats = DAVINCI_I2S_FORMATS,
|
||||
},
|
||||
.capture = {
|
||||
.channels_min = 2,
|
||||
.channels_max = 2,
|
||||
.channels_max = 128,
|
||||
.rates = DAVINCI_I2S_RATES,
|
||||
.formats = DAVINCI_I2S_FORMATS,
|
||||
},
|
||||
@ -676,6 +808,9 @@ static int davinci_i2s_probe(struct platform_device *pdev)
|
||||
|
||||
dev->base = io_base;
|
||||
|
||||
dev->tx_framing_bit = of_property_read_bool(pdev->dev.of_node, "ti,T1-framing-tx");
|
||||
dev->rx_framing_bit = of_property_read_bool(pdev->dev.of_node, "ti,T1-framing-rx");
|
||||
|
||||
/* setup DMA, first TX, then RX */
|
||||
dma_data = &dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK];
|
||||
dma_data->addr = (dma_addr_t)(mem->start + DAVINCI_MCBSP_DXR_REG);
|
||||
@ -707,12 +842,36 @@ static int davinci_i2s_probe(struct platform_device *pdev)
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
dev->clk = clk_get(&pdev->dev, NULL);
|
||||
/*
|
||||
* The optional is there for backward compatibility.
|
||||
* If 'fck' is not present, the clk_get(dev, NULL) that follows may find something
|
||||
*/
|
||||
dev->clk = devm_clk_get_optional(&pdev->dev, "fck");
|
||||
if (IS_ERR(dev->clk))
|
||||
return -ENODEV;
|
||||
ret = clk_enable(dev->clk);
|
||||
return dev_err_probe(&pdev->dev, PTR_ERR(dev->clk), "Invalid functional clock\n");
|
||||
if (!dev->clk) {
|
||||
dev->clk = devm_clk_get(&pdev->dev, NULL);
|
||||
if (IS_ERR(dev->clk))
|
||||
return dev_err_probe(&pdev->dev, PTR_ERR(dev->clk),
|
||||
"Missing functional clock\n");
|
||||
}
|
||||
|
||||
dev->ext_clk = devm_clk_get_optional(&pdev->dev, "clks");
|
||||
if (IS_ERR(dev->ext_clk))
|
||||
return dev_err_probe(&pdev->dev, PTR_ERR(dev->ext_clk), "Invalid external clock\n");
|
||||
|
||||
ret = clk_prepare_enable(dev->clk);
|
||||
if (ret)
|
||||
goto err_put_clk;
|
||||
return ret;
|
||||
|
||||
if (dev->ext_clk) {
|
||||
dev_dbg(&pdev->dev, "External clock used for sample rate generator\n");
|
||||
ret = clk_prepare_enable(dev->ext_clk);
|
||||
if (ret) {
|
||||
dev_err_probe(&pdev->dev, ret, "Failed to enable external clock\n");
|
||||
goto err_disable_clk;
|
||||
}
|
||||
}
|
||||
|
||||
dev->dev = &pdev->dev;
|
||||
dev_set_drvdata(&pdev->dev, dev);
|
||||
@ -720,11 +879,11 @@ static int davinci_i2s_probe(struct platform_device *pdev)
|
||||
ret = snd_soc_register_component(&pdev->dev, &davinci_i2s_component,
|
||||
&davinci_i2s_dai, 1);
|
||||
if (ret != 0)
|
||||
goto err_release_clk;
|
||||
goto err_disable_ext_clk;
|
||||
|
||||
ret = edma_pcm_platform_register(&pdev->dev);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "register PCM failed: %d\n", ret);
|
||||
dev_err_probe(&pdev->dev, ret, "register PCM failed\n");
|
||||
goto err_unregister_component;
|
||||
}
|
||||
|
||||
@ -732,10 +891,12 @@ static int davinci_i2s_probe(struct platform_device *pdev)
|
||||
|
||||
err_unregister_component:
|
||||
snd_soc_unregister_component(&pdev->dev);
|
||||
err_release_clk:
|
||||
clk_disable(dev->clk);
|
||||
err_put_clk:
|
||||
clk_put(dev->clk);
|
||||
err_disable_ext_clk:
|
||||
if (dev->ext_clk)
|
||||
clk_disable_unprepare(dev->ext_clk);
|
||||
err_disable_clk:
|
||||
clk_disable_unprepare(dev->clk);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -745,9 +906,10 @@ static void davinci_i2s_remove(struct platform_device *pdev)
|
||||
|
||||
snd_soc_unregister_component(&pdev->dev);
|
||||
|
||||
clk_disable(dev->clk);
|
||||
clk_put(dev->clk);
|
||||
dev->clk = NULL;
|
||||
clk_disable_unprepare(dev->clk);
|
||||
|
||||
if (dev->ext_clk)
|
||||
clk_disable_unprepare(dev->ext_clk);
|
||||
}
|
||||
|
||||
static const struct of_device_id davinci_i2s_match[] __maybe_unused = {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user