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usb: dwc2: add support for Sophgo CV18XX/SG200X series SoC
Add params for DWC2 IP in Sophgo CV18XX/SG200X series SoC. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Acked-by: Minas Harutyunyan <hminas@synopsys.com> Link: https://lore.kernel.org/r/IA1PR20MB4953EE73DD36D5FFC81D90EDBB352@IA1PR20MB4953.namprd20.prod.outlook.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -201,6 +201,25 @@ static void dwc2_set_amcc_params(struct dwc2_hsotg *hsotg)
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p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT;
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}
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static void dwc2_set_cv1800_params(struct dwc2_hsotg *hsotg)
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{
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struct dwc2_core_params *p = &hsotg->params;
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p->otg_caps.hnp_support = false;
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p->otg_caps.srp_support = false;
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p->host_dma = false;
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p->g_dma = false;
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p->speed = DWC2_SPEED_PARAM_HIGH;
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p->phy_type = DWC2_PHY_TYPE_PARAM_UTMI;
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p->phy_utmi_width = 16;
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p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT;
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p->lpm = false;
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p->lpm_clock_gating = false;
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p->besl = false;
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p->hird_threshold_en = false;
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p->power_down = DWC2_POWER_DOWN_PARAM_NONE;
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}
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static void dwc2_set_stm32f4x9_fsotg_params(struct dwc2_hsotg *hsotg)
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{
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struct dwc2_core_params *p = &hsotg->params;
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@ -295,6 +314,8 @@ const struct of_device_id dwc2_of_match_table[] = {
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.data = dwc2_set_amlogic_a1_params },
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{ .compatible = "amcc,dwc-otg", .data = dwc2_set_amcc_params },
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{ .compatible = "apm,apm82181-dwc-otg", .data = dwc2_set_amcc_params },
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{ .compatible = "sophgo,cv1800-usb",
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.data = dwc2_set_cv1800_params },
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{ .compatible = "st,stm32f4x9-fsotg",
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.data = dwc2_set_stm32f4x9_fsotg_params },
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{ .compatible = "st,stm32f4x9-hsotg" },
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