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bpf, docs: Add a setion to explain the basic instruction encoding

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The eBPF instruction set document does not currently document the basic
instruction encoding.  Add a section to do that.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Link: https://lore.kernel.org/bpf/20220103183556.41040-2-hch@lst.de
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Christoph Hellwig 2022-01-03 19:35:51 +01:00 committed by Alexei Starovoitov
parent ca796fe66f
commit 62e4683849
1 changed files with 15 additions and 1 deletions
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16
Documentation/bpf/instruction-set.rst
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@ -19,8 +19,22 @@ The eBPF calling convention is defined as:
R0 - R5 are scratch registers and eBPF programs needs to spill/fill them if
necessary across calls.
Instruction encoding
====================
eBPF uses 64-bit instructions with the following encoding:
============= ======= =============== ==================== ============
32 bits (MSB) 16 bits 4 bits 4 bits 8 bits (LSB)
============= ======= =============== ==================== ============
immediate offset source register destination register opcode
============= ======= =============== ==================== ============
Note that most instructions do not use all of the fields.
Unused fields shall be cleared to zero.
Instruction classes
===================
-------------------
The three LSB bits of the 'opcode' field store the instruction class: