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drm/xe: Fix typo in MCR documentation

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Add missing "multicast" word and adapt/wrap the rest of the sentence.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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Lucas De Marchi 2023-01-20 16:59:09 -08:00 committed by Rodrigo Vivi
parent 77775e24e6
commit 62421b45d4
1 changed files with 5 additions and 5 deletions
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10
drivers/gpu/drm/xe/xe_gt_mcr.c
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@ -23,12 +23,12 @@
*
* MMIO accesses to MCR registers are controlled according to the settings
* programmed in the platform's MCR_SELECTOR register(s). MMIO writes to MCR
* registers can be done in either a (i.e., a single write updates all
* registers can be done in either multicast (a single write updates all
* instances of the register to the same value) or unicast (a write updates only
* one specific instance). Reads of MCR registers always operate in a unicast
* manner regardless of how the multicast/unicast bit is set in MCR_SELECTOR.
* Selection of a specific MCR instance for unicast operations is referred to
* as "steering."
* one specific instance) form. Reads of MCR registers always operate in a
* unicast manner regardless of how the multicast/unicast bit is set in
* MCR_SELECTOR. Selection of a specific MCR instance for unicast operations is
* referred to as "steering."
*
* If MCR register operations are steered toward a hardware unit that is
* fused off or currently powered down due to power gating, the MMIO operation