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ath9k_hw: run ath9k_hw_9271_pa_cal() initial calibration
The PA calibration for ar9271 ath9k_hw_9271_pa_cal() can run during reset or initial calibration, update the PA calibration to account for that and initialize PA calibration variables for both conditions. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -813,7 +813,7 @@ static void ath9k_olc_temp_compensation(struct ath_hw *ah)
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}
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}
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static void ath9k_hw_9271_pa_cal(struct ath_hw *ah)
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static void ath9k_hw_9271_pa_cal(struct ath_hw *ah, bool is_reset)
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{
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u32 regVal;
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unsigned int i;
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@ -889,10 +889,19 @@ static void ath9k_hw_9271_pa_cal(struct ath_hw *ah)
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REG_WRITE(ah, 0x7834, regVal);
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}
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/* Empirical offset correction */
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#if 0
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REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9271_AN_RF2G6_OFFS, 0x20);
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#endif
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regVal = (regVal >>20) & 0x7f;
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/* Update PA cal info */
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if ((!is_reset) && (ah->pacal_info.prev_offset == regVal)) {
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if (ah->pacal_info.max_skipcount < MAX_PACAL_SKIPCOUNT)
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ah->pacal_info.max_skipcount =
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2 * ah->pacal_info.max_skipcount;
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ah->pacal_info.skipcount = ah->pacal_info.max_skipcount;
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} else {
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ah->pacal_info.max_skipcount = 1;
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ah->pacal_info.skipcount = 0;
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ah->pacal_info.prev_offset = regVal;
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}
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regVal = REG_READ(ah, 0x7834);
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regVal |= 0x1;
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@ -1043,7 +1052,7 @@ bool ath9k_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan,
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if (longcal) {
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/* Do periodic PAOffset Cal */
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if (AR_SREV_9271(ah))
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ath9k_hw_9271_pa_cal(ah);
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ath9k_hw_9271_pa_cal(ah, false);
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else if (AR_SREV_9285_11_OR_LATER(ah)) {
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if (!ah->pacal_info.skipcount)
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ath9k_hw_9285_pa_cal(ah, false);
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@ -1152,7 +1161,9 @@ bool ath9k_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan)
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}
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/* Do PA Calibration */
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if (AR_SREV_9285_11_OR_LATER(ah))
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if (AR_SREV_9271(ah))
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ath9k_hw_9271_pa_cal(ah, true);
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else if (AR_SREV_9285_11_OR_LATER(ah))
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ath9k_hw_9285_pa_cal(ah, true);
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/* Do NF Calibration after DC offset and other calibrations */
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