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[RAPIDIO] Add serial RapidIO controller support, which includes MPC8548, MPC8641
Signed-off-by: Zhang Wei <wei.zhang@freescale.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Zhang Wei
Paul Mackerras
parent
182e143bee
commit
61b269179d
@ -21,6 +21,7 @@
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#include <linux/rio.h>
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#include <linux/rio_drv.h>
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#include <linux/of_platform.h>
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#include <linux/delay.h>
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#include <asm/io.h>
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@ -30,7 +31,12 @@
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#define IRQ_RIO_RX(m) (((struct rio_priv *)(m->priv))->rxirq)
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#define RIO_ATMU_REGS_OFFSET 0x10c00
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#define RIO_MSG_REGS_OFFSET 0x11000
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#define RIO_P_MSG_REGS_OFFSET 0x11000
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#define RIO_S_MSG_REGS_OFFSET 0x13000
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#define RIO_ESCSR 0x158
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#define RIO_CCSR 0x15c
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#define RIO_ISR_AACR 0x10120
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#define RIO_ISR_AACR_AA 0x1 /* Accept All ID */
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#define RIO_MAINT_WIN_SIZE 0x400000
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#define RIO_DBELL_WIN_SIZE 0x1000
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@ -69,7 +75,7 @@
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struct rio_atmu_regs {
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u32 rowtar;
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u32 pad1;
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u32 rowtear;
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u32 rowbar;
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u32 pad2;
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u32 rowar;
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@ -95,7 +101,15 @@ struct rio_msg_regs {
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u32 ifqdpar;
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u32 pad6;
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u32 ifqepar;
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u32 pad7[250];
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u32 pad7[226];
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u32 odmr;
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u32 odsr;
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u32 res0[4];
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u32 oddpr;
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u32 oddatr;
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u32 res1[3];
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u32 odretcr;
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u32 res2[12];
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u32 dmr;
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u32 dsr;
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u32 pad8;
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@ -175,8 +189,22 @@ static int fsl_rio_doorbell_send(struct rio_mport *mport,
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struct rio_priv *priv = mport->priv;
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pr_debug("fsl_doorbell_send: index %d destid %4.4x data %4.4x\n",
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index, destid, data);
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out_be32(&priv->dbell_atmu_regs->rowtar, destid << 22);
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out_be16(priv->dbell_win, data);
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switch (mport->phy_type) {
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case RIO_PHY_PARALLEL:
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out_be32(&priv->dbell_atmu_regs->rowtar, destid << 22);
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out_be16(priv->dbell_win, data);
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break;
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case RIO_PHY_SERIAL:
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/* In the serial version silicons, such as MPC8548, MPC8641,
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* below operations is must be.
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*/
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out_be32(&priv->msg_regs->odmr, 0x00000000);
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out_be32(&priv->msg_regs->odretcr, 0x00000004);
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out_be32(&priv->msg_regs->oddpr, destid << 16);
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out_be32(&priv->msg_regs->oddatr, data);
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out_be32(&priv->msg_regs->odmr, 0x00000001);
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break;
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}
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return 0;
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}
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@ -342,11 +370,22 @@ rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox,
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memset(priv->msg_tx_ring.virt_buffer[priv->msg_tx_ring.tx_slot]
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+ len, 0, RIO_MAX_MSG_SIZE - len);
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/* Set mbox field for message */
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desc->dport = mbox & 0x3;
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switch (mport->phy_type) {
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case RIO_PHY_PARALLEL:
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/* Set mbox field for message */
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desc->dport = mbox & 0x3;
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/* Enable EOMI interrupt, set priority, and set destid */
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desc->dattr = 0x28000000 | (rdev->destid << 2);
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/* Enable EOMI interrupt, set priority, and set destid */
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desc->dattr = 0x28000000 | (rdev->destid << 2);
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break;
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case RIO_PHY_SERIAL:
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/* Set mbox field for message, and set destid */
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desc->dport = (rdev->destid << 16) | (mbox & 0x3);
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/* Enable EOMI interrupt and priority */
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desc->dattr = 0x28000000;
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break;
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}
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/* Set transfer size aligned to next power of 2 (in double words) */
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desc->dwcnt = is_power_of_2(len) ? len : 1 << get_bitmask_order(len);
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@ -920,6 +959,7 @@ int fsl_rio_setup(struct of_device *dev)
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const u32 *dt_range, *cell;
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struct resource regs;
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int rlen;
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u32 ccsr;
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u64 law_start, law_size;
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int paw, aw, sw;
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@ -1008,6 +1048,14 @@ int fsl_rio_setup(struct of_device *dev)
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priv->regs_win = ioremap(regs.start, regs.end - regs.start + 1);
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/* Probe the master port phy type */
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ccsr = in_be32(priv->regs_win + RIO_CCSR);
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port->phy_type = (ccsr & 1) ? RIO_PHY_SERIAL : RIO_PHY_PARALLEL;
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dev_info(&dev->dev, "RapidIO PHY type: %s\n",
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(port->phy_type == RIO_PHY_PARALLEL) ? "parallel" :
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((port->phy_type == RIO_PHY_SERIAL) ? "serial" :
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"unknown"));
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port->sys_size = (in_be32((priv->regs_win + RIO_PEF_CAR))
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& RIO_PEF_CTLS) >> 4;
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dev_info(&dev->dev, "RapidIO Common Transport System size: %d\n",
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@ -1017,8 +1065,13 @@ int fsl_rio_setup(struct of_device *dev)
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+ RIO_ATMU_REGS_OFFSET);
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priv->maint_atmu_regs = priv->atmu_regs + 1;
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priv->dbell_atmu_regs = priv->atmu_regs + 2;
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priv->msg_regs = (struct rio_msg_regs *)(priv->regs_win
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+ RIO_MSG_REGS_OFFSET);
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priv->msg_regs = (struct rio_msg_regs *)(priv->regs_win +
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((port->phy_type == RIO_PHY_SERIAL) ?
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RIO_S_MSG_REGS_OFFSET : RIO_P_MSG_REGS_OFFSET));
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/* Set to receive any dist ID for serial RapidIO controller. */
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if (port->phy_type == RIO_PHY_SERIAL)
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out_be32((priv->regs_win + RIO_ISR_AACR), RIO_ISR_AACR_AA);
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/* Configure maintenance transaction window */
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out_be32(&priv->maint_atmu_regs->rowbar, 0x000c0000);
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@ -145,6 +145,11 @@ struct rio_dbell {
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void *dev_id;
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};
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enum rio_phy_type {
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RIO_PHY_PARALLEL,
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RIO_PHY_SERIAL,
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};
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/**
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* struct rio_mport - RIO master port info
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* @dbells: List of doorbell events
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@ -178,6 +183,7 @@ struct rio_mport {
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* 0 - Small size. 256 devices.
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* 1 - Large size, 65536 devices.
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*/
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enum rio_phy_type phy_type; /* RapidIO phy type */
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unsigned char name[40];
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void *priv; /* Master port private data */
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};
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