mirror of
https://github.com/torvalds/linux.git
synced 2024-11-30 08:01:59 +00:00
Merge branches 'x86/asm', 'x86/cleanups' and 'x86/headers' into x86/core
This commit is contained in:
commit
609162850d
@ -25,14 +25,12 @@
|
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#include <linux/linkage.h>
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#include <asm/segment.h>
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#include <asm/page.h>
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#include <asm/page_types.h>
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#include <asm/boot.h>
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#include <asm/asm-offsets.h>
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.section ".text.head","ax",@progbits
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.globl startup_32
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startup_32:
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ENTRY(startup_32)
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cld
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/* test KEEP_SEGMENTS flag to see if the bootloader is asking
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* us to not reload segments */
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@ -113,6 +111,8 @@ startup_32:
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*/
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leal relocated(%ebx), %eax
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jmp *%eax
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ENDPROC(startup_32)
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.section ".text"
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relocated:
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|
@ -26,8 +26,8 @@
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#include <linux/linkage.h>
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#include <asm/segment.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <asm/pgtable_types.h>
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#include <asm/page_types.h>
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#include <asm/boot.h>
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#include <asm/msr.h>
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#include <asm/processor-flags.h>
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@ -35,9 +35,7 @@
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.section ".text.head"
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.code32
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.globl startup_32
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startup_32:
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ENTRY(startup_32)
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cld
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/* test KEEP_SEGMENTS flag to see if the bootloader is asking
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* us to not reload segments */
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@ -176,6 +174,7 @@ startup_32:
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/* Jump from 32bit compatibility mode into 64bit mode. */
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lret
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ENDPROC(startup_32)
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no_longmode:
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/* This isn't an x86-64 CPU so hang */
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@ -295,7 +294,6 @@ relocated:
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call decompress_kernel
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popq %rsi
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/*
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* Jump to the decompressed kernel.
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*/
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|
@ -8,6 +8,8 @@
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*
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* ----------------------------------------------------------------------- */
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#include <linux/linkage.h>
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/*
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* Memory copy routines
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*/
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@ -15,9 +17,7 @@
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.code16gcc
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.text
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.globl memcpy
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.type memcpy, @function
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memcpy:
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GLOBAL(memcpy)
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pushw %si
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pushw %di
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movw %ax, %di
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@ -31,11 +31,9 @@ memcpy:
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popw %di
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popw %si
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ret
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.size memcpy, .-memcpy
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ENDPROC(memcpy)
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.globl memset
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.type memset, @function
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memset:
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GLOBAL(memset)
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pushw %di
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movw %ax, %di
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movzbl %dl, %eax
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@ -48,52 +46,42 @@ memset:
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rep; stosb
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popw %di
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ret
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.size memset, .-memset
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ENDPROC(memset)
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.globl copy_from_fs
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.type copy_from_fs, @function
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copy_from_fs:
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GLOBAL(copy_from_fs)
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pushw %ds
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pushw %fs
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popw %ds
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call memcpy
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popw %ds
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ret
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.size copy_from_fs, .-copy_from_fs
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ENDPROC(copy_from_fs)
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.globl copy_to_fs
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.type copy_to_fs, @function
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copy_to_fs:
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GLOBAL(copy_to_fs)
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pushw %es
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pushw %fs
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popw %es
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call memcpy
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popw %es
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ret
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.size copy_to_fs, .-copy_to_fs
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ENDPROC(copy_to_fs)
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#if 0 /* Not currently used, but can be enabled as needed */
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.globl copy_from_gs
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.type copy_from_gs, @function
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copy_from_gs:
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GLOBAL(copy_from_gs)
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pushw %ds
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pushw %gs
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popw %ds
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call memcpy
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popw %ds
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ret
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.size copy_from_gs, .-copy_from_gs
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.globl copy_to_gs
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ENDPROC(copy_from_gs)
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.type copy_to_gs, @function
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copy_to_gs:
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GLOBAL(copy_to_gs)
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pushw %es
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pushw %gs
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popw %es
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call memcpy
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popw %es
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ret
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.size copy_to_gs, .-copy_to_gs
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ENDPROC(copy_to_gs)
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#endif
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|
@ -19,7 +19,7 @@
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#include <linux/utsrelease.h>
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#include <asm/boot.h>
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#include <asm/e820.h>
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#include <asm/page.h>
|
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#include <asm/page_types.h>
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#include <asm/setup.h>
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#include "boot.h"
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#include "offsets.h"
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|
@ -15,18 +15,15 @@
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#include <asm/boot.h>
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#include <asm/processor-flags.h>
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#include <asm/segment.h>
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#include <linux/linkage.h>
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.text
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.globl protected_mode_jump
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.type protected_mode_jump, @function
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.code16
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/*
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* void protected_mode_jump(u32 entrypoint, u32 bootparams);
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*/
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protected_mode_jump:
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GLOBAL(protected_mode_jump)
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movl %edx, %esi # Pointer to boot_params table
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xorl %ebx, %ebx
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@ -47,12 +44,10 @@ protected_mode_jump:
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.byte 0x66, 0xea # ljmpl opcode
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2: .long in_pm32 # offset
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.word __BOOT_CS # segment
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.size protected_mode_jump, .-protected_mode_jump
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ENDPROC(protected_mode_jump)
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.code32
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.type in_pm32, @function
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in_pm32:
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GLOBAL(in_pm32)
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# Set up data segments for flat 32-bit mode
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movl %ecx, %ds
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movl %ecx, %es
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@ -78,5 +73,4 @@ in_pm32:
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lldt %cx
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jmpl *%eax # Jump to the 32-bit entrypoint
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.size in_pm32, .-in_pm32
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ENDPROC(in_pm32)
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|
@ -124,10 +124,15 @@ static inline void *phys_to_virt(phys_addr_t address)
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/*
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* ISA I/O bus memory addresses are 1:1 with the physical address.
|
||||
* However, we truncate the address to unsigned int to avoid undesirable
|
||||
* promitions in legacy drivers.
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*/
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#define isa_virt_to_bus (unsigned long)virt_to_phys
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#define isa_page_to_bus page_to_phys
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#define isa_bus_to_virt phys_to_virt
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static inline unsigned int isa_virt_to_bus(volatile void *address)
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{
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return (unsigned int)virt_to_phys(address);
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}
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#define isa_page_to_bus(page) ((unsigned int)page_to_phys(page))
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#define isa_bus_to_virt phys_to_virt
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/*
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* However PCI ones are not necessarily 1:1 and therefore these interfaces
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|
@ -52,70 +52,14 @@
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#endif
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#define GLOBAL(name) \
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.globl name; \
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name:
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#ifdef CONFIG_X86_ALIGNMENT_16
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#define __ALIGN .align 16,0x90
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#define __ALIGN_STR ".align 16,0x90"
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#endif
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/*
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* to check ENTRY_X86/END_X86 and
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* KPROBE_ENTRY_X86/KPROBE_END_X86
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* unbalanced-missed-mixed appearance
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*/
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#define __set_entry_x86 .set ENTRY_X86_IN, 0
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#define __unset_entry_x86 .set ENTRY_X86_IN, 1
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#define __set_kprobe_x86 .set KPROBE_X86_IN, 0
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#define __unset_kprobe_x86 .set KPROBE_X86_IN, 1
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#define __macro_err_x86 .error "ENTRY_X86/KPROBE_X86 unbalanced,missed,mixed"
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#define __check_entry_x86 \
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.ifdef ENTRY_X86_IN; \
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.ifeq ENTRY_X86_IN; \
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__macro_err_x86; \
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.abort; \
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.endif; \
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.endif
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#define __check_kprobe_x86 \
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.ifdef KPROBE_X86_IN; \
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.ifeq KPROBE_X86_IN; \
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__macro_err_x86; \
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.abort; \
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.endif; \
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.endif
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#define __check_entry_kprobe_x86 \
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__check_entry_x86; \
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__check_kprobe_x86
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#define ENTRY_KPROBE_FINAL_X86 __check_entry_kprobe_x86
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#define ENTRY_X86(name) \
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__check_entry_kprobe_x86; \
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__set_entry_x86; \
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.globl name; \
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__ALIGN; \
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name:
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#define END_X86(name) \
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__unset_entry_x86; \
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__check_entry_kprobe_x86; \
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.size name, .-name
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#define KPROBE_ENTRY_X86(name) \
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__check_entry_kprobe_x86; \
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__set_kprobe_x86; \
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.pushsection .kprobes.text, "ax"; \
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.globl name; \
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__ALIGN; \
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name:
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#define KPROBE_END_X86(name) \
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__unset_kprobe_x86; \
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__check_entry_kprobe_x86; \
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.size name, .-name; \
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.popsection
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#endif /* _ASM_X86_LINKAGE_H */
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|
@ -33,12 +33,10 @@
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/* 44=32+12, the limit we can fit into an unsigned long pfn */
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#define __PHYSICAL_MASK_SHIFT 44
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#define __VIRTUAL_MASK_SHIFT 32
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#define PAGETABLE_LEVELS 3
|
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|
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#else /* !CONFIG_X86_PAE */
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#define __PHYSICAL_MASK_SHIFT 32
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#define __VIRTUAL_MASK_SHIFT 32
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#define PAGETABLE_LEVELS 2
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#endif /* CONFIG_X86_PAE */
|
||||
|
||||
#ifndef __ASSEMBLY__
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|
@ -1,8 +1,6 @@
|
||||
#ifndef _ASM_X86_PAGE_64_DEFS_H
|
||||
#define _ASM_X86_PAGE_64_DEFS_H
|
||||
|
||||
#define PAGETABLE_LEVELS 4
|
||||
|
||||
#define THREAD_ORDER 1
|
||||
#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
|
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#define CURRENT_MASK (~(THREAD_SIZE - 1))
|
||||
|
@ -16,12 +16,6 @@
|
||||
(ie, 32-bit PAE). */
|
||||
#define PHYSICAL_PAGE_MASK (((signed long)PAGE_MASK) & __PHYSICAL_MASK)
|
||||
|
||||
/* PTE_PFN_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */
|
||||
#define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK)
|
||||
|
||||
/* PTE_FLAGS_MASK extracts the flags from a (pte|pmd|pud|pgd)val_t */
|
||||
#define PTE_FLAGS_MASK (~PTE_PFN_MASK)
|
||||
|
||||
#define PMD_PAGE_SIZE (_AC(1, UL) << PMD_SHIFT)
|
||||
#define PMD_PAGE_MASK (~(PMD_PAGE_SIZE-1))
|
||||
|
||||
|
@ -17,6 +17,7 @@ typedef union {
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#define SHARED_KERNEL_PMD 0
|
||||
#define PAGETABLE_LEVELS 2
|
||||
|
||||
/*
|
||||
* traditional i386 two-level paging structure:
|
||||
@ -25,6 +26,7 @@ typedef union {
|
||||
#define PGDIR_SHIFT 22
|
||||
#define PTRS_PER_PGD 1024
|
||||
|
||||
|
||||
/*
|
||||
* the i386 is two-level, so we don't really have any
|
||||
* PMD directory physically.
|
||||
|
@ -24,6 +24,8 @@ typedef union {
|
||||
#define SHARED_KERNEL_PMD 1
|
||||
#endif
|
||||
|
||||
#define PAGETABLE_LEVELS 3
|
||||
|
||||
/*
|
||||
* PGDIR_SHIFT determines what a top-level page table entry can map
|
||||
*/
|
||||
|
@ -18,6 +18,7 @@ typedef struct { pteval_t pte; } pte_t;
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#define SHARED_KERNEL_PMD 0
|
||||
#define PAGETABLE_LEVELS 4
|
||||
|
||||
/*
|
||||
* PGDIR_SHIFT determines what a top-level page table entry can map
|
||||
|
@ -173,6 +173,12 @@
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
/* PTE_PFN_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */
|
||||
#define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK)
|
||||
|
||||
/* PTE_FLAGS_MASK extracts the flags from a (pte|pmd|pud|pgd)val_t */
|
||||
#define PTE_FLAGS_MASK (~PTE_PFN_MASK)
|
||||
|
||||
typedef struct pgprot { pgprotval_t pgprot; } pgprot_t;
|
||||
|
||||
typedef struct { pgdval_t pgd; } pgd_t;
|
||||
|
@ -403,7 +403,6 @@ DECLARE_PER_CPU(unsigned long, stack_canary);
|
||||
#endif
|
||||
#endif /* X86_64 */
|
||||
|
||||
extern void print_cpu_info(struct cpuinfo_x86 *);
|
||||
extern unsigned int xstate_size;
|
||||
extern void free_thread_xstate(struct task_struct *);
|
||||
extern struct kmem_cache *task_xstate_cachep;
|
||||
|
@ -82,7 +82,7 @@ asmlinkage long sys_iopl(unsigned int, struct pt_regs *);
|
||||
/* kernel/signal_64.c */
|
||||
asmlinkage long sys_sigaltstack(const stack_t __user *, stack_t __user *,
|
||||
struct pt_regs *);
|
||||
asmlinkage long sys_rt_sigreturn(struct pt_regs *);
|
||||
long sys_rt_sigreturn(struct pt_regs *);
|
||||
|
||||
/* kernel/sys_x86_64.c */
|
||||
asmlinkage long sys_mmap(unsigned long, unsigned long, unsigned long,
|
||||
|
@ -3,8 +3,8 @@
|
||||
*/
|
||||
#include <asm/segment.h>
|
||||
#include <asm/msr-index.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/page_types.h>
|
||||
#include <asm/pgtable_types.h>
|
||||
#include <asm/processor-flags.h>
|
||||
|
||||
.code16
|
||||
|
@ -1,7 +1,7 @@
|
||||
.section .text.page_aligned
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/segment.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/page_types.h>
|
||||
|
||||
# Copyright 2003, 2008 Pavel Machek <pavel@suse.cz>, distribute under GPLv2
|
||||
|
||||
|
@ -1,8 +1,8 @@
|
||||
.text
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/segment.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/pgtable_types.h>
|
||||
#include <asm/page_types.h>
|
||||
#include <asm/msr.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
|
||||
|
@ -204,12 +204,12 @@ static int eps_cpu_init(struct cpufreq_policy *policy)
|
||||
}
|
||||
/* Enable Enhanced PowerSaver */
|
||||
rdmsrl(MSR_IA32_MISC_ENABLE, val);
|
||||
if (!(val & 1 << 16)) {
|
||||
val |= 1 << 16;
|
||||
if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
|
||||
val |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP;
|
||||
wrmsrl(MSR_IA32_MISC_ENABLE, val);
|
||||
/* Can be locked at 0 */
|
||||
rdmsrl(MSR_IA32_MISC_ENABLE, val);
|
||||
if (!(val & 1 << 16)) {
|
||||
if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
|
||||
printk(KERN_INFO "eps: Can't enable Enhanced PowerSaver\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
@ -390,14 +390,14 @@ static int centrino_cpu_init(struct cpufreq_policy *policy)
|
||||
enable it if not. */
|
||||
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
|
||||
|
||||
if (!(l & (1<<16))) {
|
||||
l |= (1<<16);
|
||||
if (!(l & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
|
||||
l |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP;
|
||||
dprintk("trying to enable Enhanced SpeedStep (%x)\n", l);
|
||||
wrmsr(MSR_IA32_MISC_ENABLE, l, h);
|
||||
|
||||
/* check to see if it stuck */
|
||||
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
|
||||
if (!(l & (1<<16))) {
|
||||
if (!(l & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
|
||||
printk(KERN_INFO PFX
|
||||
"couldn't enable Enhanced SpeedStep\n");
|
||||
return -ENODEV;
|
||||
|
@ -146,10 +146,10 @@ static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
|
||||
*/
|
||||
if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_mask == 1)) {
|
||||
rdmsr(MSR_IA32_MISC_ENABLE, lo, hi);
|
||||
if ((lo & (1<<9)) == 0) {
|
||||
if ((lo & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE) == 0) {
|
||||
printk (KERN_INFO "CPU: C0 stepping P4 Xeon detected.\n");
|
||||
printk (KERN_INFO "CPU: Disabling hardware prefetching (Errata 037)\n");
|
||||
lo |= (1<<9); /* Disable hw prefetching */
|
||||
lo |= MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE;
|
||||
wrmsr (MSR_IA32_MISC_ENABLE, lo, hi);
|
||||
}
|
||||
}
|
||||
|
@ -49,13 +49,13 @@ static void __cpuinit intel_init_thermal(struct cpuinfo_x86 *c)
|
||||
*/
|
||||
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
|
||||
h = apic_read(APIC_LVTTHMR);
|
||||
if ((l & (1 << 3)) && (h & APIC_DM_SMI)) {
|
||||
if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
|
||||
printk(KERN_DEBUG
|
||||
"CPU%d: Thermal monitoring handled by SMI\n", cpu);
|
||||
return;
|
||||
}
|
||||
|
||||
if (cpu_has(c, X86_FEATURE_TM2) && (l & (1 << 13)))
|
||||
if (cpu_has(c, X86_FEATURE_TM2) && (l & MSR_IA32_MISC_ENABLE_TM2))
|
||||
tm2 = 1;
|
||||
|
||||
if (h & APIC_VECTOR_MASK) {
|
||||
@ -73,7 +73,7 @@ static void __cpuinit intel_init_thermal(struct cpuinfo_x86 *c)
|
||||
wrmsr(MSR_IA32_THERM_INTERRUPT, l | 0x03, h);
|
||||
|
||||
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
|
||||
wrmsr(MSR_IA32_MISC_ENABLE, l | (1 << 3), h);
|
||||
wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);
|
||||
|
||||
l = apic_read(APIC_LVTTHMR);
|
||||
apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
|
||||
|
@ -85,7 +85,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c)
|
||||
*/
|
||||
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
|
||||
h = apic_read(APIC_LVTTHMR);
|
||||
if ((l & (1<<3)) && (h & APIC_DM_SMI)) {
|
||||
if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
|
||||
printk(KERN_DEBUG "CPU%d: Thermal monitoring handled by SMI\n",
|
||||
cpu);
|
||||
return; /* -EBUSY */
|
||||
@ -111,7 +111,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c)
|
||||
vendor_thermal_interrupt = intel_thermal_interrupt;
|
||||
|
||||
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
|
||||
wrmsr(MSR_IA32_MISC_ENABLE, l | (1<<3), h);
|
||||
wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);
|
||||
|
||||
l = apic_read(APIC_LVTTHMR);
|
||||
apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
|
||||
|
@ -6,7 +6,7 @@
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/page_types.h>
|
||||
|
||||
/*
|
||||
* efi_call_phys(void *, ...) is a function with variable parameters.
|
||||
|
@ -47,7 +47,7 @@
|
||||
#include <asm/errno.h>
|
||||
#include <asm/segment.h>
|
||||
#include <asm/smp.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/page_types.h>
|
||||
#include <asm/desc.h>
|
||||
#include <asm/percpu.h>
|
||||
#include <asm/dwarf2.h>
|
||||
|
@ -48,7 +48,7 @@
|
||||
#include <asm/unistd.h>
|
||||
#include <asm/thread_info.h>
|
||||
#include <asm/hw_irq.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/page_types.h>
|
||||
#include <asm/irqflags.h>
|
||||
#include <asm/paravirt.h>
|
||||
#include <asm/ftrace.h>
|
||||
|
@ -11,8 +11,8 @@
|
||||
#include <linux/init.h>
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/segment.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/page_types.h>
|
||||
#include <asm/pgtable_types.h>
|
||||
#include <asm/desc.h>
|
||||
#include <asm/cache.h>
|
||||
#include <asm/thread_info.h>
|
||||
|
@ -7,7 +7,7 @@
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/page_types.h>
|
||||
#include <asm/kexec.h>
|
||||
#include <asm/processor-flags.h>
|
||||
|
||||
|
@ -7,10 +7,10 @@
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/page_types.h>
|
||||
#include <asm/kexec.h>
|
||||
#include <asm/processor-flags.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/pgtable_types.h>
|
||||
|
||||
/*
|
||||
* Must be relocatable PIC code callable as a C function
|
||||
|
@ -29,7 +29,7 @@
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/segment.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/page_types.h>
|
||||
|
||||
/* We can free up trampoline after bootup if cpu hotplug is not supported. */
|
||||
#ifndef CONFIG_HOTPLUG_CPU
|
||||
|
@ -25,8 +25,8 @@
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/pgtable_types.h>
|
||||
#include <asm/page_types.h>
|
||||
#include <asm/msr.h>
|
||||
#include <asm/segment.h>
|
||||
#include <asm/processor-flags.h>
|
||||
|
@ -12,7 +12,7 @@
|
||||
|
||||
#include <asm-generic/vmlinux.lds.h>
|
||||
#include <asm/thread_info.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/page_types.h>
|
||||
#include <asm/cache.h>
|
||||
#include <asm/boot.h>
|
||||
|
||||
|
@ -6,7 +6,7 @@
|
||||
|
||||
#include <asm-generic/vmlinux.lds.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/page_types.h>
|
||||
|
||||
#undef i386 /* in case the preprocessor is a 32bit one */
|
||||
|
||||
|
@ -28,7 +28,7 @@
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/dwarf2.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/page_types.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/thread_info.h>
|
||||
|
@ -8,7 +8,7 @@
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/segment.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/page_types.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/processor-flags.h>
|
||||
|
||||
|
@ -18,7 +18,7 @@
|
||||
.text
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/segment.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/page_types.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
#include <asm/processor-flags.h>
|
||||
|
||||
|
@ -8,7 +8,7 @@
|
||||
|
||||
#include <asm/boot.h>
|
||||
#include <asm/asm.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/page_types.h>
|
||||
|
||||
#include <xen/interface/elfnote.h>
|
||||
#include <asm/xen/interface.h>
|
||||
|
Loading…
Reference in New Issue
Block a user