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clk: samsung: exynos4: Correct SRC_MFC register

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The SRC_MFC register offset was incorrect, which could cause have caused
wrong calculation of rate of sclk_mfc clock, that could in turn lead to
incorrect operation of MFC. This patch corrects it.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
[t.figa: Updated patch description]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
This commit is contained in:
Seung-Woo Kim 2013-11-22 14:21:08 +09:00 committed by Tomasz Figa
parent 6ce4eac1f6
commit 5fdd1b56be
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/samsung/clk-exynos4.c
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@ -39,7 +39,7 @@
#define SRC_TOP1 0xc214
#define SRC_CAM 0xc220
#define SRC_TV 0xc224
#define SRC_MFC 0xcc28
#define SRC_MFC 0xc228
#define SRC_G3D 0xc22c
#define E4210_SRC_IMAGE 0xc230
#define SRC_LCD0 0xc234