Minki/linux
1
0
Fork 1
mirror of https://github.com/torvalds/linux.git synced 2025-01-01 07:42:07 +00:00
Code Issues Packages Projects Releases Wiki Activity

For mt8173:

Browse Source 
- set mm_sel clock to 400 MHz to support 4K HDMI
 - adjust power efficiency between the little and big cores
 - add a node for thermal calibration via e-fuse data
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAliIjQgXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00PWjg//WVJsbVGXUcHGHmSOTNGjdAYR
 FB5ybdXDMyPhXLrUoY6xN0aCidXPTgv9gbLW37EWBlpGy+LAQN5ssMZMuEZeYJyb
 xR8yKrU+bcgQlwQrn3F35nJx7Eoh8T47dW2+C0ftzQxl0ZQirkmm9QnMg3/7xQ89
 LpA+Opqq3GkHG2Q2HTgpRqPaI3LZ/aZuWBtqhjxl0lYi+E2liA1cbvzIIeA3Uz+9
 rR+vlfQEG4CW9GnHDaLtg4Ad68YNlTQ7kU1070uwlpELwPAOV0SgxL1q0IBwj1WB
 FaTnfx5wFya8FZIPrnI+Dk1X1fDdkLZ16Cq+b3hBixiwLOs0XuLTAj/zMOoDLFcE
 vcyfRgFVbYo3ju+iQAZ49vt+OwDLjrCEGxO8XONT2bUN+3MW6EB0rKQC/uhO4vp7
 kEdJowUElvmDfnFqaAaWg8mrXzL+h/8y6SW1JT4pxTJpfXem3RnAiNywwrExdN5a
 9bj7WhJtA9t39wXkmdIAVQbIkGLwrks1TXaGoDPuuj21+Jzm+3uGZL4EyQU6TUA1
 jC04/5eBRVaA7JmU+/iegGdgaoyNs9PMhrjCUct6U3F2qvkRggAPnF9Eyj8stei6
 +kzRjhAup8exKHYUXTxROutngW7K93RpbMtsIDiiib4mKm3HueVMJEY5cJPW/yap
 4MttR/dH/W5PjTjkEVo=
 =hboI
 -----END PGP SIGNATURE-----

Merge tag 'v4.10-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt64

For mt8173:
- set mm_sel clock to 400 MHz to support 4K HDMI
- adjust power efficiency between the little and big cores
- add a node for thermal calibration via e-fuse data

* tag 'v4.10-next-dts' of https://github.com/mbgg/linux-mediatek:
  arm64: dts: mt8173: add node for thermal calibration
  arm64: dts: mt8173: Fix cpu_thermal cooling-maps contributions
  arm64: dts: mt8173: add mmsel clocks for 4K support

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2017-01-29 17:21:10 -08:00
commit 5ee3dd850c
1 changed files with 11 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
arch/arm64/boot/dts/mediatek/mt8173.dtsi
View File

@ -182,12 +182,12 @@
map@0 {
trip = <&target>;
cooling-device = <&cpu0 0 0>;
contribution = <1024>;
contribution = <3072>;
};
map@1 {
trip = <&target>;
cooling-device = <&cpu2 0 0>;
contribution = <2048>;
contribution = <1024>;
};
};
};
@ -401,6 +401,11 @@
efuse: efuse@10206000 {
compatible = "mediatek,mt8173-efuse";
reg = <0 0x10206000 0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
thermal_calibration: calib@528 {
reg = <0x528 0xc>;
};
};
apmixedsys: clock-controller@10209000 {
@ -574,6 +579,8 @@
resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
mediatek,auxadc = <&auxadc>;
mediatek,apmixedsys = <&apmixedsys>;
nvmem-cells = <&thermal_calibration>;
nvmem-cell-names = "calibration-data";
};
nor_flash: spi@1100d000 {
@ -778,6 +785,8 @@
compatible = "mediatek,mt8173-mmsys", "syscon";
reg = <0 0x14000000 0 0x1000>;
power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
assigned-clocks = <&topckgen CLK_TOP_MM_SEL>;
assigned-clock-rates = <400000000>;
#clock-cells = <1>;
};