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clk: mvebu: armada-370: Fix timer drift caused by the SSCG deviation

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This commit activates the SSCG deviation correction for the Armada
370. It uses the optional function introduced by the commit "clk:
mvebu: Fix clk frequency value if SSCG is enabled".

Without this fix the deviation measured on a Mirabox was of a few
second each hour, whereas with this fix it was reduced at around
50ppm (around 4s per day).

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Leigh Brown <leigh@solinno.co.uk>
Link: https://lkml.kernel.org/r/1409645719-20003-3-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
Gregory CLEMENT 2014-09-02 10:15:17 +02:00 committed by Jason Cooper
parent 15917b1602
commit 5e1a63f5f5
1 changed files with 8 additions and 0 deletions
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8
drivers/clk/mvebu/armada-370.c
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@ -23,6 +23,7 @@
*/
#define SARL 0 /* Low part [0:31] */
#define SARL_A370_SSCG_ENABLE BIT(10)
#define SARL_A370_PCLK_FREQ_OPT 11
#define SARL_A370_PCLK_FREQ_OPT_MASK 0xF
#define SARL_A370_FAB_FREQ_OPT 15
@ -133,10 +134,17 @@ static void __init a370_get_clk_ratio(
}
}
static bool a370_is_sscg_enabled(void __iomem *sar)
{
return !(readl(sar) & SARL_A370_SSCG_ENABLE);
}
static const struct coreclk_soc_desc a370_coreclks = {
.get_tclk_freq = a370_get_tclk_freq,
.get_cpu_freq = a370_get_cpu_freq,
.get_clk_ratio = a370_get_clk_ratio,
.is_sscg_enabled = a370_is_sscg_enabled,
.fix_sscg_deviation = kirkwood_fix_sscg_deviation,
.ratios = a370_coreclk_ratios,
.num_ratios = ARRAY_SIZE(a370_coreclk_ratios),
};