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ARM: dts: at91: fixes uart pinctrl, set pullup on rx, clear pullup on tx
Remove pullup on uart TX signals, they are push-pull outputs thus pullups are pointless. Add pullup on uart RX signals, they prevent the RX signals to be left floating and so consuming a useless extra amount of power in crowbarred state if nothing is connected to RX. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This commit is contained in:
parent
e8fd0adf10
commit
5e04822f7d
@ -511,8 +511,8 @@
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uart1 {
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pinctrl_uart1: uart1-0 {
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atmel,pins =
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<AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB20 periph A with pullup */
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AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
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<AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_uart1_rts: uart1_rts-0 {
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@ -545,8 +545,8 @@
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uart2 {
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pinctrl_uart2: uart2-0 {
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atmel,pins =
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<AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA22 periph A */
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AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
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<AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
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AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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pinctrl_uart2_rts: uart2_rts-0 {
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@ -563,8 +563,8 @@
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uart3 {
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pinctrl_uart3: uart3-0 {
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atmel,pins =
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<AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
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AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA6 periph B */
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<AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE
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AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_uart3_rts: uart3_rts-0 {
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@ -468,8 +468,8 @@
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usart1 {
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pinctrl_usart1: usart1-0 {
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atmel,pins =
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<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
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AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
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<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart1_rts: usart1_rts-0 {
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@ -486,8 +486,8 @@
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usart2 {
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pinctrl_usart2: usart2-0 {
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atmel,pins =
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<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */
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AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */
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<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart2_rts: usart2_rts-0 {
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@ -504,8 +504,8 @@
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usart3 {
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pinctrl_usart3: usart3-0 {
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atmel,pins =
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<AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */
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AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
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<AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart3_rts: usart3_rts-0 {
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@ -522,16 +522,16 @@
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uart0 {
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pinctrl_uart0: uart0-0 {
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atmel,pins =
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<AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */
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AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
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<AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE
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AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
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};
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};
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uart1 {
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pinctrl_uart1: uart1-0 {
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atmel,pins =
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<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */
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AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
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<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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};
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@ -328,8 +328,8 @@
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usart0 {
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pinctrl_usart0: usart0-0 {
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atmel,pins =
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<AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
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<AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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<AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
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<AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart0_rts: usart0_rts-0 {
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@ -346,8 +346,8 @@
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usart1 {
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pinctrl_usart1: usart1-0 {
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atmel,pins =
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<AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
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<AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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<AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
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<AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart1_rts: usart1_rts-0 {
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@ -364,8 +364,8 @@
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usart2 {
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pinctrl_usart2: usart2-0 {
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atmel,pins =
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<AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
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<AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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<AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
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<AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart2_rts: usart2_rts-0 {
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@ -437,8 +437,8 @@
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usart0 {
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pinctrl_usart0: usart0-0 {
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atmel,pins =
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<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */
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AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
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<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart0_rts: usart0_rts-0 {
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@ -455,8 +455,8 @@
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usart1 {
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pinctrl_usart1: usart1-0 {
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atmel,pins =
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<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
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AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */
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<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart1_rts: usart1_rts-0 {
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@ -473,8 +473,8 @@
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usart2 {
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pinctrl_usart2: usart2-0 {
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atmel,pins =
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<AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
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AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */
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<AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart2_rts: usart2_rts-0 {
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@ -555,8 +555,8 @@
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usart0 {
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pinctrl_usart0: usart0-0 {
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atmel,pins =
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<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */
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AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
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<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart0_rts: usart0_rts-0 {
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@ -573,8 +573,8 @@
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uart1 {
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pinctrl_usart1: usart1-0 {
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atmel,pins =
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<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
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AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
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<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart1_rts: usart1_rts-0 {
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@ -591,8 +591,8 @@
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usart2 {
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pinctrl_usart2: usart2-0 {
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atmel,pins =
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<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
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AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
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<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart2_rts: usart2_rts-0 {
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@ -609,8 +609,8 @@
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usart3 {
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pinctrl_usart3: usart3-0 {
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atmel,pins =
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<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
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AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
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<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart3_rts: usart3_rts-0 {
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@ -641,8 +641,8 @@
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uart1 {
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pinctrl_uart1: uart1-0 {
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atmel,pins =
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<AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC17 periph C with pullup */
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AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC16 periph C */
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<AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE
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AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;
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};
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};
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@ -720,8 +720,8 @@
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usart1 {
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pinctrl_usart1: usart1-0 {
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atmel,pins =
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<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
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<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
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<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart1_rts: usart1_rts-0 {
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@ -743,8 +743,8 @@
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usart2 {
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pinctrl_usart2: usart2-0 {
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atmel,pins =
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<AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
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<AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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<AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>,
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<AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart2_rts: usart2_rts-0 {
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@ -766,8 +766,8 @@
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usart3 {
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pinctrl_usart3: usart3-0 {
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atmel,pins =
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<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
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<AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
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<AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart3_rts: usart3_rts-0 {
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@ -520,8 +520,8 @@
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usart0 {
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pinctrl_usart0: usart0-0 {
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atmel,pins =
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<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
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AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA1 periph A */
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<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart0_rts: usart0_rts-0 {
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@ -543,8 +543,8 @@
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usart1 {
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pinctrl_usart1: usart1-0 {
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atmel,pins =
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<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
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AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
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<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart1_rts: usart1_rts-0 {
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@ -566,8 +566,8 @@
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usart2 {
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pinctrl_usart2: usart2-0 {
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atmel,pins =
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<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
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AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
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<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart2_rts: usart2_rts-0 {
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@ -21,8 +21,8 @@
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usart3 {
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pinctrl_usart3: usart3-0 {
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atmel,pins =
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<AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */
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AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */
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<AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE
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AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usart3_rts: usart3_rts-0 {
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@ -861,24 +861,24 @@
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uart0 {
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pinctrl_uart0: uart0-0 {
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atmel,pins =
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<AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* conflicts with PWMFI2, ISI_D8 */
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AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* conflicts with ISI_PCK */
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<AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with PWMFI2, ISI_D8 */
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AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */
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};
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};
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uart1 {
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pinctrl_uart1: uart1-0 {
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atmel,pins =
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<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* conflicts with TWD0, ISI_VSYNC */
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AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* conflicts with TWCK0, ISI_HSYNC */
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<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with TWD0, ISI_VSYNC */
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AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */
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};
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};
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usart0 {
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pinctrl_usart0: usart0-0 {
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atmel,pins =
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<AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
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AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
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<AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
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AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
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@ -891,8 +891,8 @@
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usart1 {
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pinctrl_usart1: usart1-0 {
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atmel,pins =
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<AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
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AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
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<AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
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AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
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@ -905,8 +905,8 @@
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usart2 {
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pinctrl_usart2: usart2-0 {
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atmel,pins =
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<AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
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AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
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||||
<AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A25 */
|
||||
AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts NCS0 */
|
||||
};
|
||||
|
||||
pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
|
||||
@ -919,8 +919,8 @@
|
||||
usart3 {
|
||||
pinctrl_usart3: usart3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
|
||||
AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
|
||||
<AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A18 */
|
||||
AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with A19 */
|
||||
};
|
||||
|
||||
pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
|
||||
|
@ -23,16 +23,16 @@
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */
|
||||
AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC30 periph A with pullup, conflicts with ISI_PCK */
|
||||
<AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with PWMFI2, ISI_D8 */
|
||||
AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */
|
||||
AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */
|
||||
<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with TWD0, ISI_VSYNC */
|
||||
AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -1926,8 +1926,8 @@
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */
|
||||
AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */
|
||||
<AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
|
||||
AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
@ -1935,8 +1935,8 @@
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_NONE /* RXD */
|
||||
AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* TXD */
|
||||
<AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* RXD */
|
||||
AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE /* TXD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
@ -1944,8 +1944,8 @@
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* RXD */
|
||||
AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* TXD */
|
||||
<AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
|
||||
AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */
|
||||
>;
|
||||
};
|
||||
pinctrl_usart0_rts: usart0_rts-0 {
|
||||
@ -1959,8 +1959,8 @@
|
||||
usart1 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* RXD */
|
||||
AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* TXD */
|
||||
<AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
|
||||
AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */
|
||||
>;
|
||||
};
|
||||
pinctrl_usart1_rts: usart1_rts-0 {
|
||||
@ -1974,8 +1974,8 @@
|
||||
usart2 {
|
||||
pinctrl_usart2: usart2-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD - conflicts with G0_CRS, ISI_HSYNC */
|
||||
AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD - conflicts with G0_COL, PCK2 */
|
||||
<AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD - conflicts with G0_CRS, ISI_HSYNC */
|
||||
AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD - conflicts with G0_COL, PCK2 */
|
||||
>;
|
||||
};
|
||||
pinctrl_usart2_rts: usart2_rts-0 {
|
||||
@ -1989,8 +1989,8 @@
|
||||
usart3 {
|
||||
pinctrl_usart3: usart3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */
|
||||
AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */
|
||||
<AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
|
||||
AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
@ -1998,8 +1998,8 @@
|
||||
usart4 {
|
||||
pinctrl_usart4: usart4-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */
|
||||
AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */
|
||||
<AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
|
||||
AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
|
||||
>;
|
||||
};
|
||||
pinctrl_usart4_rts: usart4_rts-0 {
|
||||
|
Loading…
Reference in New Issue
Block a user