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drm/radeon: switch IGP gart to use radeon_write_agp_base()
Signed-off-by: Dave Airlie <airlied@redhat.com>
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parent
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@ -127,6 +127,9 @@ static void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)
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} else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) {
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R500_WRITE_MCIND(R520_MC_AGP_BASE, agp_base_lo);
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R500_WRITE_MCIND(R520_MC_AGP_BASE_2, agp_base_hi);
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} else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480) {
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RADEON_WRITE(RADEON_AGP_BASE, agp_base_lo);
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RADEON_WRITE(RS480_AGP_BASE_2, 0);
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} else {
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RADEON_WRITE(RADEON_AGP_BASE, agp_base_lo);
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R200)
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@ -741,14 +744,7 @@ static void radeon_set_igpgart(drm_radeon_private_t * dev_priv, int on)
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IGP_WRITE_MCIND(RS480_AGP_MODE_CNTL, ((1 << RS480_REQ_TYPE_SNOOP_SHIFT) |
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RS480_REQ_TYPE_SNOOP_DIS));
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if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) {
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IGP_WRITE_MCIND(RS690_MC_AGP_BASE,
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(unsigned int)dev_priv->gart_vm_start);
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IGP_WRITE_MCIND(RS690_MC_AGP_BASE_2, 0);
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} else {
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RADEON_WRITE(RADEON_AGP_BASE, (unsigned int)dev_priv->gart_vm_start);
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RADEON_WRITE(RS480_AGP_BASE_2, 0);
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}
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radeon_write_agp_base(dev_priv, dev_priv->gart_vm_start);
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dev_priv->gart_size = 32*1024*1024;
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temp = (((dev_priv->gart_vm_start - 1 + dev_priv->gart_size) &
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