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gpu: ipu-cpmem: set image base address even for incorrect formats
Otherwise, if the image base address is kept at zero, and if the user ignores the error return value, the IPU may be configured to write into the dma-apbh@00110000 region for large frames, which will lock up the system. Reported-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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@ -644,6 +644,7 @@ int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct ipu_image *image)
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{
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struct v4l2_pix_format *pix = &image->pix;
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int offset, u_offset, v_offset;
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int ret = 0;
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pr_debug("%s: resolution: %dx%d stride: %d\n",
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__func__, pix->width, pix->height,
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@ -720,13 +721,16 @@ int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct ipu_image *image)
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image->rect.top * pix->bytesperline;
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break;
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default:
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return -EINVAL;
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/* This should not happen */
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WARN_ON(1);
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offset = 0;
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ret = -EINVAL;
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}
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ipu_cpmem_set_buffer(ch, 0, image->phys0 + offset);
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ipu_cpmem_set_buffer(ch, 1, image->phys1 + offset);
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return 0;
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return ret;
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}
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EXPORT_SYMBOL_GPL(ipu_cpmem_set_image);
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