mirror of
https://github.com/torvalds/linux.git
synced 2024-11-07 04:32:03 +00:00
dts: vt8500: Populate missing PLL nodes
Add the missing devicetree nodes for PLL's found on the WM8505, WM8650 and WM8850 SoCs. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
This commit is contained in:
parent
7d4c6f3c5f
commit
5c2b0a8531
@ -81,6 +81,13 @@
|
||||
clock-frequency = <25000000>;
|
||||
};
|
||||
|
||||
plla: plla {
|
||||
#clock-cells = <0>;
|
||||
compatible = "via,vt8500-pll-clock";
|
||||
clocks = <&ref25>;
|
||||
reg = <0x200>;
|
||||
};
|
||||
|
||||
pllb: pllb {
|
||||
#clock-cells = <0>;
|
||||
compatible = "via,vt8500-pll-clock";
|
||||
@ -88,6 +95,20 @@
|
||||
reg = <0x204>;
|
||||
};
|
||||
|
||||
pllc: pllc {
|
||||
#clock-cells = <0>;
|
||||
compatible = "via,vt8500-pll-clock";
|
||||
clocks = <&ref25>;
|
||||
reg = <0x208>;
|
||||
};
|
||||
|
||||
plld: plld {
|
||||
#clock-cells = <0>;
|
||||
compatible = "via,vt8500-pll-clock";
|
||||
clocks = <&ref25>;
|
||||
reg = <0x20c>;
|
||||
};
|
||||
|
||||
clkuart0: uart0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "via,vt8500-device-clock";
|
||||
|
@ -92,6 +92,27 @@
|
||||
reg = <0x204>;
|
||||
};
|
||||
|
||||
pllc: pllc {
|
||||
#clock-cells = <0>;
|
||||
compatible = "wm,wm8650-pll-clock";
|
||||
clocks = <&ref25>;
|
||||
reg = <0x208>;
|
||||
};
|
||||
|
||||
plld: plld {
|
||||
#clock-cells = <0>;
|
||||
compatible = "wm,wm8650-pll-clock";
|
||||
clocks = <&ref25>;
|
||||
reg = <0x20c>;
|
||||
};
|
||||
|
||||
plle: plle {
|
||||
#clock-cells = <0>;
|
||||
compatible = "wm,wm8650-pll-clock";
|
||||
clocks = <&ref25>;
|
||||
reg = <0x210>;
|
||||
};
|
||||
|
||||
clkuart0: uart0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "via,vt8500-device-clock";
|
||||
|
@ -95,6 +95,41 @@
|
||||
reg = <0x204>;
|
||||
};
|
||||
|
||||
pllc: pllc {
|
||||
#clock-cells = <0>;
|
||||
compatible = "wm,wm8850-pll-clock";
|
||||
clocks = <&ref25>;
|
||||
reg = <0x208>;
|
||||
};
|
||||
|
||||
plld: plld {
|
||||
#clock-cells = <0>;
|
||||
compatible = "wm,wm8850-pll-clock";
|
||||
clocks = <&ref25>;
|
||||
reg = <0x20c>;
|
||||
};
|
||||
|
||||
plle: plle {
|
||||
#clock-cells = <0>;
|
||||
compatible = "wm,wm8850-pll-clock";
|
||||
clocks = <&ref25>;
|
||||
reg = <0x210>;
|
||||
};
|
||||
|
||||
pllf: pllf {
|
||||
#clock-cells = <0>;
|
||||
compatible = "wm,wm8850-pll-clock";
|
||||
clocks = <&ref25>;
|
||||
reg = <0x214>;
|
||||
};
|
||||
|
||||
pllg: pllg {
|
||||
#clock-cells = <0>;
|
||||
compatible = "wm,wm8850-pll-clock";
|
||||
clocks = <&ref25>;
|
||||
reg = <0x218>;
|
||||
};
|
||||
|
||||
clkuart0: uart0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "via,vt8500-device-clock";
|
||||
|
Loading…
Reference in New Issue
Block a user