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drm/radeon/kms: properly set num banks for fusion asics
Needed by userspace for 2D tiled buffer alignment Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -1933,8 +1933,12 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
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rdev->config.evergreen.tile_config |= (3 << 0);
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break;
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}
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rdev->config.evergreen.tile_config |=
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((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4;
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/* num banks is 8 on all fusion asics */
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if (rdev->flags & RADEON_IS_IGP)
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rdev->config.evergreen.tile_config |= 8 << 4;
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else
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rdev->config.evergreen.tile_config |=
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((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4;
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rdev->config.evergreen.tile_config |=
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((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT) << 8;
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rdev->config.evergreen.tile_config |=
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