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s390/mm,fault: improve readability by using teid union
Get rid of some magic numbers, and use the teid union and also some ptrace PSW defines to improve readability. Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
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@ -36,6 +36,8 @@
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#include <linux/kfence.h>
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#include <asm/asm-extable.h>
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#include <asm/asm-offsets.h>
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#include <asm/ptrace.h>
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#include <asm/fault.h>
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#include <asm/diag.h>
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#include <asm/gmap.h>
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#include <asm/irq.h>
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@ -43,8 +45,6 @@
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#include <asm/uv.h>
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#include "../kernel/entry.h"
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#define __FAIL_ADDR_MASK -4096L
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/*
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* Allocate private vm_fault_reason from top.
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* Please make sure it won't collide with vm_fault_reason.
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@ -76,11 +76,9 @@ early_initcall(fault_init);
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*/
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static enum fault_type get_fault_type(struct pt_regs *regs)
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{
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unsigned long trans_exc_code;
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union teid teid = { .val = regs->int_parm_long };
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trans_exc_code = regs->int_parm_long & 3;
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/* Primary address space */
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if (likely(trans_exc_code == 0)) {
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if (likely(teid.as == PSW_BITS_AS_PRIMARY)) {
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if (user_mode(regs))
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return USER_FAULT;
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if (!IS_ENABLED(CONFIG_PGSTE))
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@ -89,10 +87,10 @@ static enum fault_type get_fault_type(struct pt_regs *regs)
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return GMAP_FAULT;
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return KERNEL_FAULT;
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}
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if (trans_exc_code == 2)
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if (teid.as == PSW_BITS_AS_SECONDARY)
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return USER_FAULT;
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/* Access register mode, not used in the kernel */
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if (trans_exc_code == 1)
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if (teid.as == PSW_BITS_AS_ACCREG)
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return USER_FAULT;
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/* Home space -> access via kernel ASCE */
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return KERNEL_FAULT;
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@ -100,17 +98,17 @@ static enum fault_type get_fault_type(struct pt_regs *regs)
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static unsigned long get_fault_address(struct pt_regs *regs)
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{
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unsigned long trans_exc_code = regs->int_parm_long;
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union teid teid = { .val = regs->int_parm_long };
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return trans_exc_code & __FAIL_ADDR_MASK;
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return teid.addr * PAGE_SIZE;
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}
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static __always_inline bool fault_is_write(struct pt_regs *regs)
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{
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unsigned long trans_exc_code = regs->int_parm_long;
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union teid teid = { .val = regs->int_parm_long };
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if (static_branch_likely(&have_store_indication))
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return (trans_exc_code & 0xc00) == 0x400;
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return teid.fsi == TEID_FSI_STORE;
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return false;
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}
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@ -176,22 +174,23 @@ bad:
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static void dump_fault_info(struct pt_regs *regs)
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{
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union teid teid = { .val = regs->int_parm_long };
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unsigned long asce;
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pr_alert("Failing address: %016lx TEID: %016lx\n",
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get_fault_address(regs), regs->int_parm_long);
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get_fault_address(regs), teid.val);
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pr_alert("Fault in ");
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switch (regs->int_parm_long & 3) {
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case 3:
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switch (teid.as) {
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case PSW_BITS_AS_HOME:
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pr_cont("home space ");
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break;
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case 2:
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case PSW_BITS_AS_SECONDARY:
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pr_cont("secondary space ");
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break;
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case 1:
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case PSW_BITS_AS_ACCREG:
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pr_cont("access register ");
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break;
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case 0:
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case PSW_BITS_AS_PRIMARY:
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pr_cont("primary space ");
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break;
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}
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@ -497,11 +496,10 @@ out:
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void do_protection_exception(struct pt_regs *regs)
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{
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unsigned long trans_exc_code;
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union teid teid = { .val = regs->int_parm_long };
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vm_fault_t fault;
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int access;
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trans_exc_code = regs->int_parm_long;
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/*
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* Protection exceptions are suppressing, decrement psw address.
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* The exception to this rule are aborted transactions, for these
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@ -514,13 +512,12 @@ void do_protection_exception(struct pt_regs *regs)
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* as a special case because the translation exception code
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* field is not guaranteed to contain valid data in this case.
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*/
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if (unlikely(!(trans_exc_code & 4))) {
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if (unlikely(!teid.b61)) {
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do_low_address(regs);
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return;
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}
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if (unlikely(MACHINE_HAS_NX && (trans_exc_code & 0x80))) {
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regs->int_parm_long = (trans_exc_code & ~PAGE_MASK) |
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(regs->psw.addr & PAGE_MASK);
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if (unlikely(MACHINE_HAS_NX && teid.b56)) {
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regs->int_parm_long = (teid.addr * PAGE_SIZE) | (regs->psw.addr & PAGE_MASK);
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access = VM_EXEC;
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fault = VM_FAULT_BADACCESS;
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} else {
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@ -548,6 +545,7 @@ NOKPROBE_SYMBOL(do_dat_exception);
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void do_secure_storage_access(struct pt_regs *regs)
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{
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union teid teid = { .val = regs->int_parm_long };
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unsigned long addr = get_fault_address(regs);
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struct vm_area_struct *vma;
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struct mm_struct *mm;
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@ -561,8 +559,7 @@ void do_secure_storage_access(struct pt_regs *regs)
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* process. Bit 61 is not reliable without the misc UV feature,
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* therefore this needs to be checked too.
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*/
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if (uv_has_feature(BIT_UV_FEAT_MISC) &&
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!test_bit_inv(61, ®s->int_parm_long)) {
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if (uv_has_feature(BIT_UV_FEAT_MISC) && !teid.b61) {
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/*
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* When this happens, userspace did something that it
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* was not supposed to do, e.g. branching into secure
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