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synced 2024-10-31 17:21:49 +00:00
Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile
Pull tile updates from Chris Metcalf: "These are a smattering of minor changes from Tilera and other folks, mostly in the ptrace area." * git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: arch/tile: set CORE_DUMP_USE_REGSET on tile arch/tile: implement arch_ptrace using user_regset on tile arch/tile: implement user_regset interface on tile arch/tile: clean up tile-specific PTRACE_SETOPTIONS arch/tile: provide PT_FLAGS_COMPAT value in pt_regs tile/PCI: use for_each_pci_dev to simplify the code tilegx: remove __init from pci fixup hook
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commit
5b3040a48b
@ -170,4 +170,6 @@ do { \
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#endif /* CONFIG_COMPAT */
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#define CORE_DUMP_USE_REGSET
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#endif /* _ASM_TILE_ELF_H */
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@ -24,8 +24,7 @@ typedef unsigned long pt_reg_t;
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#include <uapi/asm/ptrace.h>
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#define PTRACE_O_MASK_TILE (PTRACE_O_TRACEMIGRATE)
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#define PT_TRACE_MIGRATE 0x00080000
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#define PT_TRACE_MASK_TILE (PT_TRACE_MIGRATE)
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#define PT_TRACE_MIGRATE PT_EVENT_FLAG(PTRACE_EVENT_MIGRATE)
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/* Flag bits in pt_regs.flags */
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#define PT_FLAGS_DISABLE_IRQ 1 /* on return to kernel, disable irqs */
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@ -81,8 +81,14 @@ struct pt_regs {
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#define PTRACE_SETFPREGS 15
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/* Support TILE-specific ptrace options, with events starting at 16. */
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#define PTRACE_O_TRACEMIGRATE 0x00010000
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#define PTRACE_EVENT_MIGRATE 16
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#define PTRACE_O_TRACEMIGRATE (1 << PTRACE_EVENT_MIGRATE)
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/*
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* Flag bits in pt_regs.flags that are part of the ptrace API.
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* We start our numbering higher up to avoid confusion with the
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* non-ABI kernel-internal values that use the low 16 bits.
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*/
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#define PT_FLAGS_COMPAT 0x10000 /* process is an -m32 compat process */
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#endif /* _UAPI_ASM_TILE_PTRACE_H */
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@ -245,7 +245,7 @@ static void __devinit fixup_read_and_payload_sizes(void)
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u16 new_values;
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/* Scan for the smallest maximum payload size. */
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while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
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for_each_pci_dev(dev) {
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u32 devcap;
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int max_payload;
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@ -260,7 +260,7 @@ static void __devinit fixup_read_and_payload_sizes(void)
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/* Now, set the max_payload_size for all devices to that value. */
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new_values = (max_read_size << 12) | (smallest_max_payload << 5);
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while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL)
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for_each_pci_dev(dev)
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pcie_capability_clear_and_set_word(dev, PCI_EXP_DEVCTL,
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PCI_EXP_DEVCTL_PAYLOAD | PCI_EXP_DEVCTL_READRQ,
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new_values);
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@ -1047,8 +1047,7 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
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}
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/* Called for each device after PCI setup is done. */
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static void __init
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pcibios_fixup_final(struct pci_dev *pdev)
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static void pcibios_fixup_final(struct pci_dev *pdev)
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{
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set_dma_ops(&pdev->dev, gx_pci_dma_map_ops);
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set_dma_offset(&pdev->dev, TILE_PCI_MEM_MAP_BASE_OFFSET);
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@ -19,7 +19,10 @@
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#include <linux/kprobes.h>
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#include <linux/compat.h>
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#include <linux/uaccess.h>
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#include <linux/regset.h>
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#include <linux/elf.h>
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#include <asm/traps.h>
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#include <arch/chip.h>
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void user_enable_single_step(struct task_struct *child)
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{
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@ -45,6 +48,100 @@ void ptrace_disable(struct task_struct *child)
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clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
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}
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/*
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* Get registers from task and ready the result for userspace.
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* Note that we localize the API issues to getregs() and putregs() at
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* some cost in performance, e.g. we need a full pt_regs copy for
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* PEEKUSR, and two copies for POKEUSR. But in general we expect
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* GETREGS/PUTREGS to be the API of choice anyway.
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*/
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static char *getregs(struct task_struct *child, struct pt_regs *uregs)
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{
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*uregs = *task_pt_regs(child);
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/* Set up flags ABI bits. */
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uregs->flags = 0;
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#ifdef CONFIG_COMPAT
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if (task_thread_info(child)->status & TS_COMPAT)
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uregs->flags |= PT_FLAGS_COMPAT;
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#endif
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return (char *)uregs;
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}
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/* Put registers back to task. */
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static void putregs(struct task_struct *child, struct pt_regs *uregs)
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{
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struct pt_regs *regs = task_pt_regs(child);
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/* Don't allow overwriting the kernel-internal flags word. */
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uregs->flags = regs->flags;
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/* Only allow setting the ICS bit in the ex1 word. */
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uregs->ex1 = PL_ICS_EX1(USER_PL, EX1_ICS(uregs->ex1));
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*regs = *uregs;
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}
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enum tile_regset {
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REGSET_GPR,
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};
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static int tile_gpr_get(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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struct pt_regs regs;
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getregs(target, ®s);
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf, ®s, 0,
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sizeof(regs));
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}
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static int tile_gpr_set(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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int ret;
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struct pt_regs regs;
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ®s, 0,
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sizeof(regs));
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if (ret)
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return ret;
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putregs(target, ®s);
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return 0;
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}
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static const struct user_regset tile_user_regset[] = {
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[REGSET_GPR] = {
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.core_note_type = NT_PRSTATUS,
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.n = ELF_NGREG,
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.size = sizeof(elf_greg_t),
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.align = sizeof(elf_greg_t),
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.get = tile_gpr_get,
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.set = tile_gpr_set,
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},
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};
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static const struct user_regset_view tile_user_regset_view = {
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.name = CHIP_ARCH_NAME,
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.e_machine = ELF_ARCH,
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.ei_osabi = ELF_OSABI,
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.regsets = tile_user_regset,
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.n = ARRAY_SIZE(tile_user_regset),
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};
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const struct user_regset_view *task_user_regset_view(struct task_struct *task)
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{
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return &tile_user_regset_view;
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}
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long arch_ptrace(struct task_struct *child, long request,
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unsigned long addr, unsigned long data)
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{
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@ -53,14 +150,13 @@ long arch_ptrace(struct task_struct *child, long request,
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long ret = -EIO;
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char *childreg;
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struct pt_regs copyregs;
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int ex1_offset;
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switch (request) {
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case PTRACE_PEEKUSR: /* Read register from pt_regs. */
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if (addr >= PTREGS_SIZE)
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break;
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childreg = (char *)task_pt_regs(child) + addr;
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childreg = getregs(child, ©regs) + addr;
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#ifdef CONFIG_COMPAT
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if (is_compat_task()) {
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if (addr & (sizeof(compat_long_t)-1))
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@ -79,17 +175,7 @@ long arch_ptrace(struct task_struct *child, long request,
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case PTRACE_POKEUSR: /* Write register in pt_regs. */
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if (addr >= PTREGS_SIZE)
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break;
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childreg = (char *)task_pt_regs(child) + addr;
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/* Guard against overwrites of the privilege level. */
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ex1_offset = PTREGS_OFFSET_EX1;
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#if defined(CONFIG_COMPAT) && defined(__BIG_ENDIAN)
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if (is_compat_task()) /* point at low word */
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ex1_offset += sizeof(compat_long_t);
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#endif
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if (addr == ex1_offset)
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data = PL_ICS_EX1(USER_PL, EX1_ICS(data));
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childreg = getregs(child, ©regs) + addr;
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#ifdef CONFIG_COMPAT
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if (is_compat_task()) {
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if (addr & (sizeof(compat_long_t)-1))
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@ -102,24 +188,20 @@ long arch_ptrace(struct task_struct *child, long request,
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break;
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*(long *)childreg = data;
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}
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putregs(child, ©regs);
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ret = 0;
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break;
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case PTRACE_GETREGS: /* Get all registers from the child. */
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if (copy_to_user(datap, task_pt_regs(child),
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sizeof(struct pt_regs)) == 0) {
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ret = 0;
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}
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ret = copy_regset_to_user(child, &tile_user_regset_view,
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REGSET_GPR, 0,
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sizeof(struct pt_regs), datap);
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break;
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case PTRACE_SETREGS: /* Set all registers in the child. */
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if (copy_from_user(©regs, datap,
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sizeof(struct pt_regs)) == 0) {
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copyregs.ex1 =
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PL_ICS_EX1(USER_PL, EX1_ICS(copyregs.ex1));
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*task_pt_regs(child) = copyregs;
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ret = 0;
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}
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ret = copy_regset_from_user(child, &tile_user_regset_view,
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REGSET_GPR, 0,
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sizeof(struct pt_regs), datap);
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break;
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case PTRACE_GETFPREGS: /* Get the child FPU state. */
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@ -128,12 +210,16 @@ long arch_ptrace(struct task_struct *child, long request,
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case PTRACE_SETOPTIONS:
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/* Support TILE-specific ptrace options. */
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child->ptrace &= ~PT_TRACE_MASK_TILE;
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BUILD_BUG_ON(PTRACE_O_MASK_TILE & PTRACE_O_MASK);
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tmp = data & PTRACE_O_MASK_TILE;
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data &= ~PTRACE_O_MASK_TILE;
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ret = ptrace_request(child, request, addr, data);
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if (tmp & PTRACE_O_TRACEMIGRATE)
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child->ptrace |= PT_TRACE_MIGRATE;
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if (ret == 0) {
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unsigned int flags = child->ptrace;
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flags &= ~(PTRACE_O_MASK_TILE << PT_OPT_FLAG_SHIFT);
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flags |= (tmp << PT_OPT_FLAG_SHIFT);
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child->ptrace = flags;
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}
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break;
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default:
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