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gpio: syscon: retrive syscon node and regs offsets from dt
This patch adds handling of new "gpio,syscon-dev" DT property, which allows to specify syscon node and data/direction registers offsets in DT. "gpio,syscon-dev" has following format: gpio,syscon-dev = <&syscon_dev data_reg_offset [direction_reg_offset]>; where - syscon_dev - phandle on syscon node - data_reg_offset - offset of data register (in bytes) - direction_reg_offset - offset of dirrection register (optional, in bytes) for example: gpio,syscon-dev = <&devctrl 0x254>; In such way, the support of multiple Syscon GPIO devices is added. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -55,6 +55,8 @@ struct syscon_gpio_priv {
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struct gpio_chip chip;
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struct regmap *syscon;
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const struct syscon_gpio_data *data;
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u32 dreg_offset;
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u32 dir_reg_offset;
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};
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static inline struct syscon_gpio_priv *to_syscon_gpio(struct gpio_chip *chip)
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@ -65,9 +67,11 @@ static inline struct syscon_gpio_priv *to_syscon_gpio(struct gpio_chip *chip)
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static int syscon_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
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unsigned int val, offs = priv->data->dat_bit_offset + offset;
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unsigned int val, offs;
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int ret;
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offs = priv->dreg_offset + priv->data->dat_bit_offset + offset;
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ret = regmap_read(priv->syscon,
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(offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE, &val);
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if (ret)
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@ -79,7 +83,9 @@ static int syscon_gpio_get(struct gpio_chip *chip, unsigned offset)
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static void syscon_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
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{
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struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
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unsigned int offs = priv->data->dat_bit_offset + offset;
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unsigned int offs;
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offs = priv->dreg_offset + priv->data->dat_bit_offset + offset;
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regmap_update_bits(priv->syscon,
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(offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
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@ -92,7 +98,10 @@ static int syscon_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
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struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
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if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) {
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unsigned int offs = priv->data->dir_bit_offset + offset;
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unsigned int offs;
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offs = priv->dir_reg_offset +
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priv->data->dir_bit_offset + offset;
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regmap_update_bits(priv->syscon,
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(offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
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@ -107,7 +116,10 @@ static int syscon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int val)
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struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
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if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) {
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unsigned int offs = priv->data->dir_bit_offset + offset;
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unsigned int offs;
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offs = priv->dir_reg_offset +
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priv->data->dir_bit_offset + offset;
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regmap_update_bits(priv->syscon,
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(offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
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@ -142,6 +154,8 @@ static int syscon_gpio_probe(struct platform_device *pdev)
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struct device *dev = &pdev->dev;
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const struct of_device_id *of_id = of_match_device(syscon_gpio_ids, dev);
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struct syscon_gpio_priv *priv;
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struct device_node *np = dev->of_node;
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int ret;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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@ -149,10 +163,31 @@ static int syscon_gpio_probe(struct platform_device *pdev)
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priv->data = of_id->data;
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priv->syscon =
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syscon_regmap_lookup_by_compatible(priv->data->compatible);
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if (IS_ERR(priv->syscon))
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return PTR_ERR(priv->syscon);
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if (priv->data->compatible) {
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priv->syscon = syscon_regmap_lookup_by_compatible(
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priv->data->compatible);
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if (IS_ERR(priv->syscon))
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return PTR_ERR(priv->syscon);
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} else {
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priv->syscon =
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syscon_regmap_lookup_by_phandle(np, "gpio,syscon-dev");
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if (IS_ERR(priv->syscon))
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return PTR_ERR(priv->syscon);
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ret = of_property_read_u32_index(np, "gpio,syscon-dev", 1,
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&priv->dreg_offset);
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if (ret)
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dev_err(dev, "can't read the data register offset!\n");
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priv->dreg_offset <<= 3;
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ret = of_property_read_u32_index(np, "gpio,syscon-dev", 2,
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&priv->dir_reg_offset);
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if (ret)
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dev_err(dev, "can't read the dir register offset!\n");
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priv->dir_reg_offset <<= 3;
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}
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priv->chip.dev = dev;
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priv->chip.owner = THIS_MODULE;
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