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ARM: pxa: Add Balloon3 NAND ready check
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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@ -612,9 +612,13 @@ static void balloon3_nand_select_chip(struct mtd_info *mtd, int chip)
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BALLOON3_NAND_CONTROL_REG);
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BALLOON3_NAND_CONTROL_REG);
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}
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}
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static int balloon3_nand_dev_ready(struct mtd_info *mtd)
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{
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return __raw_readl(BALLOON3_NAND_STAT_REG) & BALLOON3_NAND_STAT_RNB;
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}
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static int balloon3_nand_probe(struct platform_device *pdev)
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static int balloon3_nand_probe(struct platform_device *pdev)
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{
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{
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void __iomem *temp_map;
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uint16_t ver;
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uint16_t ver;
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int ret;
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int ret;
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@ -684,7 +688,7 @@ struct platform_nand_data balloon3_nand_pdata = {
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},
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},
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.ctrl = {
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.ctrl = {
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.hwcontrol = 0,
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.hwcontrol = 0,
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.dev_ready = 0,
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.dev_ready = balloon3_nand_dev_ready,
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.select_chip = balloon3_nand_select_chip,
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.select_chip = balloon3_nand_select_chip,
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.cmd_ctrl = balloon3_nand_cmd_ctl,
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.cmd_ctrl = balloon3_nand_cmd_ctl,
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.probe = balloon3_nand_probe,
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.probe = balloon3_nand_probe,
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@ -37,7 +37,7 @@ enum balloon3_features {
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#define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000)
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#define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000)
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#define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000)
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#define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000)
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#define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010)
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#define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010)
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#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00010)
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#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00014)
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#define BALLOON3_NAND_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00014)
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#define BALLOON3_NAND_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00014)
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/* fpga/cpld interrupt control register */
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/* fpga/cpld interrupt control register */
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