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alpha: fix alignment problem in csum_ipv6_magic()
Hopefully this fixes http://bugzilla.kernel.org/show_bug.cgi?id=8635 The struct in6_addr passed to csum_ipv6_magic() is 4 byte aligned, so we can't use the regular 64-bit loads. Since the cost of handling of 4 byte and 1 byte aligned 64-bit data is roughly the same, this code can cope with any src/dst [mis]alignment. Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Richard Henderson <rth@twiddle.net> Cc: Dustin Marquess <jailbird@alcatraz.fdf.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Ivan Kokshaysky
Linus Torvalds
parent
653d4876b7
commit
58ed2f9c75
@ -7,6 +7,9 @@
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* __u32 len,
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* unsigned short proto,
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* unsigned int csum);
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*
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* Misalignment handling (which costs 16 instructions / 8 cycles)
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* added by Ivan Kokshaysky <ink@jurassic.park.msu.ru>
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*/
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.globl csum_ipv6_magic
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@ -16,37 +19,57 @@
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csum_ipv6_magic:
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.prologue 0
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ldq $0,0($16) # e0 : load src & dst addr words
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ldq_u $0,0($16) # e0 : load src & dst addr words
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zapnot $20,15,$20 # .. e1 : zero extend incoming csum
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extqh $18,1,$4 # e0 : byte swap len & proto while we wait
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ldq $1,8($16) # .. e1 :
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ldq_u $21,7($16) # .. e1 : handle misalignment
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extbl $18,1,$5 # e0 :
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ldq $2,0($17) # .. e1 :
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ldq_u $1,8($16) # .. e1 :
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extbl $18,2,$6 # e0 :
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ldq $3,8($17) # .. e1 :
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ldq_u $22,15($16) # .. e1 :
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extbl $18,3,$18 # e0 :
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ldq_u $2,0($17) # .. e1 :
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sra $4,32,$4 # e0 :
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ldq_u $23,7($17) # .. e1 :
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extql $0,$16,$0 # e0 :
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ldq_u $3,8($17) # .. e1 :
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extqh $21,$16,$21 # e0 :
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ldq_u $24,15($17) # .. e1 :
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sll $5,16,$5 # e0 :
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or $0,$21,$0 # .. e1 : 1st src word complete
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extql $1,$16,$1 # e0 :
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addq $20,$0,$20 # .. e1 : begin summing the words
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sll $6,8,$6 # e0 :
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extqh $22,$16,$22 # e0 :
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cmpult $20,$0,$0 # .. e1 :
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extwh $19,7,$7 # e0 :
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sll $6,8,$6 # e0 :
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or $1,$22,$1 # .. e1 : 2nd src word complete
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extql $2,$17,$2 # e0 :
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or $4,$18,$18 # .. e1 :
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extbl $19,1,$19 # e0 :
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extqh $23,$17,$23 # e0 :
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or $5,$6,$5 # .. e1 :
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or $18,$5,$18 # e0 : len complete
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or $19,$7,$19 # .. e1 :
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sll $19,48,$19 # e0 :
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extql $3,$17,$3 # e0 :
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or $2,$23,$2 # .. e1 : 1st dst word complete
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extqh $24,$17,$24 # e0 :
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or $18,$5,$18 # .. e1 : len complete
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extwh $19,7,$7 # e0 :
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or $3,$24,$3 # .. e1 : 2nd dst word complete
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extbl $19,1,$19 # e0 :
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addq $20,$1,$20 # .. e1 :
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sra $19,32,$19 # e0 : proto complete
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cmpult $20,$1,$1 # .. e1 :
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nop # e0 :
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or $19,$7,$19 # e0 :
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cmpult $20,$1,$1 # .. e1 :
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sll $19,48,$19 # e0 :
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nop # .. e0 :
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sra $19,32,$19 # e0 : proto complete
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addq $20,$2,$20 # .. e1 :
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cmpult $20,$2,$2 # e0 :
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addq $20,$3,$20 # .. e1 :
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@ -84,7 +107,7 @@ csum_ipv6_magic:
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extwl $0,2,$1 # e0 : fold 17-bit value
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zapnot $0,3,$0 # .. e1 :
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addq $0,$1,$0 # e0 :
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not $0,$0 # e1 : and complement.
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not $0,$0 # .. e1 : and complement.
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zapnot $0,3,$0 # e0 :
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ret # .. e1 :
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@ -46,6 +46,10 @@
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* add the 3 low ushorts together, generating a uint
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* a final add of the 2 lower ushorts
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* truncating the result.
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*
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* Misalignment handling added by Ivan Kokshaysky <ink@jurassic.park.msu.ru>
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* The cost is 16 instructions (~8 cycles), including two extra loads which
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* may cause additional delay in rare cases (load-load replay traps).
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*/
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.globl csum_ipv6_magic
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@ -55,25 +59,45 @@
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csum_ipv6_magic:
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.prologue 0
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ldq $0,0($16) # L : Latency: 3
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ldq_u $0,0($16) # L : Latency: 3
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inslh $18,7,$4 # U : 0000000000AABBCC
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ldq $1,8($16) # L : Latency: 3
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ldq_u $1,8($16) # L : Latency: 3
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sll $19,8,$7 # U : U L U L : 0x00000000 00aabb00
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and $16,7,$6 # E : src misalignment
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ldq_u $5,15($16) # L : Latency: 3
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zapnot $20,15,$20 # U : zero extend incoming csum
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ldq $2,0($17) # L : Latency: 3
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sll $19,24,$19 # U : U L L U : 0x000000aa bb000000
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ldq_u $2,0($17) # L : U L U L : Latency: 3
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extql $0,$6,$0 # U :
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extqh $1,$6,$22 # U :
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ldq_u $3,8($17) # L : Latency: 3
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sll $19,24,$19 # U : U U L U : 0x000000aa bb000000
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cmoveq $6,$31,$22 # E : src aligned?
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ldq_u $23,15($17) # L : Latency: 3
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inswl $18,3,$18 # U : 000000CCDD000000
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addl $19,$7,$19 # E : U L U L : <sign bits>bbaabb00
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ldq $3,8($17) # L : Latency: 3
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bis $18,$4,$18 # E : 000000CCDDAABBCC
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addl $19,$7,$19 # E : <sign bits>bbaabb00
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nop # E : U L U L
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or $0,$22,$0 # E : 1st src word complete
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extql $1,$6,$1 # U :
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or $18,$4,$18 # E : 000000CCDDAABBCC
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extqh $5,$6,$5 # U : L U L U
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and $17,7,$6 # E : dst misalignment
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extql $2,$6,$2 # U :
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or $1,$5,$1 # E : 2nd src word complete
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extqh $3,$6,$22 # U : L U L U :
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cmoveq $6,$31,$22 # E : dst aligned?
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extql $3,$6,$3 # U :
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addq $20,$0,$20 # E : begin summing the words
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extqh $23,$6,$23 # U : L U L U :
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srl $18,16,$4 # U : 0000000000CCDDAA
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or $2,$22,$2 # E : 1st dst word complete
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zap $19,0x3,$19 # U : <sign bits>bbaa0000
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nop # E : L U U L
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or $3,$23,$3 # E : U L U L : 2nd dst word complete
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cmpult $20,$0,$0 # E :
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addq $20,$1,$20 # E :
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