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rt2x00: Fix RT3572 channel switch RFCSR 7 programming.
Align with the v2.5.0.0 Ralink RT3572 driver. Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com> Acked-by: Stanislaw Gruszka <sgruszka@redhat.com> Acked-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -1819,10 +1819,12 @@ struct mac_iveiv_entry {
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* RFCSR 7:
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*/
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#define RFCSR7_RF_TUNING FIELD8(0x01)
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#define RFCSR7_R02 FIELD8(0x07)
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#define RFCSR7_R3 FIELD8(0x08)
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#define RFCSR7_R45 FIELD8(0x30)
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#define RFCSR7_R67 FIELD8(0xc0)
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#define RFCSR7_BIT1 FIELD8(0x02)
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#define RFCSR7_BIT2 FIELD8(0x04)
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#define RFCSR7_BIT3 FIELD8(0x08)
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#define RFCSR7_BIT4 FIELD8(0x10)
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#define RFCSR7_BIT5 FIELD8(0x20)
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#define RFCSR7_BITS67 FIELD8(0xc0)
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/*
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* RFCSR 11:
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@ -1865,7 +1865,12 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev,
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rt2800_rfcsr_write(rt2x00dev, 27, 0x00);
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rt2800_rfcsr_write(rt2x00dev, 29, 0x9b);
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} else {
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rt2800_rfcsr_write(rt2x00dev, 7, 0x14);
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rt2800_rfcsr_read(rt2x00dev, 7, &rfcsr);
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rt2x00_set_field8(&rfcsr, RFCSR7_BIT2, 1);
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rt2x00_set_field8(&rfcsr, RFCSR7_BIT3, 0);
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rt2x00_set_field8(&rfcsr, RFCSR7_BIT4, 1);
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rt2x00_set_field8(&rfcsr, RFCSR7_BITS67, 0);
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rt2800_rfcsr_write(rt2x00dev, 7, rfcsr);
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rt2800_rfcsr_write(rt2x00dev, 9, 0xc0);
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rt2800_rfcsr_write(rt2x00dev, 10, 0xf1);
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rt2800_rfcsr_write(rt2x00dev, 11, 0x00);
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