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Merge branch 'msm-fixes-4.12-rc4' of git://people.freedesktop.org/~robclark/linux into drm-fixes
a few fixes for 4.12.. * 'msm-fixes-4.12-rc4' of git://people.freedesktop.org/~robclark/linux: drm/msm: Fix the check for the command size drm/msm: Take the mutex before calling msm_gem_new_impl drm/msm: for array in-fences, check if all backing fences are from our own context before waiting drm/msm: constify irq_domain_ops drm/msm/mdp5: release hwpipe(s) for unused planes drm/msm: Reuse dma_fence_release. drm/msm: Expose our reservation object when exporting a dmabuf. drm/msm/gpu: check legacy clk names in get_clocks() drm/msm/mdp5: use __drm_atomic_helper_plane_duplicate_state() drm/msm: select PM_OPP
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commit
58b58f6ef5
@ -13,6 +13,7 @@ config DRM_MSM
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select QCOM_SCM
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select SND_SOC_HDMI_CODEC if SND_SOC
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select SYNC_FILE
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select PM_OPP
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default y
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help
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DRM/KMS driver for MSM/snapdragon.
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@ -116,7 +116,7 @@ static int mdss_hw_irqdomain_map(struct irq_domain *d, unsigned int irq,
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return 0;
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}
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static struct irq_domain_ops mdss_hw_irqdomain_ops = {
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static const struct irq_domain_ops mdss_hw_irqdomain_ops = {
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.map = mdss_hw_irqdomain_map,
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.xlate = irq_domain_xlate_onecell,
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};
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@ -225,9 +225,10 @@ mdp5_plane_duplicate_state(struct drm_plane *plane)
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mdp5_state = kmemdup(to_mdp5_plane_state(plane->state),
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sizeof(*mdp5_state), GFP_KERNEL);
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if (!mdp5_state)
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return NULL;
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if (mdp5_state && mdp5_state->base.fb)
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drm_framebuffer_reference(mdp5_state->base.fb);
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__drm_atomic_helper_plane_duplicate_state(plane, &mdp5_state->base);
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return &mdp5_state->base;
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}
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@ -444,6 +445,10 @@ static int mdp5_plane_atomic_check_with_state(struct drm_crtc_state *crtc_state,
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mdp5_pipe_release(state->state, old_hwpipe);
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mdp5_pipe_release(state->state, old_right_hwpipe);
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}
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} else {
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mdp5_pipe_release(state->state, mdp5_state->hwpipe);
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mdp5_pipe_release(state->state, mdp5_state->r_hwpipe);
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mdp5_state->hwpipe = mdp5_state->r_hwpipe = NULL;
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}
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return 0;
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@ -830,6 +830,7 @@ static struct drm_driver msm_driver = {
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.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
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.gem_prime_export = drm_gem_prime_export,
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.gem_prime_import = drm_gem_prime_import,
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.gem_prime_res_obj = msm_gem_prime_res_obj,
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.gem_prime_pin = msm_gem_prime_pin,
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.gem_prime_unpin = msm_gem_prime_unpin,
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.gem_prime_get_sg_table = msm_gem_prime_get_sg_table,
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@ -224,6 +224,7 @@ struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj);
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void *msm_gem_prime_vmap(struct drm_gem_object *obj);
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void msm_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
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int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
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struct reservation_object *msm_gem_prime_res_obj(struct drm_gem_object *obj);
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struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev,
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struct dma_buf_attachment *attach, struct sg_table *sg);
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int msm_gem_prime_pin(struct drm_gem_object *obj);
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@ -99,8 +99,8 @@ void msm_update_fence(struct msm_fence_context *fctx, uint32_t fence)
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}
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struct msm_fence {
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struct msm_fence_context *fctx;
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struct dma_fence base;
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struct msm_fence_context *fctx;
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};
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static inline struct msm_fence *to_msm_fence(struct dma_fence *fence)
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@ -130,19 +130,13 @@ static bool msm_fence_signaled(struct dma_fence *fence)
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return fence_completed(f->fctx, f->base.seqno);
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}
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static void msm_fence_release(struct dma_fence *fence)
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{
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struct msm_fence *f = to_msm_fence(fence);
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kfree_rcu(f, base.rcu);
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}
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static const struct dma_fence_ops msm_fence_ops = {
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.get_driver_name = msm_fence_get_driver_name,
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.get_timeline_name = msm_fence_get_timeline_name,
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.enable_signaling = msm_fence_enable_signaling,
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.signaled = msm_fence_signaled,
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.wait = dma_fence_default_wait,
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.release = msm_fence_release,
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.release = dma_fence_free,
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};
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struct dma_fence *
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@ -758,6 +758,8 @@ static int msm_gem_new_impl(struct drm_device *dev,
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struct msm_gem_object *msm_obj;
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bool use_vram = false;
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WARN_ON(!mutex_is_locked(&dev->struct_mutex));
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switch (flags & MSM_BO_CACHE_MASK) {
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case MSM_BO_UNCACHED:
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case MSM_BO_CACHED:
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@ -853,7 +855,11 @@ struct drm_gem_object *msm_gem_import(struct drm_device *dev,
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size = PAGE_ALIGN(dmabuf->size);
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/* Take mutex so we can modify the inactive list in msm_gem_new_impl */
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mutex_lock(&dev->struct_mutex);
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ret = msm_gem_new_impl(dev, size, MSM_BO_WC, dmabuf->resv, &obj);
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mutex_unlock(&dev->struct_mutex);
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if (ret)
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goto fail;
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@ -70,3 +70,10 @@ void msm_gem_prime_unpin(struct drm_gem_object *obj)
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if (!obj->import_attach)
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msm_gem_put_pages(obj);
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}
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struct reservation_object *msm_gem_prime_res_obj(struct drm_gem_object *obj)
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{
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struct msm_gem_object *msm_obj = to_msm_bo(obj);
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return msm_obj->resv;
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}
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@ -410,12 +410,11 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
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if (!in_fence)
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return -EINVAL;
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/* TODO if we get an array-fence due to userspace merging multiple
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* fences, we need a way to determine if all the backing fences
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* are from our own context..
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/*
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* Wait if the fence is from a foreign context, or if the fence
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* array contains any fence from a foreign context.
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*/
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if (in_fence->context != gpu->fctx->context) {
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if (!dma_fence_match_context(in_fence, gpu->fctx->context)) {
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ret = dma_fence_wait(in_fence, true);
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if (ret)
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return ret;
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@ -496,8 +495,9 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
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goto out;
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}
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if ((submit_cmd.size + submit_cmd.submit_offset) >=
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msm_obj->base.size) {
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if (!submit_cmd.size ||
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((submit_cmd.size + submit_cmd.submit_offset) >
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msm_obj->base.size)) {
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DRM_ERROR("invalid cmdstream size: %u\n", submit_cmd.size);
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ret = -EINVAL;
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goto out;
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@ -549,9 +549,9 @@ static int get_clocks(struct platform_device *pdev, struct msm_gpu *gpu)
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gpu->grp_clks[i] = get_clock(dev, name);
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/* Remember the key clocks that we need to control later */
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if (!strcmp(name, "core"))
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if (!strcmp(name, "core") || !strcmp(name, "core_clk"))
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gpu->core_clk = gpu->grp_clks[i];
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else if (!strcmp(name, "rbbmtimer"))
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else if (!strcmp(name, "rbbmtimer") || !strcmp(name, "rbbmtimer_clk"))
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gpu->rbbmtimer_clk = gpu->grp_clks[i];
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++i;
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