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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k

Browse Source 
Pull m68k updates from Geert Uytterhoeven.

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k:
  m68k: Make sys_atomic_cmpxchg_32 work on classic m68k
  m68k/apollo: Rename "timer" to "apollo_timer"
  zorro: Remove unused zorro_bus.devices
  m68k: Remove never used asm/shm.h
  m68k/sun3: Remove unselectable code in prom_init()
  m68k: Use asm-generic version of <asm/sections.h>
  m68k: Replace m68k-specific _[se]bss by generic __bss_{start,stop}
  mtd/uclinux: Use generic __bss_stop instead of _ebss
  m68knommu: Allow ColdFire CPUs to use unaligned accesses
  m68k: Remove five unused headers
  m68k: CPU32 does not support unaligned accesses
  m68k: Introduce config option CPU_HAS_NO_UNALIGNED
  m68k: delay, muldi3 - Use CONFIG_CPU_HAS_NO_MULDIV64
  m68k: Move CPU_HAS_* config options
  m68k: Remove duplicate FPU config option
  m68knommu: Clean up printing of sections
  m68k: Use asm-generic version of <asm/types.h>
  m68k: Use Kbuild logic to import asm-generic headers
This commit is contained in:
Linus Torvalds 2012-08-03 10:52:41 -07:00
commit 587a9e1f95
66 changed files with 100 additions and 842 deletions
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1
arch/blackfin/kernel/setup.c
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@ -52,7 +52,6 @@ EXPORT_SYMBOL(reserved_mem_dcache_on);
#ifdef CONFIG_MTD_UCLINUX
extern struct map_info uclinux_ram_map;
unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
unsigned long _ebss;
EXPORT_SYMBOL(memory_mtd_end);
EXPORT_SYMBOL(memory_mtd_start);
EXPORT_SYMBOL(mtd_size);

12
arch/m68k/Kconfig
View File

@ -54,18 +54,6 @@ config ZONE_DMA
bool
default y
config CPU_HAS_NO_BITFIELDS
bool
config CPU_HAS_NO_MULDIV64
bool
config CPU_HAS_ADDRESS_SPACES
bool
config FPU
bool
config HZ
int
default 1000 if CLEOPATRA

14
arch/m68k/Kconfig.cpu
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@ -37,6 +37,7 @@ config M68000
bool
select CPU_HAS_NO_BITFIELDS
select CPU_HAS_NO_MULDIV64
select CPU_HAS_NO_UNALIGNED
select GENERIC_CSUM
help
The Freescale (was Motorola) 68000 CPU is the first generation of
@ -48,6 +49,7 @@ config M68000
config MCPU32
bool
select CPU_HAS_NO_BITFIELDS
select CPU_HAS_NO_UNALIGNED
help
The Freescale (was then Motorola) CPU32 is a CPU core that is
based on the 68020 processor. For the most part it is used in
@ -376,6 +378,18 @@ config NODES_SHIFT
default "3"
depends on !SINGLE_MEMORY_CHUNK
config CPU_HAS_NO_BITFIELDS
bool
config CPU_HAS_NO_MULDIV64
bool
config CPU_HAS_NO_UNALIGNED
bool
config CPU_HAS_ADDRESS_SPACES
bool
config FPU
bool

16
arch/m68k/apollo/config.c
View File

@ -177,8 +177,8 @@ irqreturn_t dn_timer_int(int irq, void *dev_id)
timer_handler(irq, dev_id);
x=*(volatile unsigned char *)(timer+3);
x=*(volatile unsigned char *)(timer+5);
x = *(volatile unsigned char *)(apollo_timer + 3);
x = *(volatile unsigned char *)(apollo_timer + 5);
return IRQ_HANDLED;
}
@ -186,17 +186,17 @@ irqreturn_t dn_timer_int(int irq, void *dev_id)
void dn_sched_init(irq_handler_t timer_routine)
{
/* program timer 1 */
*(volatile unsigned char *)(timer+3)=0x01;
*(volatile unsigned char *)(timer+1)=0x40;
*(volatile unsigned char *)(timer+5)=0x09;
*(volatile unsigned char *)(timer+7)=0xc4;
*(volatile unsigned char *)(apollo_timer + 3) = 0x01;
*(volatile unsigned char *)(apollo_timer + 1) = 0x40;
*(volatile unsigned char *)(apollo_timer + 5) = 0x09;
*(volatile unsigned char *)(apollo_timer + 7) = 0xc4;
/* enable IRQ of PIC B */
*(volatile unsigned char *)(pica+1)&=(~8);
#if 0
printk("*(0x10803) %02x\n",*(volatile unsigned char *)(timer+0x3));
printk("*(0x10803) %02x\n",*(volatile unsigned char *)(timer+0x3));
printk("*(0x10803) %02x\n",*(volatile unsigned char *)(apollo_timer + 0x3));
printk("*(0x10803) %02x\n",*(volatile unsigned char *)(apollo_timer + 0x3));
#endif
if (request_irq(IRQ_APOLLO, dn_timer_int, 0, "time", timer_routine))

25
arch/m68k/include/asm/Kbuild
View File

@ -1,4 +1,29 @@
include include/asm-generic/Kbuild.asm
header-y += cachectl.h
generic-y += bitsperlong.h
generic-y += cputime.h
generic-y += device.h
generic-y += emergency-restart.h
generic-y += errno.h
generic-y += futex.h
generic-y += ioctl.h
generic-y += ipcbuf.h
generic-y += irq_regs.h
generic-y += kdebug.h
generic-y += kmap_types.h
generic-y += kvm_para.h
generic-y += local64.h
generic-y += local.h
generic-y += mman.h
generic-y += mutex.h
generic-y += percpu.h
generic-y += resource.h
generic-y += scatterlist.h
generic-y += sections.h
generic-y += siginfo.h
generic-y += statfs.h
generic-y += topology.h
generic-y += types.h
generic-y += word-at-a-time.h
generic-y += xor.h

152
arch/m68k/include/asm/MC68332.h
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@ -1,152 +0,0 @@
/* include/asm-m68knommu/MC68332.h: '332 control registers
*
* Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>,
*
*/
#ifndef _MC68332_H_
#define _MC68332_H_
#define BYTE_REF(addr) (*((volatile unsigned char*)addr))
#define WORD_REF(addr) (*((volatile unsigned short*)addr))
#define PORTE_ADDR 0xfffa11
#define PORTE BYTE_REF(PORTE_ADDR)
#define DDRE_ADDR 0xfffa15
#define DDRE BYTE_REF(DDRE_ADDR)
#define PEPAR_ADDR 0xfffa17
#define PEPAR BYTE_REF(PEPAR_ADDR)
#define PORTF_ADDR 0xfffa19
#define PORTF BYTE_REF(PORTF_ADDR)
#define DDRF_ADDR 0xfffa1d
#define DDRF BYTE_REF(DDRF_ADDR)
#define PFPAR_ADDR 0xfffa1f
#define PFPAR BYTE_REF(PFPAR_ADDR)
#define PORTQS_ADDR 0xfffc15
#define PORTQS BYTE_REF(PORTQS_ADDR)
#define DDRQS_ADDR 0xfffc17
#define DDRQS BYTE_REF(DDRQS_ADDR)
#define PQSPAR_ADDR 0xfffc16
#define PQSPAR BYTE_REF(PQSPAR_ADDR)
#define CSPAR0_ADDR 0xFFFA44
#define CSPAR0 WORD_REF(CSPAR0_ADDR)
#define CSPAR1_ADDR 0xFFFA46
#define CSPAR1 WORD_REF(CSPAR1_ADDR)
#define CSARBT_ADDR 0xFFFA48
#define CSARBT WORD_REF(CSARBT_ADDR)
#define CSOPBT_ADDR 0xFFFA4A
#define CSOPBT WORD_REF(CSOPBT_ADDR)
#define CSBAR0_ADDR 0xFFFA4C
#define CSBAR0 WORD_REF(CSBAR0_ADDR)
#define CSOR0_ADDR 0xFFFA4E
#define CSOR0 WORD_REF(CSOR0_ADDR)
#define CSBAR1_ADDR 0xFFFA50
#define CSBAR1 WORD_REF(CSBAR1_ADDR)
#define CSOR1_ADDR 0xFFFA52
#define CSOR1 WORD_REF(CSOR1_ADDR)
#define CSBAR2_ADDR 0xFFFA54
#define CSBAR2 WORD_REF(CSBAR2_ADDR)
#define CSOR2_ADDR 0xFFFA56
#define CSOR2 WORD_REF(CSOR2_ADDR)
#define CSBAR3_ADDR 0xFFFA58
#define CSBAR3 WORD_REF(CSBAR3_ADDR)
#define CSOR3_ADDR 0xFFFA5A
#define CSOR3 WORD_REF(CSOR3_ADDR)
#define CSBAR4_ADDR 0xFFFA5C
#define CSBAR4 WORD_REF(CSBAR4_ADDR)
#define CSOR4_ADDR 0xFFFA5E
#define CSOR4 WORD_REF(CSOR4_ADDR)
#define CSBAR5_ADDR 0xFFFA60
#define CSBAR5 WORD_REF(CSBAR5_ADDR)
#define CSOR5_ADDR 0xFFFA62
#define CSOR5 WORD_REF(CSOR5_ADDR)
#define CSBAR6_ADDR 0xFFFA64
#define CSBAR6 WORD_REF(CSBAR6_ADDR)
#define CSOR6_ADDR 0xFFFA66
#define CSOR6 WORD_REF(CSOR6_ADDR)
#define CSBAR7_ADDR 0xFFFA68
#define CSBAR7 WORD_REF(CSBAR7_ADDR)
#define CSOR7_ADDR 0xFFFA6A
#define CSOR7 WORD_REF(CSOR7_ADDR)
#define CSBAR8_ADDR 0xFFFA6C
#define CSBAR8 WORD_REF(CSBAR8_ADDR)
#define CSOR8_ADDR 0xFFFA6E
#define CSOR8 WORD_REF(CSOR8_ADDR)
#define CSBAR9_ADDR 0xFFFA70
#define CSBAR9 WORD_REF(CSBAR9_ADDR)
#define CSOR9_ADDR 0xFFFA72
#define CSOR9 WORD_REF(CSOR9_ADDR)
#define CSBAR10_ADDR 0xFFFA74
#define CSBAR10 WORD_REF(CSBAR10_ADDR)
#define CSOR10_ADDR 0xFFFA76
#define CSOR10 WORD_REF(CSOR10_ADDR)
#define CSOR_MODE_ASYNC 0x0000
#define CSOR_MODE_SYNC 0x8000
#define CSOR_MODE_MASK 0x8000
#define CSOR_BYTE_DISABLE 0x0000
#define CSOR_BYTE_UPPER 0x4000
#define CSOR_BYTE_LOWER 0x2000
#define CSOR_BYTE_BOTH 0x6000
#define CSOR_BYTE_MASK 0x6000
#define CSOR_RW_RSVD 0x0000
#define CSOR_RW_READ 0x0800
#define CSOR_RW_WRITE 0x1000
#define CSOR_RW_BOTH 0x1800
#define CSOR_RW_MASK 0x1800
#define CSOR_STROBE_DS 0x0400
#define CSOR_STROBE_AS 0x0000
#define CSOR_STROBE_MASK 0x0400
#define CSOR_DSACK_WAIT(x) (wait << 6)
#define CSOR_DSACK_FTERM (14 << 6)
#define CSOR_DSACK_EXTERNAL (15 << 6)
#define CSOR_DSACK_MASK 0x03c0
#define CSOR_SPACE_CPU 0x0000
#define CSOR_SPACE_USER 0x0010
#define CSOR_SPACE_SU 0x0020
#define CSOR_SPACE_BOTH 0x0030
#define CSOR_SPACE_MASK 0x0030
#define CSOR_IPL_ALL 0x0000
#define CSOR_IPL_PRIORITY(x) (x << 1)
#define CSOR_IPL_MASK 0x000e
#define CSOR_AVEC_ON 0x0001
#define CSOR_AVEC_OFF 0x0000
#define CSOR_AVEC_MASK 0x0001
#define CSBAR_ADDR(x) ((addr >> 11) << 3)
#define CSBAR_ADDR_MASK 0xfff8
#define CSBAR_BLKSIZE_2K 0x0000
#define CSBAR_BLKSIZE_8K 0x0001
#define CSBAR_BLKSIZE_16K 0x0002
#define CSBAR_BLKSIZE_64K 0x0003
#define CSBAR_BLKSIZE_128K 0x0004
#define CSBAR_BLKSIZE_256K 0x0005
#define CSBAR_BLKSIZE_512K 0x0006
#define CSBAR_BLKSIZE_1M 0x0007
#define CSBAR_BLKSIZE_MASK 0x0007
#define CSPAR_DISC 0
#define CSPAR_ALT 1
#define CSPAR_CS8 2
#define CSPAR_CS16 3
#define CSPAR_MASK 3
#define CSPAR0_CSBOOT(x) (x << 0)
#define CSPAR0_CS0(x) (x << 2)
#define CSPAR0_CS1(x) (x << 4)
#define CSPAR0_CS2(x) (x << 6)
#define CSPAR0_CS3(x) (x << 8)
#define CSPAR0_CS4(x) (x << 10)
#define CSPAR0_CS5(x) (x << 12)
#define CSPAR1_CS6(x) (x << 0)
#define CSPAR1_CS7(x) (x << 2)
#define CSPAR1_CS8(x) (x << 4)
#define CSPAR1_CS9(x) (x << 6)
#define CSPAR1_CS10(x) (x << 8)
#endif

248
arch/m68k/include/asm/apollodma.h
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@ -1,248 +0,0 @@
/*
* linux/include/asm/dma.h: Defines for using and allocating dma channels.
* Written by Hennus Bergman, 1992.
* High DMA channel support & info by Hannu Savolainen
* and John Boyd, Nov. 1992.
*/
#ifndef _ASM_APOLLO_DMA_H
#define _ASM_APOLLO_DMA_H
#include <asm/apollohw.h> /* need byte IO */
#include <linux/spinlock.h> /* And spinlocks */
#include <linux/delay.h>
#define dma_outb(val,addr) (*((volatile unsigned char *)(addr+IO_BASE)) = (val))
#define dma_inb(addr) (*((volatile unsigned char *)(addr+IO_BASE)))
/*
* NOTES about DMA transfers:
*
* controller 1: channels 0-3, byte operations, ports 00-1F
* controller 2: channels 4-7, word operations, ports C0-DF
*
* - ALL registers are 8 bits only, regardless of transfer size
* - channel 4 is not used - cascades 1 into 2.
* - channels 0-3 are byte - addresses/counts are for physical bytes
* - channels 5-7 are word - addresses/counts are for physical words
* - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
* - transfer count loaded to registers is 1 less than actual count
* - controller 2 offsets are all even (2x offsets for controller 1)
* - page registers for 5-7 don't use data bit 0, represent 128K pages
* - page registers for 0-3 use bit 0, represent 64K pages
*
* DMA transfers are limited to the lower 16MB of _physical_ memory.
* Note that addresses loaded into registers must be _physical_ addresses,
* not logical addresses (which may differ if paging is active).
*
* Address mapping for channels 0-3:
*
* A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses)
* | ... | | ... | | ... |
* | ... | | ... | | ... |
* | ... | | ... | | ... |
* P7 ... P0 A7 ... A0 A7 ... A0
* | Page | Addr MSB | Addr LSB | (DMA registers)
*
* Address mapping for channels 5-7:
*
* A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0 (Physical addresses)
* | ... | \ \ ... \ \ \ ... \ \
* | ... | \ \ ... \ \ \ ... \ (not used)
* | ... | \ \ ... \ \ \ ... \
* P7 ... P1 (0) A7 A6 ... A0 A7 A6 ... A0
* | Page | Addr MSB | Addr LSB | (DMA registers)
*
* Again, channels 5-7 transfer _physical_ words (16 bits), so addresses
* and counts _must_ be word-aligned (the lowest address bit is _ignored_ at
* the hardware level, so odd-byte transfers aren't possible).
*
* Transfer count (_not # bytes_) is limited to 64K, represented as actual
* count - 1 : 64K => 0xFFFF, 1 => 0x0000. Thus, count is always 1 or more,
* and up to 128K bytes may be transferred on channels 5-7 in one operation.
*
*/
#define MAX_DMA_CHANNELS 8
/* The maximum address that we can perform a DMA transfer to on this platform */#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x1000000)
/* 8237 DMA controllers */
#define IO_DMA1_BASE 0x10C00 /* 8 bit slave DMA, channels 0..3 */
#define IO_DMA2_BASE 0x10D00 /* 16 bit master DMA, ch 4(=slave input)..7 */
/* DMA controller registers */
#define DMA1_CMD_REG (IO_DMA1_BASE+0x08) /* command register (w) */
#define DMA1_STAT_REG (IO_DMA1_BASE+0x08) /* status register (r) */
#define DMA1_REQ_REG (IO_DMA1_BASE+0x09) /* request register (w) */
#define DMA1_MASK_REG (IO_DMA1_BASE+0x0A) /* single-channel mask (w) */
#define DMA1_MODE_REG (IO_DMA1_BASE+0x0B) /* mode register (w) */
#define DMA1_CLEAR_FF_REG (IO_DMA1_BASE+0x0C) /* clear pointer flip-flop (w) */
#define DMA1_TEMP_REG (IO_DMA1_BASE+0x0D) /* Temporary Register (r) */
#define DMA1_RESET_REG (IO_DMA1_BASE+0x0D) /* Master Clear (w) */
#define DMA1_CLR_MASK_REG (IO_DMA1_BASE+0x0E) /* Clear Mask */
#define DMA1_MASK_ALL_REG (IO_DMA1_BASE+0x0F) /* all-channels mask (w) */
#define DMA2_CMD_REG (IO_DMA2_BASE+0x10) /* command register (w) */
#define DMA2_STAT_REG (IO_DMA2_BASE+0x10) /* status register (r) */
#define DMA2_REQ_REG (IO_DMA2_BASE+0x12) /* request register (w) */
#define DMA2_MASK_REG (IO_DMA2_BASE+0x14) /* single-channel mask (w) */
#define DMA2_MODE_REG (IO_DMA2_BASE+0x16) /* mode register (w) */
#define DMA2_CLEAR_FF_REG (IO_DMA2_BASE+0x18) /* clear pointer flip-flop (w) */
#define DMA2_TEMP_REG (IO_DMA2_BASE+0x1A) /* Temporary Register (r) */
#define DMA2_RESET_REG (IO_DMA2_BASE+0x1A) /* Master Clear (w) */
#define DMA2_CLR_MASK_REG (IO_DMA2_BASE+0x1C) /* Clear Mask */
#define DMA2_MASK_ALL_REG (IO_DMA2_BASE+0x1E) /* all-channels mask (w) */
#define DMA_ADDR_0 (IO_DMA1_BASE+0x00) /* DMA address registers */
#define DMA_ADDR_1 (IO_DMA1_BASE+0x02)
#define DMA_ADDR_2 (IO_DMA1_BASE+0x04)
#define DMA_ADDR_3 (IO_DMA1_BASE+0x06)
#define DMA_ADDR_4 (IO_DMA2_BASE+0x00)
#define DMA_ADDR_5 (IO_DMA2_BASE+0x04)
#define DMA_ADDR_6 (IO_DMA2_BASE+0x08)
#define DMA_ADDR_7 (IO_DMA2_BASE+0x0C)
#define DMA_CNT_0 (IO_DMA1_BASE+0x01) /* DMA count registers */
#define DMA_CNT_1 (IO_DMA1_BASE+0x03)
#define DMA_CNT_2 (IO_DMA1_BASE+0x05)
#define DMA_CNT_3 (IO_DMA1_BASE+0x07)
#define DMA_CNT_4 (IO_DMA2_BASE+0x02)
#define DMA_CNT_5 (IO_DMA2_BASE+0x06)
#define DMA_CNT_6 (IO_DMA2_BASE+0x0A)
#define DMA_CNT_7 (IO_DMA2_BASE+0x0E)
#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
#define DMA_AUTOINIT 0x10
#define DMA_8BIT 0
#define DMA_16BIT 1
#define DMA_BUSMASTER 2
extern spinlock_t dma_spin_lock;
static __inline__ unsigned long claim_dma_lock(void)
{
unsigned long flags;
spin_lock_irqsave(&dma_spin_lock, flags);
return flags;
}
static __inline__ void release_dma_lock(unsigned long flags)
{
spin_unlock_irqrestore(&dma_spin_lock, flags);
}
/* enable/disable a specific DMA channel */
static __inline__ void enable_dma(unsigned int dmanr)
{
if (dmanr<=3)
dma_outb(dmanr, DMA1_MASK_REG);
else
dma_outb(dmanr & 3, DMA2_MASK_REG);
}
static __inline__ void disable_dma(unsigned int dmanr)
{
if (dmanr<=3)
dma_outb(dmanr | 4, DMA1_MASK_REG);
else
dma_outb((dmanr & 3) | 4, DMA2_MASK_REG);
}
/* Clear the 'DMA Pointer Flip Flop'.
* Write 0 for LSB/MSB, 1 for MSB/LSB access.
* Use this once to initialize the FF to a known state.
* After that, keep track of it. :-)
* --- In order to do that, the DMA routines below should ---
* --- only be used while holding the DMA lock ! ---
*/
static __inline__ void clear_dma_ff(unsigned int dmanr)
{
if (dmanr<=3)
dma_outb(0, DMA1_CLEAR_FF_REG);
else
dma_outb(0, DMA2_CLEAR_FF_REG);
}
/* set mode (above) for a specific DMA channel */
static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
{
if (dmanr<=3)
dma_outb(mode | dmanr, DMA1_MODE_REG);
else
dma_outb(mode | (dmanr&3), DMA2_MODE_REG);
}
/* Set transfer address & page bits for specific DMA channel.
* Assumes dma flipflop is clear.
*/
static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
{
if (dmanr <= 3) {
dma_outb( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
dma_outb( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
} else {
dma_outb( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
dma_outb( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
}
}
/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
* a specific DMA channel.
* You must ensure the parameters are valid.
* NOTE: from a manual: "the number of transfers is one more
* than the initial word count"! This is taken into account.
* Assumes dma flip-flop is clear.
* NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
*/
static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
{
count--;
if (dmanr <= 3) {
dma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
dma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
} else {
dma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
dma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
}
}
/* Get DMA residue count. After a DMA transfer, this
* should return zero. Reading this while a DMA transfer is
* still in progress will return unpredictable results.
* If called before the channel has been used, it may return 1.
* Otherwise, it returns the number of _bytes_ left to transfer.
*
* Assumes DMA flip-flop is clear.
*/
static __inline__ int get_dma_residue(unsigned int dmanr)
{
unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
: ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
/* using short to get 16-bit wrap around */
unsigned short count;
count = 1 + dma_inb(io_port);
count += dma_inb(io_port) << 8;
return (dmanr<=3)? count : (count<<1);
}
/* These are in kernel/dma.c: */
extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */
extern void free_dma(unsigned int dmanr); /* release it again */
/* These are in arch/m68k/apollo/dma.c: */
extern unsigned short dma_map_page(unsigned long phys_addr,int count,int type);
extern void dma_unmap_page(unsigned short dma_addr);
#endif /* _ASM_APOLLO_DMA_H */

2
arch/m68k/include/asm/apollohw.h
View File

@ -98,7 +98,7 @@ extern u_long timer_physaddr;
#define cpuctrl (*(volatile unsigned int *)(IO_BASE + cpuctrl_physaddr))
#define pica (IO_BASE + pica_physaddr)
#define picb (IO_BASE + picb_physaddr)
#define timer (IO_BASE + timer_physaddr)
#define apollo_timer (IO_BASE + timer_physaddr)
#define addr_xlat_map ((unsigned short *)(IO_BASE + 0x17000))
#define isaIO2mem(x) (((((x) & 0x3f8) << 7) | (((x) & 0xfc00) >> 6) | ((x) & 0x7)) + 0x40000 + IO_BASE)

1
arch/m68k/include/asm/bitsperlong.h
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@ -1 +0,0 @@
#include <asm-generic/bitsperlong.h>

6
arch/m68k/include/asm/cputime.h
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@ -1,6 +0,0 @@
#ifndef __M68K_CPUTIME_H
#define __M68K_CPUTIME_H
#include <asm-generic/cputime.h>
#endif /* __M68K_CPUTIME_H */

2
arch/m68k/include/asm/delay.h
View File

@ -43,7 +43,7 @@ static inline void __delay(unsigned long loops)
extern void __bad_udelay(void);
#if defined(CONFIG_M68000) || defined(CONFIG_COLDFIRE)
#ifdef CONFIG_CPU_HAS_NO_MULDIV64
/*
* The simpler m68k and ColdFire processors do not have a 32*32->64
* multiply instruction. So we need to handle them a little differently.

7
arch/m68k/include/asm/device.h
View File

@ -1,7 +0,0 @@
/*
* Arch specific extensions to struct device
*
* This file is released under the GPLv2
*/
#include <asm-generic/device.h>

6
arch/m68k/include/asm/emergency-restart.h
View File

@ -1,6 +0,0 @@
#ifndef _ASM_EMERGENCY_RESTART_H
#define _ASM_EMERGENCY_RESTART_H
#include <asm-generic/emergency-restart.h>
#endif /* _ASM_EMERGENCY_RESTART_H */

6
arch/m68k/include/asm/errno.h
View File

@ -1,6 +0,0 @@
#ifndef _M68K_ERRNO_H
#define _M68K_ERRNO_H
#include <asm-generic/errno.h>
#endif /* _M68K_ERRNO_H */

6
arch/m68k/include/asm/futex.h
View File

@ -1,6 +0,0 @@
#ifndef _ASM_FUTEX_H
#define _ASM_FUTEX_H
#include <asm-generic/futex.h>
#endif

1
arch/m68k/include/asm/ioctl.h
View File

@ -1 +0,0 @@
#include <asm-generic/ioctl.h>

1
arch/m68k/include/asm/ipcbuf.h
View File

@ -1 +0,0 @@
#include <asm-generic/ipcbuf.h>

1
arch/m68k/include/asm/irq_regs.h
View File

@ -1 +0,0 @@
#include <asm-generic/irq_regs.h>

1
arch/m68k/include/asm/kdebug.h
View File

@ -1 +0,0 @@
#include <asm-generic/kdebug.h>

6
arch/m68k/include/asm/kmap_types.h
View File

@ -1,6 +0,0 @@
#ifndef __ASM_M68K_KMAP_TYPES_H
#define __ASM_M68K_KMAP_TYPES_H
#include <asm-generic/kmap_types.h>
#endif /* __ASM_M68K_KMAP_TYPES_H */

1
arch/m68k/include/asm/kvm_para.h
View File

@ -1 +0,0 @@
#include <asm-generic/kvm_para.h>

6
arch/m68k/include/asm/local.h
View File

@ -1,6 +0,0 @@
#ifndef _ASM_M68K_LOCAL_H
#define _ASM_M68K_LOCAL_H
#include <asm-generic/local.h>
#endif /* _ASM_M68K_LOCAL_H */

1
arch/m68k/include/asm/local64.h
View File

@ -1 +0,0 @@
#include <asm-generic/local64.h>

23
arch/m68k/include/asm/mac_mouse.h
View File

@ -1,23 +0,0 @@
#ifndef _ASM_MAC_MOUSE_H
#define _ASM_MAC_MOUSE_H
/*
* linux/include/asm-m68k/mac_mouse.h
* header file for Macintosh ADB mouse driver
* 27-10-97 Michael Schmitz
* copied from:
* header file for Atari Mouse driver
* by Robert de Vries (robert@and.nl) on 19Jul93
*/
struct mouse_status {
char buttons;
short dx;
short dy;
int ready;
int active;
wait_queue_head_t wait;
struct fasync_struct *fasyncptr;
};
#endif

77
arch/m68k/include/asm/mcfmbus.h
View File

@ -1,77 +0,0 @@
/****************************************************************************/
/*
* mcfmbus.h -- Coldfire MBUS support defines.
*
* (C) Copyright 1999, Martin Floeer (mfloeer@axcent.de)
*/
/****************************************************************************/
#ifndef mcfmbus_h
#define mcfmbus_h
#define MCFMBUS_BASE 0x280
#define MCFMBUS_IRQ_VECTOR 0x19
#define MCFMBUS_IRQ 0x1
#define MCFMBUS_CLK 0x3f
#define MCFMBUS_IRQ_LEVEL 0x07 /*IRQ Level 1*/
#define MCFMBUS_ADDRESS 0x01
/*
* Define the 5307 MBUS register set addresses
*/
#define MCFMBUS_MADR 0x00
#define MCFMBUS_MFDR 0x04
#define MCFMBUS_MBCR 0x08
#define MCFMBUS_MBSR 0x0C
#define MCFMBUS_MBDR 0x10
#define MCFMBUS_MADR_ADDR(a) (((a)&0x7F)<<0x01) /*Slave Address*/
#define MCFMBUS_MFDR_MBC(a) ((a)&0x3F) /*M-Bus Clock*/
/*
* Define bit flags in Control Register
*/
#define MCFMBUS_MBCR_MEN (0x80) /* M-Bus Enable */
#define MCFMBUS_MBCR_MIEN (0x40) /* M-Bus Interrupt Enable */
#define MCFMBUS_MBCR_MSTA (0x20) /* Master/Slave Mode Select Bit */
#define MCFMBUS_MBCR_MTX (0x10) /* Transmit/Rcv Mode Select Bit */
#define MCFMBUS_MBCR_TXAK (0x08) /* Transmit Acknowledge Enable */
#define MCFMBUS_MBCR_RSTA (0x04) /* Repeat Start */
/*
* Define bit flags in Status Register
*/
#define MCFMBUS_MBSR_MCF (0x80) /* Data Transfer Complete */
#define MCFMBUS_MBSR_MAAS (0x40) /* Addressed as a Slave */
#define MCFMBUS_MBSR_MBB (0x20) /* Bus Busy */
#define MCFMBUS_MBSR_MAL (0x10) /* Arbitration Lost */
#define MCFMBUS_MBSR_SRW (0x04) /* Slave Transmit */
#define MCFMBUS_MBSR_MIF (0x02) /* M-Bus Interrupt */
#define MCFMBUS_MBSR_RXAK (0x01) /* No Acknowledge Received */
/*
* Define bit flags in DATA I/O Register
*/
#define MCFMBUS_MBDR_READ (0x01) /* 1=read 0=write MBUS */
#define MBUSIOCSCLOCK 1
#define MBUSIOCGCLOCK 2
#define MBUSIOCSADDR 3
#define MBUSIOCGADDR 4
#define MBUSIOCSSLADDR 5
#define MBUSIOCGSLADDR 6
#define MBUSIOCSSUBADDR 7
#define MBUSIOCGSUBADDR 8
#endif

1
arch/m68k/include/asm/mman.h
View File

@ -1 +0,0 @@
#include <asm-generic/mman.h>

9
arch/m68k/include/asm/mutex.h
View File

@ -1,9 +0,0 @@
/*
* Pull in the generic implementation for the mutex fastpath.
*
* TODO: implement optimized primitives instead, or leave the generic
* implementation in place, or pick the atomic_xchg() based generic
* implementation. (see asm-generic/mutex-xchg.h for details)
*/
#include <asm-generic/mutex-dec.h>

6
arch/m68k/include/asm/percpu.h
View File

@ -1,6 +0,0 @@
#ifndef __ASM_M68K_PERCPU_H
#define __ASM_M68K_PERCPU_H
#include <asm-generic/percpu.h>
#endif /* __ASM_M68K_PERCPU_H */

6
arch/m68k/include/asm/resource.h
View File

@ -1,6 +0,0 @@
#ifndef _M68K_RESOURCE_H
#define _M68K_RESOURCE_H
#include <asm-generic/resource.h>
#endif /* _M68K_RESOURCE_H */

45
arch/m68k/include/asm/sbus.h
View File

@ -1,45 +0,0 @@
/*
* some sbus structures and macros to make usage of sbus drivers possible
*/
#ifndef __M68K_SBUS_H
#define __M68K_SBUS_H
struct sbus_dev {
struct {
unsigned int which_io;
unsigned int phys_addr;
} reg_addrs[1];
};
/* sbus IO functions stolen from include/asm-sparc/io.h for the serial driver */
/* No SBUS on the Sun3, kludge -- sam */
static inline void _sbus_writeb(unsigned char val, unsigned long addr)
{
*(volatile unsigned char *)addr = val;
}
static inline unsigned char _sbus_readb(unsigned long addr)
{
return *(volatile unsigned char *)addr;
}
static inline void _sbus_writel(unsigned long val, unsigned long addr)
{
*(volatile unsigned long *)addr = val;
}
extern inline unsigned long _sbus_readl(unsigned long addr)
{
return *(volatile unsigned long *)addr;
}
#define sbus_readb(a) _sbus_readb((unsigned long)a)
#define sbus_writeb(v, a) _sbus_writeb(v, (unsigned long)a)
#define sbus_readl(a) _sbus_readl((unsigned long)a)
#define sbus_writel(v, a) _sbus_writel(v, (unsigned long)a)
#endif

6
arch/m68k/include/asm/scatterlist.h
View File

@ -1,6 +0,0 @@
#ifndef _M68K_SCATTERLIST_H
#define _M68K_SCATTERLIST_H
#include <asm-generic/scatterlist.h>
#endif /* !(_M68K_SCATTERLIST_H) */

8
arch/m68k/include/asm/sections.h
View File

@ -1,8 +0,0 @@
#ifndef _ASM_M68K_SECTIONS_H
#define _ASM_M68K_SECTIONS_H
#include <asm-generic/sections.h>
extern char _sbss[], _ebss[];
#endif /* _ASM_M68K_SECTIONS_H */

31
arch/m68k/include/asm/shm.h
View File

@ -1,31 +0,0 @@
#ifndef _M68K_SHM_H
#define _M68K_SHM_H
/* format of page table entries that correspond to shared memory pages
currently out in swap space (see also mm/swap.c):
bits 0-1 (PAGE_PRESENT) is = 0
bits 8..2 (SWP_TYPE) are = SHM_SWP_TYPE
bits 31..9 are used like this:
bits 15..9 (SHM_ID) the id of the shared memory segment
bits 30..16 (SHM_IDX) the index of the page within the shared memory segment
(actually only bits 25..16 get used since SHMMAX is so low)
bit 31 (SHM_READ_ONLY) flag whether the page belongs to a read-only attach
*/
/* on the m68k both bits 0 and 1 must be zero */
/* format on the sun3 is similar, but bits 30, 31 are set to zero and all
others are reduced by 2. --m */
#ifndef CONFIG_SUN3
#define SHM_ID_SHIFT 9
#else
#define SHM_ID_SHIFT 7
#endif
#define _SHM_ID_BITS 7
#define SHM_ID_MASK ((1<<_SHM_ID_BITS)-1)
#define SHM_IDX_SHIFT (SHM_ID_SHIFT+_SHM_ID_BITS)
#define _SHM_IDX_BITS 15
#define SHM_IDX_MASK ((1<<_SHM_IDX_BITS)-1)
#endif /* _M68K_SHM_H */

6
arch/m68k/include/asm/siginfo.h
View File

@ -1,6 +0,0 @@
#ifndef _M68K_SIGINFO_H
#define _M68K_SIGINFO_H
#include <asm-generic/siginfo.h>
#endif

6
arch/m68k/include/asm/statfs.h
View File

@ -1,6 +0,0 @@
#ifndef _M68K_STATFS_H
#define _M68K_STATFS_H
#include <asm-generic/statfs.h>
#endif /* _M68K_STATFS_H */

6
arch/m68k/include/asm/topology.h
View File

@ -1,6 +0,0 @@
#ifndef _ASM_M68K_TOPOLOGY_H
#define _ASM_M68K_TOPOLOGY_H
#include <asm-generic/topology.h>
#endif /* _ASM_M68K_TOPOLOGY_H */

22
arch/m68k/include/asm/types.h
View File

@ -1,22 +0,0 @@
#ifndef _M68K_TYPES_H
#define _M68K_TYPES_H
/*
* This file is never included by application software unless
* explicitly requested (e.g., via linux/types.h) in which case the
* application is Linux specific so (user-) name space pollution is
* not a major issue. However, for interoperability, libraries still
* need to be careful to avoid a name clashes.
*/
#include <asm-generic/int-ll64.h>
/*
* These aren't exported outside the kernel to avoid name space clashes
*/
#ifdef __KERNEL__
#define BITS_PER_LONG 32
#endif /* __KERNEL__ */
#endif /* _M68K_TYPES_H */

2
arch/m68k/include/asm/unaligned.h
View File

@ -2,7 +2,7 @@
#define _ASM_M68K_UNALIGNED_H
#if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68000)
#ifdef CONFIG_CPU_HAS_NO_UNALIGNED
#include <linux/unaligned/be_struct.h>
#include <linux/unaligned/le_byteshift.h>
#include <linux/unaligned/generic.h>

1
arch/m68k/include/asm/xor.h
View File

@ -1 +0,0 @@
#include <asm-generic/xor.h>

11
arch/m68k/kernel/setup_no.c
View File

@ -218,13 +218,10 @@ void __init setup_arch(char **cmdline_p)
printk(KERN_INFO "Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)\n");
#endif
pr_debug("KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x "
"BSS=0x%06x-0x%06x\n", (int) &_stext, (int) &_etext,
(int) &_sdata, (int) &_edata,
(int) &_sbss, (int) &_ebss);
pr_debug("MEMORY -> ROMFS=0x%06x-0x%06x MEM=0x%06x-0x%06x\n ",
(int) &_ebss, (int) memory_start,
(int) memory_start, (int) memory_end);
pr_debug("KERNEL -> TEXT=0x%p-0x%p DATA=0x%p-0x%p BSS=0x%p-0x%p\n",
_stext, _etext, _sdata, _edata, __bss_start, __bss_stop);
pr_debug("MEMORY -> ROMFS=0x%p-0x%06lx MEM=0x%06lx-0x%06lx\n ",
__bss_stop, memory_start, memory_start, memory_end);
/* Keep a copy of command line */
*cmdline_p = &command_line[0];

8
arch/m68k/kernel/sys_m68k.c
View File

@ -479,9 +479,13 @@ sys_atomic_cmpxchg_32(unsigned long newval, int oldval, int d3, int d4, int d5,
goto bad_access;
}
mem_value = *mem;
/*
* No need to check for EFAULT; we know that the page is
* present and writable.
*/
__get_user(mem_value, mem);
if (mem_value == oldval)
*mem = newval;
__put_user(newval, mem);
pte_unmap_unlock(pte, ptl);
up_read(&mm->mmap_sem);

2
arch/m68k/kernel/vmlinux-nommu.lds
View File

@ -78,9 +78,7 @@ SECTIONS {
__init_end = .;
}
_sbss = .;
BSS_SECTION(0, 0, 0)
_ebss = .;
_end = .;

2
arch/m68k/kernel/vmlinux-std.lds
View File

@ -31,9 +31,7 @@ SECTIONS
RW_DATA_SECTION(16, PAGE_SIZE, THREAD_SIZE)
_sbss = .;
BSS_SECTION(0, 0, 0)
_ebss = .;
_edata = .; /* End of data section */

2
arch/m68k/kernel/vmlinux-sun3.lds
View File

@ -44,9 +44,7 @@ __init_begin = .;
. = ALIGN(PAGE_SIZE);
__init_end = .;
_sbss = .;
BSS_SECTION(0, 0, 0)
_ebss = .;
_end = . ;

2
arch/m68k/lib/muldi3.c
View File

@ -19,7 +19,7 @@ along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#if defined(CONFIG_M68000) || defined(CONFIG_COLDFIRE)
#ifdef CONFIG_CPU_HAS_NO_MULDIV64
#define SI_TYPE_SIZE 32
#define __BITS4 (SI_TYPE_SIZE / 4)

2
arch/m68k/mm/init_mm.c
View File

@ -104,7 +104,7 @@ void __init print_memmap(void)
MLK_ROUNDUP(__init_begin, __init_end),
MLK_ROUNDUP(_stext, _etext),
MLK_ROUNDUP(_sdata, _edata),
MLK_ROUNDUP(_sbss, _ebss));
MLK_ROUNDUP(__bss_start, __bss_stop));
}
void __init mem_init(void)

2
arch/m68k/mm/init_no.c
View File

@ -91,7 +91,7 @@ void __init mem_init(void)
totalram_pages = free_all_bootmem();
codek = (_etext - _stext) >> 10;
datak = (_ebss - _sdata) >> 10;
datak = (__bss_stop - _sdata) >> 10;
initk = (__init_begin - __init_end) >> 10;
tmp = nr_free_pages() << PAGE_SHIFT;

8
arch/m68k/platform/68328/head-de2.S
View File

@ -60,8 +60,8 @@ _start:
* Move ROM filesystem above bss :-)
*/
moveal #_sbss, %a0 /* romfs at the start of bss */
moveal #_ebss, %a1 /* Set up destination */
moveal #__bss_start, %a0 /* romfs at the start of bss */
moveal #__bss_stop, %a1 /* Set up destination */
movel %a0, %a2 /* Copy of bss start */
movel 8(%a0), %d1 /* Get size of ROMFS */
@ -84,8 +84,8 @@ _start:
* Initialize BSS segment to 0
*/
lea _sbss, %a0
lea _ebss, %a1
lea __bss_start, %a0
lea __bss_stop, %a1
/* Copy 0 to %a0 until %a0 == %a1 */
2: cmpal %a0, %a1

10
arch/m68k/platform/68328/head-pilot.S
View File

@ -110,7 +110,7 @@ L0:
movel #CONFIG_VECTORBASE, %d7
addl #16, %d7
moveal %d7, %a0
moveal #_ebss, %a1
moveal #__bss_stop, %a1
lea %a1@(512), %a2
DBG_PUTC('C')
@ -138,8 +138,8 @@ LD1:
DBG_PUTC('E')
moveal #_sbss, %a0
moveal #_ebss, %a1
moveal #__bss_start, %a0
moveal #__bss_stop, %a1
/* Copy 0 to %a0 until %a0 == %a1 */
L1:
@ -150,7 +150,7 @@ L1:
DBG_PUTC('F')
/* Copy command line from end of bss to command line */
moveal #_ebss, %a0
moveal #__bss_stop, %a0
moveal #command_line, %a1
lea %a1@(512), %a2
@ -165,7 +165,7 @@ L3:
movel #_sdata, %d0
movel %d0, _rambase
movel #_ebss, %d0
movel #__bss_stop, %d0
movel %d0, _ramstart
movel %a4, %d0

4
arch/m68k/platform/68328/head-ram.S
View File

@ -76,8 +76,8 @@ pclp3:
beq pclp3
#endif /* DEBUG */
moveal #0x007ffff0, %ssp
moveal #_sbss, %a0
moveal #_ebss, %a1
moveal #__bss_start, %a0
moveal #__bss_stop, %a1
/* Copy 0 to %a0 until %a0 >= %a1 */
L1:

6
arch/m68k/platform/68328/head-rom.S
View File

@ -59,8 +59,8 @@ _stext: movew #0x2700,%sr
cmpal %a1, %a2
bhi 1b
moveal #_sbss, %a0
moveal #_ebss, %a1
moveal #__bss_start, %a0
moveal #__bss_stop, %a1
/* Copy 0 to %a0 until %a0 == %a1 */
1:
@ -70,7 +70,7 @@ _stext: movew #0x2700,%sr
movel #_sdata, %d0
movel %d0, _rambase
movel #_ebss, %d0
movel #__bss_stop, %d0
movel %d0, _ramstart
movel #RAMEND-CONFIG_MEMORY_RESERVE*0x100000, %d0
movel %d0, _ramend

6
arch/m68k/platform/68360/head-ram.S
View File

@ -219,8 +219,8 @@ LD1:
cmp.l #_edata, %a1
blt LD1
moveal #_sbss, %a0
moveal #_ebss, %a1
moveal #__bss_start, %a0
moveal #__bss_stop, %a1
/* Copy 0 to %a0 until %a0 == %a1 */
L1:
@ -234,7 +234,7 @@ load_quicc:
store_ram_size:
/* Set ram size information */
move.l #_sdata, _rambase
move.l #_ebss, _ramstart
move.l #__bss_stop, _ramstart
move.l #RAMEND, %d0
sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
move.l %d0, _ramend /* Different from RAMEND.*/

8
arch/m68k/platform/68360/head-rom.S
View File

@ -13,7 +13,7 @@
*/
.global _stext
.global _sbss
.global __bss_start
.global _start
.global _rambase
@ -229,8 +229,8 @@ LD1:
cmp.l #_edata, %a1
blt LD1
moveal #_sbss, %a0
moveal #_ebss, %a1
moveal #__bss_start, %a0
moveal #__bss_stop, %a1
/* Copy 0 to %a0 until %a0 == %a1 */
L1:
@ -244,7 +244,7 @@ load_quicc:
store_ram_size:
/* Set ram size information */
move.l #_sdata, _rambase
move.l #_ebss, _ramstart
move.l #__bss_stop, _ramstart
move.l #RAMEND, %d0
sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
move.l %d0, _ramend /* Different from RAMEND.*/

10
arch/m68k/platform/coldfire/head.S
View File

@ -230,8 +230,8 @@ _vstart:
/*
* Move ROM filesystem above bss :-)
*/
lea _sbss,%a0 /* get start of bss */
lea _ebss,%a1 /* set up destination */
lea __bss_start,%a0 /* get start of bss */
lea __bss_stop,%a1 /* set up destination */
movel %a0,%a2 /* copy of bss start */
movel 8(%a0),%d0 /* get size of ROMFS */
@ -249,7 +249,7 @@ _copy_romfs:
bne _copy_romfs
#else /* CONFIG_ROMFS_FS */
lea _ebss,%a1
lea __bss_stop,%a1
movel %a1,_ramstart
#endif /* CONFIG_ROMFS_FS */
@ -257,8 +257,8 @@ _copy_romfs:
/*
* Zero out the bss region.
*/
lea _sbss,%a0 /* get start of bss */
lea _ebss,%a1 /* get end of bss */
lea __bss_start,%a0 /* get start of bss */
lea __bss_stop,%a1 /* get end of bss */
clrl %d0 /* set value */
_clear_bss:
movel %d0,(%a0)+ /* clear each word */

48
arch/m68k/sun3/prom/init.c
View File

@ -22,57 +22,13 @@ int prom_root_node;
struct linux_nodeops *prom_nodeops;
/* You must call prom_init() before you attempt to use any of the
* routines in the prom library. It returns 0 on success, 1 on
* failure. It gets passed the pointer to the PROM vector.
* routines in the prom library.
* It gets passed the pointer to the PROM vector.
*/
extern void prom_meminit(void);
extern void prom_ranges_init(void);
void __init prom_init(struct linux_romvec *rp)
{
romvec = rp;
#ifndef CONFIG_SUN3
switch(romvec->pv_romvers) {
case 0:
prom_vers = PROM_V0;
break;
case 2:
prom_vers = PROM_V2;
break;
case 3:
prom_vers = PROM_V3;
break;
case 4:
prom_vers = PROM_P1275;
prom_printf("PROMLIB: Sun IEEE Prom not supported yet\n");
prom_halt();
break;
default:
prom_printf("PROMLIB: Bad PROM version %d\n",
romvec->pv_romvers);
prom_halt();
break;
};
prom_rev = romvec->pv_plugin_revision;
prom_prev = romvec->pv_printrev;
prom_nodeops = romvec->pv_nodeops;
prom_root_node = prom_getsibling(0);
if((prom_root_node == 0) || (prom_root_node == -1))
prom_halt();
if((((unsigned long) prom_nodeops) == 0) ||
(((unsigned long) prom_nodeops) == -1))
prom_halt();
prom_meminit();
prom_ranges_init();
#endif
// printk("PROMLIB: Sun Boot Prom Version %d Revision %d\n",
// romvec->pv_romvers, prom_rev);
/* Initialization successful. */
return;

4
arch/microblaze/include/asm/sections.h
View File

@ -18,10 +18,6 @@ extern char _ssbss[], _esbss[];
extern unsigned long __ivt_start[], __ivt_end[];
extern char _etext[], _stext[];
# ifdef CONFIG_MTD_UCLINUX
extern char *_ebss;
# endif
extern u32 _fdt_start[], _fdt_end[];
# endif /* !__ASSEMBLY__ */

3
arch/microblaze/kernel/microblaze_ksyms.c
View File

@ -21,9 +21,6 @@
#include <linux/ftrace.h>
#include <linux/uaccess.h>
extern char *_ebss;
EXPORT_SYMBOL_GPL(_ebss);
#ifdef CONFIG_FUNCTION_TRACER
extern void _mcount(void);
EXPORT_SYMBOL(_mcount);

4
arch/microblaze/kernel/setup.c
View File

@ -121,7 +121,7 @@ void __init machine_early_init(const char *cmdline, unsigned int ram,
/* Move ROMFS out of BSS before clearing it */
if (romfs_size > 0) {
memmove(&_ebss, (int *)romfs_base, romfs_size);
memmove(&__bss_stop, (int *)romfs_base, romfs_size);
klimit += romfs_size;
}
#endif
@ -165,7 +165,7 @@ void __init machine_early_init(const char *cmdline, unsigned int ram,
BUG_ON(romfs_size < 0); /* What else can we do? */
printk("Moved 0x%08x bytes from 0x%08x to 0x%08x\n",
romfs_size, romfs_base, (unsigned)&_ebss);
romfs_size, romfs_base, (unsigned)&__bss_stop);
printk("New klimit: 0x%08x\n", (unsigned)klimit);
#endif

1
arch/microblaze/kernel/vmlinux.lds.S
View File

@ -131,7 +131,6 @@ SECTIONS {
*(COMMON)
. = ALIGN (4) ;
__bss_stop = . ;
_ebss = . ;
}
. = ALIGN(PAGE_SIZE);
_end = .;

1
arch/sh/include/asm/sections.h
View File

@ -6,7 +6,6 @@
extern long __nosave_begin, __nosave_end;
extern long __machvec_start, __machvec_end;
extern char __uncached_start, __uncached_end;
extern char _ebss[];
extern char __start_eh_frame[], __stop_eh_frame[];
#endif /* __ASM_SH_SECTIONS_H */

2
arch/sh/kernel/setup.c
View File

@ -273,7 +273,7 @@ void __init setup_arch(char **cmdline_p)
data_resource.start = virt_to_phys(_etext);
data_resource.end = virt_to_phys(_edata)-1;
bss_resource.start = virt_to_phys(__bss_start);
bss_resource.end = virt_to_phys(_ebss)-1;
bss_resource.end = virt_to_phys(__bss_stop)-1;
#ifdef CONFIG_CMDLINE_OVERWRITE
strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line));

1
arch/sh/kernel/sh_ksyms_32.c
View File

@ -19,7 +19,6 @@ EXPORT_SYMBOL(csum_partial);
EXPORT_SYMBOL(csum_partial_copy_generic);
EXPORT_SYMBOL(copy_page);
EXPORT_SYMBOL(__clear_user);
EXPORT_SYMBOL(_ebss);
EXPORT_SYMBOL(empty_zero_page);
#define DECLARE_EXPORT(name) \

1
arch/sh/kernel/vmlinux.lds.S
View File

@ -78,7 +78,6 @@ SECTIONS
. = ALIGN(PAGE_SIZE);
__init_end = .;
BSS_SECTION(0, PAGE_SIZE, 4)
_ebss = .; /* uClinux MTD sucks */
_end = . ;
STABS_DEBUG

8
arch/sh/lib/mcount.S
View File

@ -39,7 +39,7 @@
*
* Make sure the stack pointer contains a valid address. Valid
* addresses for kernel stacks are anywhere after the bss
* (after _ebss) and anywhere in init_thread_union (init_stack).
* (after __bss_stop) and anywhere in init_thread_union (init_stack).
*/
#define STACK_CHECK() \
mov #(THREAD_SIZE >> 10), r0; \
@ -60,7 +60,7 @@
cmp/hi r2, r1; \
bf stack_panic; \
\
/* If sp > _ebss then we're OK. */ \
/* If sp > __bss_stop then we're OK. */ \
mov.l .L_ebss, r1; \
cmp/hi r1, r15; \
bt 1f; \
@ -70,7 +70,7 @@
cmp/hs r1, r15; \
bf stack_panic; \
\
/* If sp > init_stack && sp < _ebss, not OK. */ \
/* If sp > init_stack && sp < __bss_stop, not OK. */ \
add r0, r1; \
cmp/hs r1, r15; \
bt stack_panic; \
@ -292,8 +292,6 @@ stack_panic:
nop
.align 2
.L_ebss:
.long _ebss
.L_init_thread_union:
.long init_thread_union
.Lpanic:

5
drivers/mtd/maps/uclinux.c
View File

@ -19,14 +19,13 @@
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
#include <asm/io.h>
#include <asm/sections.h>
/****************************************************************************/
extern char _ebss;
struct map_info uclinux_ram_map = {
.name = "RAM",
.phys = (unsigned long)&_ebss,
.phys = (unsigned long)__bss_stop,
.size = 0,
};

2
drivers/zorro/zorro.c
View File

@ -37,7 +37,6 @@ struct zorro_dev zorro_autocon[ZORRO_NUM_AUTO];
*/
struct zorro_bus {
struct list_head devices; /* list of devices on this bus */
struct device dev;
};
@ -136,7 +135,6 @@ static int __init amiga_zorro_probe(struct platform_device *pdev)
if (!bus)
return -ENOMEM;
INIT_LIST_HEAD(&bus->devices);
bus->dev.parent = &pdev->dev;
dev_set_name(&bus->dev, "zorro");
error = device_register(&bus->dev);