From 57e3bbd2cb8f98dfd78298998d42d6c4cd414083 Mon Sep 17 00:00:00 2001 From: Shubhrajyoti Datta Date: Fri, 24 Mar 2023 16:19:58 +0530 Subject: [PATCH] clk: zynqmp: pll: Remove the limit The range is taken care in the zynqmp_pll_round_rate. Remove the rate range in the zynqmp_clk_register_pll() to prevent the early truncation of the frequencies and also allow multiple combinations of child and parent to get more accurate rates. Signed-off-by: Shubhrajyoti Datta Link: https://lore.kernel.org/r/20230324104958.25099-1-shubhrajyoti.datta@amd.com Signed-off-by: Stephen Boyd --- drivers/clk/zynqmp/pll.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/clk/zynqmp/pll.c b/drivers/clk/zynqmp/pll.c index 0d3e1377b092..7411a7fd50ac 100644 --- a/drivers/clk/zynqmp/pll.c +++ b/drivers/clk/zynqmp/pll.c @@ -341,7 +341,5 @@ struct clk_hw *zynqmp_clk_register_pll(const char *name, u32 clk_id, return ERR_PTR(ret); } - clk_hw_set_rate_range(hw, PS_PLL_VCO_MIN, PS_PLL_VCO_MAX); - return hw; }