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gma500: Replace SDVO code with slightly modified version from i915
Our current SDVO implementation is not working properly, so replace it with a modified version of the i915. Further testing and debugging is needed to make sure we can handle the different SDVO setups and wiring. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Patrik Jakobsson
Dave Airlie
parent
5c0c1d50d7
commit
5736995b47
@ -260,6 +260,16 @@ struct psb_intel_opregion {
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int enabled;
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};
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struct sdvo_device_mapping {
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u8 initialized;
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u8 dvo_port;
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u8 slave_addr;
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u8 dvo_wiring;
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u8 i2c_pin;
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u8 i2c_speed;
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u8 ddc_pin;
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};
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struct intel_gmbus {
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struct i2c_adapter adapter;
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struct i2c_adapter *force_bit;
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@ -345,6 +355,15 @@ struct drm_psb_private {
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/* gmbus */
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struct intel_gmbus *gmbus;
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/* Used by SDVO */
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int crt_ddc_pin;
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/* FIXME: The mappings should be parsed from bios but for now we can
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pretend there are no mappings available */
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struct sdvo_device_mapping sdvo_mappings[2];
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u32 hotplug_supported_mask;
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struct drm_property *broadcast_rgb_property;
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struct drm_property *force_audio_property;
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/*
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* LVDS info
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*/
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@ -552,6 +552,14 @@ void psb_intel_encoder_commit(struct drm_encoder *encoder)
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encoder_funcs->dpms(encoder, DRM_MODE_DPMS_ON);
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}
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void psb_intel_encoder_destroy(struct drm_encoder *encoder)
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{
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struct psb_intel_encoder *intel_encoder = to_psb_intel_encoder(encoder);
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drm_encoder_cleanup(encoder);
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kfree(intel_encoder);
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}
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static bool psb_intel_crtc_mode_fixup(struct drm_crtc *crtc,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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@ -39,6 +39,25 @@
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#define INTEL_I2C_BUS_DVO 1
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#define INTEL_I2C_BUS_SDVO 2
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/* Intel Pipe Clone Bit */
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#define INTEL_HDMIB_CLONE_BIT 1
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#define INTEL_HDMIC_CLONE_BIT 2
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#define INTEL_HDMID_CLONE_BIT 3
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#define INTEL_HDMIE_CLONE_BIT 4
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#define INTEL_HDMIF_CLONE_BIT 5
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#define INTEL_SDVO_NON_TV_CLONE_BIT 6
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#define INTEL_SDVO_TV_CLONE_BIT 7
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#define INTEL_SDVO_LVDS_CLONE_BIT 8
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#define INTEL_ANALOG_CLONE_BIT 9
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#define INTEL_TV_CLONE_BIT 10
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#define INTEL_DP_B_CLONE_BIT 11
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#define INTEL_DP_C_CLONE_BIT 12
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#define INTEL_DP_D_CLONE_BIT 13
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#define INTEL_LVDS_CLONE_BIT 14
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#define INTEL_DVO_TMDS_CLONE_BIT 15
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#define INTEL_DVO_LVDS_CLONE_BIT 16
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#define INTEL_EDP_CLONE_BIT 17
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/* these are outputs from the chip - integrated only
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* external chips are via DVO or SDVO output */
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#define INTEL_OUTPUT_UNUSED 0
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@ -56,6 +75,25 @@
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#define INTEL_DVO_CHIP_TMDS 2
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#define INTEL_DVO_CHIP_TVOUT 4
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#define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
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#define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
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static inline void
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psb_intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
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int multiplier)
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{
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mode->clock *= multiplier;
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mode->private_flags |= multiplier;
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}
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static inline int
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psb_intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
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{
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return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK)
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>> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
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}
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/*
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* Hold information useally put on the device driver privates here,
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* since it needs to be shared across multiple of devices drivers privates.
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@ -173,7 +211,7 @@ extern bool psb_intel_ddc_probe(struct i2c_adapter *adapter);
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extern void psb_intel_crtc_init(struct drm_device *dev, int pipe,
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struct psb_intel_mode_device *mode_dev);
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extern void psb_intel_crt_init(struct drm_device *dev);
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extern void psb_intel_sdvo_init(struct drm_device *dev, int output_device);
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extern bool psb_intel_sdvo_init(struct drm_device *dev, int output_device);
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extern void psb_intel_dvo_init(struct drm_device *dev);
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extern void psb_intel_tv_init(struct drm_device *dev);
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extern void psb_intel_lvds_init(struct drm_device *dev,
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@ -190,6 +228,7 @@ extern void mid_dsi_init(struct drm_device *dev,
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extern void psb_intel_crtc_load_lut(struct drm_crtc *crtc);
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extern void psb_intel_encoder_prepare(struct drm_encoder *encoder);
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extern void psb_intel_encoder_commit(struct drm_encoder *encoder);
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extern void psb_intel_encoder_destroy(struct drm_encoder *encoder);
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static inline struct psb_intel_encoder *psb_intel_attached_encoder(
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struct drm_connector *connector)
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@ -376,6 +376,8 @@
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#define SDVO_PIPE_B_SELECT (1 << 30)
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#define SDVO_STALL_SELECT (1 << 29)
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#define SDVO_INTERRUPT_ENABLE (1 << 26)
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#define SDVO_COLOR_RANGE_16_235 (1 << 8)
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#define SDVO_AUDIO_ENABLE (1 << 6)
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/**
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* 915G/GM SDVO pixel multiplier.
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File diff suppressed because it is too large
Load Diff
@ -1,25 +1,33 @@
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/*
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* SDVO command definitions and structures.
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* Copyright ? 2006-2007 Intel Corporation
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*
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* Copyright (c) 2008, Intel Corporation
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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*/
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/**
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* @file SDVO command definitions and structures.
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*/
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#define SDVO_OUTPUT_FIRST (0)
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#define SDVO_OUTPUT_TMDS0 (1 << 0)
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#define SDVO_OUTPUT_RGB0 (1 << 1)
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@ -38,62 +46,64 @@
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#define SDVO_OUTPUT_LAST (14)
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struct psb_intel_sdvo_caps {
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u8 vendor_id;
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u8 device_id;
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u8 device_rev_id;
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u8 sdvo_version_major;
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u8 sdvo_version_minor;
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unsigned int sdvo_inputs_mask:2;
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unsigned int smooth_scaling:1;
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unsigned int sharp_scaling:1;
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unsigned int up_scaling:1;
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unsigned int down_scaling:1;
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unsigned int stall_support:1;
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unsigned int pad:1;
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u16 output_flags;
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} __packed;
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u8 vendor_id;
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u8 device_id;
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u8 device_rev_id;
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u8 sdvo_version_major;
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u8 sdvo_version_minor;
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unsigned int sdvo_inputs_mask:2;
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unsigned int smooth_scaling:1;
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unsigned int sharp_scaling:1;
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unsigned int up_scaling:1;
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unsigned int down_scaling:1;
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unsigned int stall_support:1;
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unsigned int pad:1;
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u16 output_flags;
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} __attribute__((packed));
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/** This matches the EDID DTD structure, more or less */
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struct psb_intel_sdvo_dtd {
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struct {
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u16 clock; /**< pixel clock, in 10kHz units */
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u8 h_active; /**< lower 8 bits (pixels) */
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u8 h_blank; /**< lower 8 bits (pixels) */
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u8 h_high; /**< upper 4 bits each h_active, h_blank */
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u8 v_active; /**< lower 8 bits (lines) */
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u8 v_blank; /**< lower 8 bits (lines) */
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u8 v_high; /**< upper 4 bits each v_active, v_blank */
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} part1;
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struct {
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u16 clock; /**< pixel clock, in 10kHz units */
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u8 h_active; /**< lower 8 bits (pixels) */
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u8 h_blank; /**< lower 8 bits (pixels) */
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u8 h_high; /**< upper 4 bits each h_active, h_blank */
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u8 v_active; /**< lower 8 bits (lines) */
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u8 v_blank; /**< lower 8 bits (lines) */
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u8 v_high; /**< upper 4 bits each v_active, v_blank */
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} part1;
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struct {
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u8 h_sync_off;
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/**< lower 8 bits, from hblank start */
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u8 h_sync_width;/**< lower 8 bits (pixels) */
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struct {
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u8 h_sync_off; /**< lower 8 bits, from hblank start */
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u8 h_sync_width; /**< lower 8 bits (pixels) */
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/** lower 4 bits each vsync offset, vsync width */
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u8 v_sync_off_width;
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u8 v_sync_off_width;
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/**
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* 2 high bits of hsync offset, 2 high bits of hsync width,
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* bits 4-5 of vsync offset, and 2 high bits of vsync width.
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*/
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u8 sync_off_width_high;
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u8 dtd_flags;
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u8 sdvo_flags;
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u8 sync_off_width_high;
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u8 dtd_flags;
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u8 sdvo_flags;
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/** bits 6-7 of vsync offset at bits 6-7 */
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u8 v_sync_off_high;
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u8 reserved;
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} part2;
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} __packed;
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u8 v_sync_off_high;
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u8 reserved;
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} part2;
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} __attribute__((packed));
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struct psb_intel_sdvo_pixel_clock_range {
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u16 min; /**< pixel clock, in 10kHz units */
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u16 max; /**< pixel clock, in 10kHz units */
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} __packed;
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u16 min; /**< pixel clock, in 10kHz units */
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u16 max; /**< pixel clock, in 10kHz units */
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} __attribute__((packed));
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struct psb_intel_sdvo_preferred_input_timing_args {
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u16 clock;
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u16 width;
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u16 height;
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} __packed;
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u16 clock;
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u16 width;
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u16 height;
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u8 interlace:1;
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u8 scaled:1;
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u8 pad:6;
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} __attribute__((packed));
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/* I2C registers for SDVO */
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#define SDVO_I2C_ARG_0 0x07
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@ -129,7 +139,7 @@ struct psb_intel_sdvo_preferred_input_timing_args {
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#define SDVO_CMD_RESET 0x01
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/** Returns a struct psb_intel_sdvo_caps */
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/** Returns a struct intel_sdvo_caps */
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#define SDVO_CMD_GET_DEVICE_CAPS 0x02
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#define SDVO_CMD_GET_FIRMWARE_REV 0x86
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@ -144,19 +154,18 @@ struct psb_intel_sdvo_preferred_input_timing_args {
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*/
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#define SDVO_CMD_GET_TRAINED_INPUTS 0x03
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struct psb_intel_sdvo_get_trained_inputs_response {
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unsigned int input0_trained:1;
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unsigned int input1_trained:1;
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unsigned int pad:6;
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} __packed;
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unsigned int input0_trained:1;
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unsigned int input1_trained:1;
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unsigned int pad:6;
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} __attribute__((packed));
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/** Returns a struct psb_intel_sdvo_output_flags of active outputs. */
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/** Returns a struct intel_sdvo_output_flags of active outputs. */
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#define SDVO_CMD_GET_ACTIVE_OUTPUTS 0x04
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/**
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* Sets the current set of active outputs.
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*
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* Takes a struct psb_intel_sdvo_output_flags.
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* Must be preceded by a SET_IN_OUT_MAP
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* Takes a struct intel_sdvo_output_flags. Must be preceded by a SET_IN_OUT_MAP
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* on multi-output devices.
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*/
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#define SDVO_CMD_SET_ACTIVE_OUTPUTS 0x05
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@ -164,9 +173,12 @@ struct psb_intel_sdvo_get_trained_inputs_response {
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/**
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* Returns the current mapping of SDVO inputs to outputs on the device.
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*
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* Returns two struct psb_intel_sdvo_output_flags structures.
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* Returns two struct intel_sdvo_output_flags structures.
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*/
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#define SDVO_CMD_GET_IN_OUT_MAP 0x06
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struct psb_intel_sdvo_in_out_map {
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u16 in0, in1;
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};
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/**
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* Sets the current mapping of SDVO inputs to outputs on the device.
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@ -176,32 +188,33 @@ struct psb_intel_sdvo_get_trained_inputs_response {
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#define SDVO_CMD_SET_IN_OUT_MAP 0x07
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/**
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* Returns a struct psb_intel_sdvo_output_flags of attached displays.
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* Returns a struct intel_sdvo_output_flags of attached displays.
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*/
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#define SDVO_CMD_GET_ATTACHED_DISPLAYS 0x0b
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/**
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* Returns a struct psb_intel_sdvo_ouptut_flags of displays supporting hot plugging.
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* Returns a struct intel_sdvo_ouptut_flags of displays supporting hot plugging.
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*/
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#define SDVO_CMD_GET_HOT_PLUG_SUPPORT 0x0c
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/**
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* Takes a struct psb_intel_sdvo_output_flags.
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* Takes a struct intel_sdvo_output_flags.
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*/
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#define SDVO_CMD_SET_ACTIVE_HOT_PLUG 0x0d
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/**
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* Returns a struct psb_intel_sdvo_output_flags of displays with hot plug
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* Returns a struct intel_sdvo_output_flags of displays with hot plug
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* interrupts enabled.
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*/
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#define SDVO_CMD_GET_ACTIVE_HOT_PLUG 0x0e
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#define SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE 0x0f
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struct psb_intel_sdvo_get_interrupt_event_source_response {
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u16 interrupt_status;
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unsigned int ambient_light_interrupt:1;
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unsigned int pad:7;
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} __packed;
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struct intel_sdvo_get_interrupt_event_source_response {
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u16 interrupt_status;
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unsigned int ambient_light_interrupt:1;
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unsigned int hdmi_audio_encrypt_change:1;
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unsigned int pad:6;
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} __attribute__((packed));
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/**
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* Selects which input is affected by future input commands.
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@ -212,12 +225,12 @@ struct psb_intel_sdvo_get_interrupt_event_source_response {
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*/
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#define SDVO_CMD_SET_TARGET_INPUT 0x10
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struct psb_intel_sdvo_set_target_input_args {
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unsigned int target_1:1;
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unsigned int pad:7;
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} __packed;
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unsigned int target_1:1;
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unsigned int pad:7;
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} __attribute__((packed));
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/**
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* Takes a struct psb_intel_sdvo_output_flags of which outputs are targeted by
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* Takes a struct intel_sdvo_output_flags of which outputs are targeted by
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* future output commands.
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*
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* Affected commands inclue SET_OUTPUT_TIMINGS_PART[12],
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@ -282,9 +295,9 @@ struct psb_intel_sdvo_set_target_input_args {
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#define SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1 0x1b
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#define SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2 0x1c
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/** Returns a struct psb_intel_sdvo_pixel_clock_range */
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/** Returns a struct intel_sdvo_pixel_clock_range */
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#define SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE 0x1d
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/** Returns a struct psb_intel_sdvo_pixel_clock_range */
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/** Returns a struct intel_sdvo_pixel_clock_range */
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#define SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE 0x1e
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/** Returns a byte bitfield containing SDVO_CLOCK_RATE_MULT_* flags */
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@ -299,40 +312,412 @@ struct psb_intel_sdvo_set_target_input_args {
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# define SDVO_CLOCK_RATE_MULT_4X (1 << 3)
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#define SDVO_CMD_GET_SUPPORTED_TV_FORMATS 0x27
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/** 6 bytes of bit flags for TV formats shared by all TV format functions */
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struct psb_intel_sdvo_tv_format {
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unsigned int ntsc_m:1;
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unsigned int ntsc_j:1;
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unsigned int ntsc_443:1;
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unsigned int pal_b:1;
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unsigned int pal_d:1;
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unsigned int pal_g:1;
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unsigned int pal_h:1;
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unsigned int pal_i:1;
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unsigned int pal_m:1;
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unsigned int pal_n:1;
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unsigned int pal_nc:1;
|
||||
unsigned int pal_60:1;
|
||||
unsigned int secam_b:1;
|
||||
unsigned int secam_d:1;
|
||||
unsigned int secam_g:1;
|
||||
unsigned int secam_k:1;
|
||||
|
||||
unsigned int secam_k1:1;
|
||||
unsigned int secam_l:1;
|
||||
unsigned int secam_60:1;
|
||||
unsigned int hdtv_std_smpte_240m_1080i_59:1;
|
||||
unsigned int hdtv_std_smpte_240m_1080i_60:1;
|
||||
unsigned int hdtv_std_smpte_260m_1080i_59:1;
|
||||
unsigned int hdtv_std_smpte_260m_1080i_60:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080i_50:1;
|
||||
|
||||
unsigned int hdtv_std_smpte_274m_1080i_59:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080i_60:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_23:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_24:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_25:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_29:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_30:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_50:1;
|
||||
|
||||
unsigned int hdtv_std_smpte_274m_1080p_59:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_60:1;
|
||||
unsigned int hdtv_std_smpte_295m_1080i_50:1;
|
||||
unsigned int hdtv_std_smpte_295m_1080p_50:1;
|
||||
unsigned int hdtv_std_smpte_296m_720p_59:1;
|
||||
unsigned int hdtv_std_smpte_296m_720p_60:1;
|
||||
unsigned int hdtv_std_smpte_296m_720p_50:1;
|
||||
unsigned int hdtv_std_smpte_293m_480p_59:1;
|
||||
|
||||
unsigned int hdtv_std_smpte_170m_480i_59:1;
|
||||
unsigned int hdtv_std_iturbt601_576i_50:1;
|
||||
unsigned int hdtv_std_iturbt601_576p_50:1;
|
||||
unsigned int hdtv_std_eia_7702a_480i_60:1;
|
||||
unsigned int hdtv_std_eia_7702a_480p_60:1;
|
||||
unsigned int pad:3;
|
||||
} __attribute__((packed));
|
||||
|
||||
#define SDVO_CMD_GET_TV_FORMAT 0x28
|
||||
|
||||
#define SDVO_CMD_SET_TV_FORMAT 0x29
|
||||
|
||||
/** Returns the resolutiosn that can be used with the given TV format */
|
||||
#define SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT 0x83
|
||||
struct psb_intel_sdvo_sdtv_resolution_request {
|
||||
unsigned int ntsc_m:1;
|
||||
unsigned int ntsc_j:1;
|
||||
unsigned int ntsc_443:1;
|
||||
unsigned int pal_b:1;
|
||||
unsigned int pal_d:1;
|
||||
unsigned int pal_g:1;
|
||||
unsigned int pal_h:1;
|
||||
unsigned int pal_i:1;
|
||||
|
||||
unsigned int pal_m:1;
|
||||
unsigned int pal_n:1;
|
||||
unsigned int pal_nc:1;
|
||||
unsigned int pal_60:1;
|
||||
unsigned int secam_b:1;
|
||||
unsigned int secam_d:1;
|
||||
unsigned int secam_g:1;
|
||||
unsigned int secam_k:1;
|
||||
|
||||
unsigned int secam_k1:1;
|
||||
unsigned int secam_l:1;
|
||||
unsigned int secam_60:1;
|
||||
unsigned int pad:5;
|
||||
} __attribute__((packed));
|
||||
|
||||
struct psb_intel_sdvo_sdtv_resolution_reply {
|
||||
unsigned int res_320x200:1;
|
||||
unsigned int res_320x240:1;
|
||||
unsigned int res_400x300:1;
|
||||
unsigned int res_640x350:1;
|
||||
unsigned int res_640x400:1;
|
||||
unsigned int res_640x480:1;
|
||||
unsigned int res_704x480:1;
|
||||
unsigned int res_704x576:1;
|
||||
|
||||
unsigned int res_720x350:1;
|
||||
unsigned int res_720x400:1;
|
||||
unsigned int res_720x480:1;
|
||||
unsigned int res_720x540:1;
|
||||
unsigned int res_720x576:1;
|
||||
unsigned int res_768x576:1;
|
||||
unsigned int res_800x600:1;
|
||||
unsigned int res_832x624:1;
|
||||
|
||||
unsigned int res_920x766:1;
|
||||
unsigned int res_1024x768:1;
|
||||
unsigned int res_1280x1024:1;
|
||||
unsigned int pad:5;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* Get supported resolution with squire pixel aspect ratio that can be
|
||||
scaled for the requested HDTV format */
|
||||
#define SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT 0x85
|
||||
|
||||
struct psb_intel_sdvo_hdtv_resolution_request {
|
||||
unsigned int hdtv_std_smpte_240m_1080i_59:1;
|
||||
unsigned int hdtv_std_smpte_240m_1080i_60:1;
|
||||
unsigned int hdtv_std_smpte_260m_1080i_59:1;
|
||||
unsigned int hdtv_std_smpte_260m_1080i_60:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080i_50:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080i_59:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080i_60:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_23:1;
|
||||
|
||||
unsigned int hdtv_std_smpte_274m_1080p_24:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_25:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_29:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_30:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_50:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_59:1;
|
||||
unsigned int hdtv_std_smpte_274m_1080p_60:1;
|
||||
unsigned int hdtv_std_smpte_295m_1080i_50:1;
|
||||
|
||||
unsigned int hdtv_std_smpte_295m_1080p_50:1;
|
||||
unsigned int hdtv_std_smpte_296m_720p_59:1;
|
||||
unsigned int hdtv_std_smpte_296m_720p_60:1;
|
||||
unsigned int hdtv_std_smpte_296m_720p_50:1;
|
||||
unsigned int hdtv_std_smpte_293m_480p_59:1;
|
||||
unsigned int hdtv_std_smpte_170m_480i_59:1;
|
||||
unsigned int hdtv_std_iturbt601_576i_50:1;
|
||||
unsigned int hdtv_std_iturbt601_576p_50:1;
|
||||
|
||||
unsigned int hdtv_std_eia_7702a_480i_60:1;
|
||||
unsigned int hdtv_std_eia_7702a_480p_60:1;
|
||||
unsigned int pad:6;
|
||||
} __attribute__((packed));
|
||||
|
||||
struct psb_intel_sdvo_hdtv_resolution_reply {
|
||||
unsigned int res_640x480:1;
|
||||
unsigned int res_800x600:1;
|
||||
unsigned int res_1024x768:1;
|
||||
unsigned int res_1280x960:1;
|
||||
unsigned int res_1400x1050:1;
|
||||
unsigned int res_1600x1200:1;
|
||||
unsigned int res_1920x1440:1;
|
||||
unsigned int res_2048x1536:1;
|
||||
|
||||
unsigned int res_2560x1920:1;
|
||||
unsigned int res_3200x2400:1;
|
||||
unsigned int res_3840x2880:1;
|
||||
unsigned int pad1:5;
|
||||
|
||||
unsigned int res_848x480:1;
|
||||
unsigned int res_1064x600:1;
|
||||
unsigned int res_1280x720:1;
|
||||
unsigned int res_1360x768:1;
|
||||
unsigned int res_1704x960:1;
|
||||
unsigned int res_1864x1050:1;
|
||||
unsigned int res_1920x1080:1;
|
||||
unsigned int res_2128x1200:1;
|
||||
|
||||
unsigned int res_2560x1400:1;
|
||||
unsigned int res_2728x1536:1;
|
||||
unsigned int res_3408x1920:1;
|
||||
unsigned int res_4264x2400:1;
|
||||
unsigned int res_5120x2880:1;
|
||||
unsigned int pad2:3;
|
||||
|
||||
unsigned int res_768x480:1;
|
||||
unsigned int res_960x600:1;
|
||||
unsigned int res_1152x720:1;
|
||||
unsigned int res_1124x768:1;
|
||||
unsigned int res_1536x960:1;
|
||||
unsigned int res_1680x1050:1;
|
||||
unsigned int res_1728x1080:1;
|
||||
unsigned int res_1920x1200:1;
|
||||
|
||||
unsigned int res_2304x1440:1;
|
||||
unsigned int res_2456x1536:1;
|
||||
unsigned int res_3072x1920:1;
|
||||
unsigned int res_3840x2400:1;
|
||||
unsigned int res_4608x2880:1;
|
||||
unsigned int pad3:3;
|
||||
|
||||
unsigned int res_1280x1024:1;
|
||||
unsigned int pad4:7;
|
||||
|
||||
unsigned int res_1280x768:1;
|
||||
unsigned int pad5:7;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* Get supported power state returns info for encoder and monitor, rely on
|
||||
last SetTargetInput and SetTargetOutput calls */
|
||||
#define SDVO_CMD_GET_SUPPORTED_POWER_STATES 0x2a
|
||||
/* Get power state returns info for encoder and monitor, rely on last
|
||||
SetTargetInput and SetTargetOutput calls */
|
||||
#define SDVO_CMD_GET_POWER_STATE 0x2b
|
||||
#define SDVO_CMD_GET_ENCODER_POWER_STATE 0x2b
|
||||
#define SDVO_CMD_SET_ENCODER_POWER_STATE 0x2c
|
||||
# define SDVO_ENCODER_STATE_ON (1 << 0)
|
||||
# define SDVO_ENCODER_STATE_STANDBY (1 << 1)
|
||||
# define SDVO_ENCODER_STATE_SUSPEND (1 << 2)
|
||||
# define SDVO_ENCODER_STATE_OFF (1 << 3)
|
||||
# define SDVO_MONITOR_STATE_ON (1 << 4)
|
||||
# define SDVO_MONITOR_STATE_STANDBY (1 << 5)
|
||||
# define SDVO_MONITOR_STATE_SUSPEND (1 << 6)
|
||||
# define SDVO_MONITOR_STATE_OFF (1 << 7)
|
||||
|
||||
#define SDVO_CMD_SET_TV_RESOLUTION_SUPPORT 0x93
|
||||
#define SDVO_CMD_GET_MAX_PANEL_POWER_SEQUENCING 0x2d
|
||||
#define SDVO_CMD_GET_PANEL_POWER_SEQUENCING 0x2e
|
||||
#define SDVO_CMD_SET_PANEL_POWER_SEQUENCING 0x2f
|
||||
/**
|
||||
* The panel power sequencing parameters are in units of milliseconds.
|
||||
* The high fields are bits 8:9 of the 10-bit values.
|
||||
*/
|
||||
struct psb_sdvo_panel_power_sequencing {
|
||||
u8 t0;
|
||||
u8 t1;
|
||||
u8 t2;
|
||||
u8 t3;
|
||||
u8 t4;
|
||||
|
||||
unsigned int t0_high:2;
|
||||
unsigned int t1_high:2;
|
||||
unsigned int t2_high:2;
|
||||
unsigned int t3_high:2;
|
||||
|
||||
unsigned int t4_high:2;
|
||||
unsigned int pad:6;
|
||||
} __attribute__((packed));
|
||||
|
||||
#define SDVO_CMD_GET_MAX_BACKLIGHT_LEVEL 0x30
|
||||
struct sdvo_max_backlight_reply {
|
||||
u8 max_value;
|
||||
u8 default_value;
|
||||
} __attribute__((packed));
|
||||
|
||||
#define SDVO_CMD_GET_BACKLIGHT_LEVEL 0x31
|
||||
#define SDVO_CMD_SET_BACKLIGHT_LEVEL 0x32
|
||||
|
||||
#define SDVO_CMD_GET_AMBIENT_LIGHT 0x33
|
||||
struct sdvo_get_ambient_light_reply {
|
||||
u16 trip_low;
|
||||
u16 trip_high;
|
||||
u16 value;
|
||||
} __attribute__((packed));
|
||||
#define SDVO_CMD_SET_AMBIENT_LIGHT 0x34
|
||||
struct sdvo_set_ambient_light_reply {
|
||||
u16 trip_low;
|
||||
u16 trip_high;
|
||||
unsigned int enable:1;
|
||||
unsigned int pad:7;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* Set display power state */
|
||||
#define SDVO_CMD_SET_DISPLAY_POWER_STATE 0x7d
|
||||
# define SDVO_DISPLAY_STATE_ON (1 << 0)
|
||||
# define SDVO_DISPLAY_STATE_STANDBY (1 << 1)
|
||||
# define SDVO_DISPLAY_STATE_SUSPEND (1 << 2)
|
||||
# define SDVO_DISPLAY_STATE_OFF (1 << 3)
|
||||
|
||||
#define SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS 0x84
|
||||
struct psb_intel_sdvo_enhancements_reply {
|
||||
unsigned int flicker_filter:1;
|
||||
unsigned int flicker_filter_adaptive:1;
|
||||
unsigned int flicker_filter_2d:1;
|
||||
unsigned int saturation:1;
|
||||
unsigned int hue:1;
|
||||
unsigned int brightness:1;
|
||||
unsigned int contrast:1;
|
||||
unsigned int overscan_h:1;
|
||||
|
||||
unsigned int overscan_v:1;
|
||||
unsigned int hpos:1;
|
||||
unsigned int vpos:1;
|
||||
unsigned int sharpness:1;
|
||||
unsigned int dot_crawl:1;
|
||||
unsigned int dither:1;
|
||||
unsigned int tv_chroma_filter:1;
|
||||
unsigned int tv_luma_filter:1;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* Picture enhancement limits below are dependent on the current TV format,
|
||||
* and thus need to be queried and set after it.
|
||||
*/
|
||||
#define SDVO_CMD_GET_MAX_FLICKER_FILTER 0x4d
|
||||
#define SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE 0x7b
|
||||
#define SDVO_CMD_GET_MAX_FLICKER_FILTER_2D 0x52
|
||||
#define SDVO_CMD_GET_MAX_SATURATION 0x55
|
||||
#define SDVO_CMD_GET_MAX_HUE 0x58
|
||||
#define SDVO_CMD_GET_MAX_BRIGHTNESS 0x5b
|
||||
#define SDVO_CMD_GET_MAX_CONTRAST 0x5e
|
||||
#define SDVO_CMD_GET_MAX_OVERSCAN_H 0x61
|
||||
#define SDVO_CMD_GET_MAX_OVERSCAN_V 0x64
|
||||
#define SDVO_CMD_GET_MAX_HPOS 0x67
|
||||
#define SDVO_CMD_GET_MAX_VPOS 0x6a
|
||||
#define SDVO_CMD_GET_MAX_SHARPNESS 0x6d
|
||||
#define SDVO_CMD_GET_MAX_TV_CHROMA_FILTER 0x74
|
||||
#define SDVO_CMD_GET_MAX_TV_LUMA_FILTER 0x77
|
||||
struct psb_intel_sdvo_enhancement_limits_reply {
|
||||
u16 max_value;
|
||||
u16 default_value;
|
||||
} __attribute__((packed));
|
||||
|
||||
#define SDVO_CMD_GET_LVDS_PANEL_INFORMATION 0x7f
|
||||
#define SDVO_CMD_SET_LVDS_PANEL_INFORMATION 0x80
|
||||
# define SDVO_LVDS_COLOR_DEPTH_18 (0 << 0)
|
||||
# define SDVO_LVDS_COLOR_DEPTH_24 (1 << 0)
|
||||
# define SDVO_LVDS_CONNECTOR_SPWG (0 << 2)
|
||||
# define SDVO_LVDS_CONNECTOR_OPENLDI (1 << 2)
|
||||
# define SDVO_LVDS_SINGLE_CHANNEL (0 << 4)
|
||||
# define SDVO_LVDS_DUAL_CHANNEL (1 << 4)
|
||||
|
||||
#define SDVO_CMD_GET_FLICKER_FILTER 0x4e
|
||||
#define SDVO_CMD_SET_FLICKER_FILTER 0x4f
|
||||
#define SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE 0x50
|
||||
#define SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE 0x51
|
||||
#define SDVO_CMD_GET_FLICKER_FILTER_2D 0x53
|
||||
#define SDVO_CMD_SET_FLICKER_FILTER_2D 0x54
|
||||
#define SDVO_CMD_GET_SATURATION 0x56
|
||||
#define SDVO_CMD_SET_SATURATION 0x57
|
||||
#define SDVO_CMD_GET_HUE 0x59
|
||||
#define SDVO_CMD_SET_HUE 0x5a
|
||||
#define SDVO_CMD_GET_BRIGHTNESS 0x5c
|
||||
#define SDVO_CMD_SET_BRIGHTNESS 0x5d
|
||||
#define SDVO_CMD_GET_CONTRAST 0x5f
|
||||
#define SDVO_CMD_SET_CONTRAST 0x60
|
||||
#define SDVO_CMD_GET_OVERSCAN_H 0x62
|
||||
#define SDVO_CMD_SET_OVERSCAN_H 0x63
|
||||
#define SDVO_CMD_GET_OVERSCAN_V 0x65
|
||||
#define SDVO_CMD_SET_OVERSCAN_V 0x66
|
||||
#define SDVO_CMD_GET_HPOS 0x68
|
||||
#define SDVO_CMD_SET_HPOS 0x69
|
||||
#define SDVO_CMD_GET_VPOS 0x6b
|
||||
#define SDVO_CMD_SET_VPOS 0x6c
|
||||
#define SDVO_CMD_GET_SHARPNESS 0x6e
|
||||
#define SDVO_CMD_SET_SHARPNESS 0x6f
|
||||
#define SDVO_CMD_GET_TV_CHROMA_FILTER 0x75
|
||||
#define SDVO_CMD_SET_TV_CHROMA_FILTER 0x76
|
||||
#define SDVO_CMD_GET_TV_LUMA_FILTER 0x78
|
||||
#define SDVO_CMD_SET_TV_LUMA_FILTER 0x79
|
||||
struct psb_intel_sdvo_enhancements_arg {
|
||||
u16 value;
|
||||
}__attribute__((packed));
|
||||
|
||||
#define SDVO_CMD_GET_DOT_CRAWL 0x70
|
||||
#define SDVO_CMD_SET_DOT_CRAWL 0x71
|
||||
# define SDVO_DOT_CRAWL_ON (1 << 0)
|
||||
# define SDVO_DOT_CRAWL_DEFAULT_ON (1 << 1)
|
||||
|
||||
#define SDVO_CMD_GET_DITHER 0x72
|
||||
#define SDVO_CMD_SET_DITHER 0x73
|
||||
# define SDVO_DITHER_ON (1 << 0)
|
||||
# define SDVO_DITHER_DEFAULT_ON (1 << 1)
|
||||
|
||||
#define SDVO_CMD_SET_CONTROL_BUS_SWITCH 0x7a
|
||||
# define SDVO_CONTROL_BUS_PROM 0x0
|
||||
# define SDVO_CONTROL_BUS_DDC1 0x1
|
||||
# define SDVO_CONTROL_BUS_DDC2 0x2
|
||||
# define SDVO_CONTROL_BUS_DDC3 0x3
|
||||
# define SDVO_CONTROL_BUS_PROM (1 << 0)
|
||||
# define SDVO_CONTROL_BUS_DDC1 (1 << 1)
|
||||
# define SDVO_CONTROL_BUS_DDC2 (1 << 2)
|
||||
# define SDVO_CONTROL_BUS_DDC3 (1 << 3)
|
||||
|
||||
/* SDVO Bus & SDVO Inputs wiring details*/
|
||||
/* Bit 0: Is SDVOB connected to In0 (1 = yes, 0 = no*/
|
||||
/* Bit 1: Is SDVOB connected to In1 (1 = yes, 0 = no*/
|
||||
/* Bit 2: Is SDVOC connected to In0 (1 = yes, 0 = no*/
|
||||
/* Bit 3: Is SDVOC connected to In1 (1 = yes, 0 = no*/
|
||||
#define SDVOB_IN0 0x01
|
||||
#define SDVOB_IN1 0x02
|
||||
#define SDVOC_IN0 0x04
|
||||
#define SDVOC_IN1 0x08
|
||||
|
||||
#define SDVO_DEVICE_NONE 0x00
|
||||
#define SDVO_DEVICE_CRT 0x01
|
||||
#define SDVO_DEVICE_TV 0x02
|
||||
#define SDVO_DEVICE_LVDS 0x04
|
||||
#define SDVO_DEVICE_TMDS 0x08
|
||||
/* HDMI op codes */
|
||||
#define SDVO_CMD_GET_SUPP_ENCODE 0x9d
|
||||
#define SDVO_CMD_GET_ENCODE 0x9e
|
||||
#define SDVO_CMD_SET_ENCODE 0x9f
|
||||
#define SDVO_ENCODE_DVI 0x0
|
||||
#define SDVO_ENCODE_HDMI 0x1
|
||||
#define SDVO_CMD_SET_PIXEL_REPLI 0x8b
|
||||
#define SDVO_CMD_GET_PIXEL_REPLI 0x8c
|
||||
#define SDVO_CMD_GET_COLORIMETRY_CAP 0x8d
|
||||
#define SDVO_CMD_SET_COLORIMETRY 0x8e
|
||||
#define SDVO_COLORIMETRY_RGB256 0x0
|
||||
#define SDVO_COLORIMETRY_RGB220 0x1
|
||||
#define SDVO_COLORIMETRY_YCrCb422 0x3
|
||||
#define SDVO_COLORIMETRY_YCrCb444 0x4
|
||||
#define SDVO_CMD_GET_COLORIMETRY 0x8f
|
||||
#define SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER 0x90
|
||||
#define SDVO_CMD_SET_AUDIO_STAT 0x91
|
||||
#define SDVO_CMD_GET_AUDIO_STAT 0x92
|
||||
#define SDVO_CMD_SET_HBUF_INDEX 0x93
|
||||
#define SDVO_CMD_GET_HBUF_INDEX 0x94
|
||||
#define SDVO_CMD_GET_HBUF_INFO 0x95
|
||||
#define SDVO_CMD_SET_HBUF_AV_SPLIT 0x96
|
||||
#define SDVO_CMD_GET_HBUF_AV_SPLIT 0x97
|
||||
#define SDVO_CMD_SET_HBUF_DATA 0x98
|
||||
#define SDVO_CMD_GET_HBUF_DATA 0x99
|
||||
#define SDVO_CMD_SET_HBUF_TXRATE 0x9a
|
||||
#define SDVO_CMD_GET_HBUF_TXRATE 0x9b
|
||||
#define SDVO_HBUF_TX_DISABLED (0 << 6)
|
||||
#define SDVO_HBUF_TX_ONCE (2 << 6)
|
||||
#define SDVO_HBUF_TX_VSYNC (3 << 6)
|
||||
#define SDVO_CMD_GET_AUDIO_TX_INFO 0x9c
|
||||
#define SDVO_NEED_TO_STALL (1 << 7)
|
||||
|
||||
struct psb_intel_sdvo_encode {
|
||||
u8 dvi_rev;
|
||||
u8 hdmi_rev;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
Loading…
Reference in New Issue
Block a user