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pinctrl: da9062: add driver support
The DA9062 is a mfd pmic device which supports 5 GPIOs. The GPIOs can be used as input, output or have a special use-case. The patch adds the support for the normal input/output use-case. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.kernel.org/r/20200108104746.1765-4-m.felsch@pengutronix.de Reviewed-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Marco Felsch
Linus Walleij
parent
c93214689f
commit
56cc3af4e8
@ -4921,6 +4921,7 @@ F: drivers/leds/leds-da90??.c
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F: drivers/mfd/da903x.c
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F: drivers/mfd/da90??-*.c
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F: drivers/mfd/da91??-*.c
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F: drivers/pinctrl/pinctrl-da90??.c
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F: drivers/power/supply/da9052-battery.c
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F: drivers/power/supply/da91??-*.c
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F: drivers/regulator/da903x.c
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@ -126,6 +126,18 @@ config PINCTRL_DA850_PUPD
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Driver for TI DA850/OMAP-L138/AM18XX pinconf. Used to control
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pullup/pulldown pin groups.
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config PINCTRL_DA9062
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tristate "Dialog Semiconductor DA9062 PMIC pinctrl and GPIO Support"
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depends on MFD_DA9062
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select GPIOLIB
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help
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The Dialog DA9062 PMIC provides multiple GPIOs that can be muxed for
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different functions. This driver bundles a pinctrl driver to select the
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function muxing and a GPIO driver to handle the GPIO when the GPIO
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function is selected.
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Say yes to enable pinctrl and GPIO support for the DA9062 PMIC.
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config PINCTRL_DIGICOLOR
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bool
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depends on OF && (ARCH_DIGICOLOR || COMPILE_TEST)
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@ -16,6 +16,7 @@ obj-$(CONFIG_PINCTRL_AT91PIO4) += pinctrl-at91-pio4.o
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obj-$(CONFIG_PINCTRL_AMD) += pinctrl-amd.o
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obj-$(CONFIG_PINCTRL_BM1880) += pinctrl-bm1880.o
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obj-$(CONFIG_PINCTRL_DA850_PUPD) += pinctrl-da850-pupd.o
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obj-$(CONFIG_PINCTRL_DA9062) += pinctrl-da9062.o
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obj-$(CONFIG_PINCTRL_DIGICOLOR) += pinctrl-digicolor.o
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obj-$(CONFIG_PINCTRL_FALCON) += pinctrl-falcon.o
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obj-$(CONFIG_PINCTRL_GEMINI) += pinctrl-gemini.o
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300
drivers/pinctrl/pinctrl-da9062.c
Normal file
300
drivers/pinctrl/pinctrl-da9062.c
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@ -0,0 +1,300 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Dialog DA9062 pinctrl and GPIO driver.
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* Based on DA9055 GPIO driver.
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*
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* TODO:
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* - add pinmux and pinctrl support (gpio alternate mode)
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*
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* Documents:
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* [1] https://www.dialog-semiconductor.com/sites/default/files/da9062_datasheet_3v6.pdf
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*
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* Copyright (C) 2019 Pengutronix, Marco Felsch <kernel@pengutronix.de>
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*/
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#include <linux/bits.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/gpio/driver.h>
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#include <linux/mfd/da9062/core.h>
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#include <linux/mfd/da9062/registers.h>
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/*
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* We need this get the gpio_desc from a <gpio_chip,offset> tuple to decide if
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* the gpio is active low without a vendor specific dt-binding.
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*/
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#include <../gpio/gpiolib.h>
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#define DA9062_TYPE(offset) (4 * (offset % 2))
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#define DA9062_PIN_SHIFT(offset) (4 * (offset % 2))
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#define DA9062_PIN_ALTERNATE 0x00 /* gpio alternate mode */
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#define DA9062_PIN_GPI 0x01 /* gpio in */
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#define DA9062_PIN_GPO_OD 0x02 /* gpio out open-drain */
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#define DA9062_PIN_GPO_PP 0x03 /* gpio out push-pull */
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#define DA9062_GPIO_NUM 5
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struct da9062_pctl {
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struct da9062 *da9062;
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struct gpio_chip gc;
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unsigned int pin_config[DA9062_GPIO_NUM];
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};
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static int da9062_pctl_get_pin_mode(struct da9062_pctl *pctl,
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unsigned int offset)
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{
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struct regmap *regmap = pctl->da9062->regmap;
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int ret, val;
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ret = regmap_read(regmap, DA9062AA_GPIO_0_1 + (offset >> 1), &val);
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if (ret < 0)
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return ret;
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val >>= DA9062_PIN_SHIFT(offset);
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val &= DA9062AA_GPIO0_PIN_MASK;
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return val;
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}
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static int da9062_pctl_set_pin_mode(struct da9062_pctl *pctl,
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unsigned int offset, unsigned int mode_req)
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{
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struct regmap *regmap = pctl->da9062->regmap;
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unsigned int mode = mode_req;
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unsigned int mask;
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int ret;
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mode &= DA9062AA_GPIO0_PIN_MASK;
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mode <<= DA9062_PIN_SHIFT(offset);
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mask = DA9062AA_GPIO0_PIN_MASK << DA9062_PIN_SHIFT(offset);
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ret = regmap_update_bits(regmap, DA9062AA_GPIO_0_1 + (offset >> 1),
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mask, mode);
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if (!ret)
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pctl->pin_config[offset] = mode_req;
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return ret;
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}
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static int da9062_gpio_get(struct gpio_chip *gc, unsigned int offset)
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{
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struct da9062_pctl *pctl = gpiochip_get_data(gc);
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struct regmap *regmap = pctl->da9062->regmap;
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int gpio_mode, val;
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int ret;
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gpio_mode = da9062_pctl_get_pin_mode(pctl, offset);
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if (gpio_mode < 0)
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return gpio_mode;
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switch (gpio_mode) {
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case DA9062_PIN_ALTERNATE:
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return -ENOTSUPP;
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case DA9062_PIN_GPI:
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ret = regmap_read(regmap, DA9062AA_STATUS_B, &val);
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if (ret < 0)
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return ret;
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break;
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case DA9062_PIN_GPO_OD:
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case DA9062_PIN_GPO_PP:
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ret = regmap_read(regmap, DA9062AA_GPIO_MODE0_4, &val);
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if (ret < 0)
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return ret;
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}
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return !!(val & BIT(offset));
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}
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static void da9062_gpio_set(struct gpio_chip *gc, unsigned int offset,
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int value)
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{
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struct da9062_pctl *pctl = gpiochip_get_data(gc);
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struct regmap *regmap = pctl->da9062->regmap;
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regmap_update_bits(regmap, DA9062AA_GPIO_MODE0_4, BIT(offset),
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value << offset);
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}
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static int da9062_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
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{
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struct da9062_pctl *pctl = gpiochip_get_data(gc);
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int gpio_mode;
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gpio_mode = da9062_pctl_get_pin_mode(pctl, offset);
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if (gpio_mode < 0)
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return gpio_mode;
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switch (gpio_mode) {
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case DA9062_PIN_ALTERNATE:
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return -ENOTSUPP;
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case DA9062_PIN_GPI:
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return GPIO_LINE_DIRECTION_IN;
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case DA9062_PIN_GPO_OD:
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case DA9062_PIN_GPO_PP:
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return GPIO_LINE_DIRECTION_OUT;
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}
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return -EINVAL;
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}
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static int da9062_gpio_direction_input(struct gpio_chip *gc,
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unsigned int offset)
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{
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struct da9062_pctl *pctl = gpiochip_get_data(gc);
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struct regmap *regmap = pctl->da9062->regmap;
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struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
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unsigned int gpi_type;
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int ret;
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ret = da9062_pctl_set_pin_mode(pctl, offset, DA9062_PIN_GPI);
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if (ret)
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return ret;
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/*
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* If the gpio is active low we should set it in hw too. No worries
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* about gpio_get() because we read and return the gpio-level. So the
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* gpiolib active_low handling is still correct.
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*
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* 0 - active low, 1 - active high
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*/
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gpi_type = !gpiod_is_active_low(desc);
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return regmap_update_bits(regmap, DA9062AA_GPIO_0_1 + (offset >> 1),
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DA9062AA_GPIO0_TYPE_MASK << DA9062_TYPE(offset),
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gpi_type << DA9062_TYPE(offset));
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}
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static int da9062_gpio_direction_output(struct gpio_chip *gc,
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unsigned int offset, int value)
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{
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struct da9062_pctl *pctl = gpiochip_get_data(gc);
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unsigned int pin_config = pctl->pin_config[offset];
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int ret;
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ret = da9062_pctl_set_pin_mode(pctl, offset, pin_config);
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if (ret)
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return ret;
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da9062_gpio_set(gc, offset, value);
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return 0;
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}
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static int da9062_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
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unsigned long config)
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{
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struct da9062_pctl *pctl = gpiochip_get_data(gc);
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struct regmap *regmap = pctl->da9062->regmap;
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int gpio_mode;
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/*
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* We need to meet the following restrictions [1, Figure 18]:
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* - PIN_CONFIG_BIAS_PULL_DOWN -> only allowed if the pin is used as
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* gpio input
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* - PIN_CONFIG_BIAS_PULL_UP -> only allowed if the pin is used as
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* gpio output open-drain.
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*/
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switch (pinconf_to_config_param(config)) {
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case PIN_CONFIG_BIAS_DISABLE:
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return regmap_update_bits(regmap, DA9062AA_CONFIG_K,
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BIT(offset), 0);
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case PIN_CONFIG_BIAS_PULL_DOWN:
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gpio_mode = da9062_pctl_get_pin_mode(pctl, offset);
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if (gpio_mode < 0)
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return -EINVAL;
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else if (gpio_mode != DA9062_PIN_GPI)
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return -ENOTSUPP;
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return regmap_update_bits(regmap, DA9062AA_CONFIG_K,
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BIT(offset), BIT(offset));
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case PIN_CONFIG_BIAS_PULL_UP:
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gpio_mode = da9062_pctl_get_pin_mode(pctl, offset);
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if (gpio_mode < 0)
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return -EINVAL;
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else if (gpio_mode != DA9062_PIN_GPO_OD)
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return -ENOTSUPP;
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return regmap_update_bits(regmap, DA9062AA_CONFIG_K,
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BIT(offset), BIT(offset));
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case PIN_CONFIG_DRIVE_OPEN_DRAIN:
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return da9062_pctl_set_pin_mode(pctl, offset,
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DA9062_PIN_GPO_OD);
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case PIN_CONFIG_DRIVE_PUSH_PULL:
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return da9062_pctl_set_pin_mode(pctl, offset,
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DA9062_PIN_GPO_PP);
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default:
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return -ENOTSUPP;
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}
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}
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static int da9062_gpio_to_irq(struct gpio_chip *gc, unsigned int offset)
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{
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struct da9062_pctl *pctl = gpiochip_get_data(gc);
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struct da9062 *da9062 = pctl->da9062;
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return regmap_irq_get_virq(da9062->regmap_irq,
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DA9062_IRQ_GPI0 + offset);
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}
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static const struct gpio_chip reference_gc = {
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.owner = THIS_MODULE,
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.get = da9062_gpio_get,
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.set = da9062_gpio_set,
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.get_direction = da9062_gpio_get_direction,
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.direction_input = da9062_gpio_direction_input,
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.direction_output = da9062_gpio_direction_output,
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.set_config = da9062_gpio_set_config,
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.to_irq = da9062_gpio_to_irq,
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.can_sleep = true,
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.ngpio = DA9062_GPIO_NUM,
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.base = -1,
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};
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static int da9062_pctl_probe(struct platform_device *pdev)
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{
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struct device *parent = pdev->dev.parent;
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struct da9062_pctl *pctl;
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int i;
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pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
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if (!pctl)
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return -ENOMEM;
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pctl->da9062 = dev_get_drvdata(parent);
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if (!pctl->da9062)
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return -EINVAL;
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if (!device_property_present(parent, "gpio-controller"))
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return 0;
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for (i = 0; i < ARRAY_SIZE(pctl->pin_config); i++)
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pctl->pin_config[i] = DA9062_PIN_GPO_PP;
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/*
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* Currently the driver handles only the GPIO support. The
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* pinctrl/pinmux support can be added later if needed.
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*/
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pctl->gc = reference_gc;
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pctl->gc.label = dev_name(&pdev->dev);
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pctl->gc.parent = &pdev->dev;
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#ifdef CONFIG_OF_GPIO
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pctl->gc.of_node = parent->of_node;
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#endif
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platform_set_drvdata(pdev, pctl);
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return devm_gpiochip_add_data(&pdev->dev, &pctl->gc, pctl);
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}
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static struct platform_driver da9062_pctl_driver = {
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.probe = da9062_pctl_probe,
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.driver = {
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.name = "da9062-gpio",
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},
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};
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module_platform_driver(da9062_pctl_driver);
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MODULE_AUTHOR("Marco Felsch <kernel@pengutronix.de>");
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MODULE_DESCRIPTION("DA9062 PMIC pinctrl and GPIO Driver");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:da9062-gpio");
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