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CRIS changes for 3.14
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iEYEABECAAYFAlLmNJMACgkQ31LbvUHyf1fmoACeMUgwEh02hnxaiYfwtybH6wox nUUAn3a+yOwSHvghH8ZbXl8HUNMutoWQ =OLbC -----END PGP SIGNATURE----- Merge tag 'cris-for-3.14' of git://jni.nu/cris Pull cris changes from Jesper Nilsson: "Mostly removal of deprecated or old code, but also a long promised update of the CRIS syscalls" * tag 'cris-for-3.14' of git://jni.nu/cris: Drop code for CRISv10 CPU simulator Cleanup whitespace, remove old author tag CRIS: Add missing syscalls cris: sync_serial: remove interruptible_sleep_on cris: remove deprecated IRQF_DISABLED
This commit is contained in:
Linus Torvalds
commit
562e74fefc
@ -122,12 +122,6 @@ config ETRAX100LX_V2
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help
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Support version 2 of the ETRAX 100LX.
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config SVINTO_SIM
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bool "ETRAX-100LX-for-xsim-simulator"
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select ARCH_USES_GETTIMEOFFSET
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help
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Support the xsim ETRAX Simulator.
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config ETRAXFS
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bool "ETRAX-FS-V32"
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help
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@ -838,13 +838,13 @@ static int __init gpio_init(void)
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* in some tests.
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*/
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res = request_irq(TIMER0_IRQ_NBR, gpio_poll_timer_interrupt,
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IRQF_SHARED | IRQF_DISABLED, "gpio poll", gpio_name);
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IRQF_SHARED, "gpio poll", gpio_name);
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if (res) {
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printk(KERN_CRIT "err: timer0 irq for gpio\n");
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return res;
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}
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res = request_irq(PA_IRQ_NBR, gpio_interrupt,
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IRQF_SHARED | IRQF_DISABLED, "gpio PA", gpio_name);
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IRQF_SHARED, "gpio PA", gpio_name);
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if (res)
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printk(KERN_CRIT "err: PA irq for gpio\n");
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@ -22,6 +22,7 @@
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#include <linux/init.h>
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#include <linux/mutex.h>
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#include <linux/timer.h>
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#include <linux/wait.h>
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#include <asm/irq.h>
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#include <asm/dma.h>
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#include <asm/io.h>
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@ -580,7 +581,7 @@ static int sync_serial_open(struct inode *inode, struct file *file)
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if (port == &ports[0]) {
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if (request_irq(8,
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manual_interrupt,
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IRQF_SHARED | IRQF_DISABLED,
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IRQF_SHARED,
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"synchronous serial manual irq",
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&ports[0])) {
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printk(KERN_CRIT "Can't alloc "
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@ -590,7 +591,7 @@ static int sync_serial_open(struct inode *inode, struct file *file)
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} else if (port == &ports[1]) {
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if (request_irq(8,
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manual_interrupt,
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IRQF_SHARED | IRQF_DISABLED,
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IRQF_SHARED,
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"synchronous serial manual irq",
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&ports[1])) {
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printk(KERN_CRIT "Can't alloc "
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@ -1136,7 +1137,8 @@ static ssize_t sync_serial_read(struct file *file, char *buf,
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if (file->f_flags & O_NONBLOCK)
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return -EAGAIN;
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interruptible_sleep_on(&port->in_wait_q);
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wait_event_interruptible(port->in_wait_q,
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!(start == end && !port->full));
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if (signal_pending(current))
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return -EINTR;
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@ -1,4 +1,3 @@
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# $Id: Makefile,v 1.6 2004/12/13 12:21:51 starvik Exp $
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#
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# Makefile for the linux kernel.
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#
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@ -19,7 +19,6 @@
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#include <linux/delay.h>
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#include <linux/tty.h>
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#include <arch/svinto.h>
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#include <asm/io.h> /* Get SIMCOUT. */
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extern void reset_watchdog(void);
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@ -318,12 +317,6 @@ console_write(struct console *co, const char *buf, unsigned int len)
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if (!port)
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return;
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#ifdef CONFIG_SVINTO_SIM
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/* no use to simulate the serial debug output */
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SIMCOUT(buf, len);
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return;
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#endif
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console_write_direct(co, buf, len);
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}
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@ -13,8 +13,8 @@
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* after a timer-interrupt and after each system call.
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*
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* Stack layout in 'ret_from_system_call':
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* ptrace needs to have all regs on the stack.
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* if the order here is changed, it needs to be
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* ptrace needs to have all regs on the stack.
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* if the order here is changed, it needs to be
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* updated in fork.c:copy_process, signal.c:do_signal,
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* ptrace.c and ptrace.h
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*
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@ -31,7 +31,7 @@
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#include <asm/pgtable.h>
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;; functions exported from this file
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.globl system_call
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.globl ret_from_intr
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.globl ret_from_fork
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@ -46,10 +46,10 @@
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.globl do_sigtrap
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.globl gdb_handle_breakpoint
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.globl sys_call_table
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;; below are various parts of system_call which are not in the fast-path
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#ifdef CONFIG_PREEMPT
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#ifdef CONFIG_PREEMPT
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; Check if preemptive kernel scheduling should be done
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_resume_kernel:
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di
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@ -74,7 +74,7 @@ _need_resched:
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nop
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#else
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#define _resume_kernel _Rexit
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#endif
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#endif
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; Called at exit from fork. schedule_tail must be called to drop
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; spinlock if CONFIG_PREEMPT
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@ -91,16 +91,16 @@ ret_from_kernel_thread:
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ba ret_from_sys_call
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ret_from_intr:
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;; check for resched if preemptive kernel or if we're going back to user-mode
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;; check for resched if preemptive kernel or if we're going back to user-mode
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;; this test matches the user_regs(regs) macro
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;; we cannot simply test $dccr, because that does not necessarily
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;; reflect what mode we'll return into.
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move.d [$sp + PT_dccr], $r0; regs->dccr
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btstq 8, $r0 ; U-flag
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bpl _resume_kernel
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; Note that di below is in delay slot
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; Note that di below is in delay slot
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_resume_userspace:
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di ; so need_resched and sigpending don't change
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@ -113,7 +113,7 @@ _resume_userspace:
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nop
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ba _Rexit
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nop
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;; The system_call is called by a BREAK instruction, which works like
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;; an interrupt call but it stores the return PC in BRP instead of IRP.
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;; Since we dont really want to have two epilogues (one for system calls
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@ -123,7 +123,7 @@ _resume_userspace:
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;;
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;; Since we can't have system calls inside interrupts, it should not matter
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;; that we don't stack IRP.
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;;
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;;
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;; In r9 we have the wanted syscall number. Arguments come in r10,r11,r12,r13,mof,srp
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;;
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;; This function looks on the _surface_ like spaghetti programming, but it's
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@ -140,7 +140,7 @@ system_call:
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movem $r13, [$sp] ; push r0-r13
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push $r10 ; push orig_r10
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clear.d [$sp=$sp-4] ; frametype == 0, normal stackframe
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movs.w -ENOSYS, $r0
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move.d $r0, [$sp+PT_r10] ; put the default return value in r10 in the frame
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@ -148,17 +148,17 @@ system_call:
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movs.w -8192, $r0 ; THREAD_SIZE == 8192
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and.d $sp, $r0
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move.d [$r0+TI_flags], $r0
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btstq TIF_SYSCALL_TRACE, $r0
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bmi _syscall_trace_entry
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nop
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nop
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_syscall_traced:
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_syscall_traced:
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;; check for sanity in the requested syscall number
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cmpu.w NR_syscalls, $r9
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cmpu.w NR_syscalls, $r9
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bcc ret_from_sys_call
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lslq 2, $r9 ; multiply by 4, in the delay slot
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@ -166,28 +166,28 @@ _syscall_traced:
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;; of the register structure itself. some syscalls need this.
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push $sp
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;; the parameter carrying registers r10, r11, r12 and 13 are intact.
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;; the fifth and sixth parameters (if any) was in mof and srp
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;; the fifth and sixth parameters (if any) was in mof and srp
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;; respectively, and we need to put them on the stack.
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push $srp
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push $mof
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jsr [$r9+sys_call_table] ; actually do the system call
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addq 3*4, $sp ; pop the mof, srp and regs parameters
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move.d $r10, [$sp+PT_r10] ; save the return value
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moveq 1, $r9 ; "parameter" to ret_from_sys_call to show it was a sys call
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;; fall through into ret_from_sys_call to return
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ret_from_sys_call:
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;; r9 is a parameter - if >=1 we came from a syscall, if 0, from an irq
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;; get the current task-struct pointer (see top for defs)
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movs.w -8192, $r0 ; THREAD_SIZE == 8192
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movs.w -8192, $r0 ; THREAD_SIZE == 8192
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and.d $sp, $r0
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di ; make sure need_resched and sigpending don't change
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@ -202,7 +202,7 @@ _Rexit:
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bne _RBFexit ; was not CRIS_FRAME_NORMAL, handle otherwise
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addq 4, $sp ; skip orig_r10, in delayslot
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movem [$sp+], $r13 ; registers r0-r13
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pop $mof ; multiply overflow register
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pop $mof ; multiply overflow register
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pop $dccr ; condition codes
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pop $srp ; subroutine return pointer
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;; now we have a 4-word SBFS frame which we do not want to restore
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@ -216,14 +216,14 @@ _Rexit:
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_RBFexit:
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movem [$sp+], $r13 ; registers r0-r13, in delay slot
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pop $mof ; multiply overflow register
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pop $mof ; multiply overflow register
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pop $dccr ; condition codes
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pop $srp ; subroutine return pointer
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rbf [$sp+] ; return by popping the CPU status
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;; We get here after doing a syscall if extra work might need to be done
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;; perform syscall exit tracing if needed
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_syscall_exit_work:
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;; $r0 contains current at this point and irq's are disabled
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@ -231,22 +231,22 @@ _syscall_exit_work:
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btstq TIF_SYSCALL_TRACE, $r1
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bpl _work_pending
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nop
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ei
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move.d $r9, $r1 ; preserve r9
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jsr do_syscall_trace
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move.d $r1, $r9
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ba _resume_userspace
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nop
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_work_pending:
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move.d [$r0+TI_flags], $r1
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btstq TIF_NEED_RESCHED, $r1
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bpl _work_notifysig ; was neither trace nor sched, must be signal/notify
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nop
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_work_resched:
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move.d $r9, $r1 ; preserve r9
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jsr schedule
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@ -268,17 +268,17 @@ _work_notifysig:
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move.d $sp, $r11 ; the regs param
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move.d $r1, $r12 ; the thread_info_flags parameter
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jsr do_notify_resume
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ba _Rexit
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nop
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;; We get here as a sidetrack when we've entered a syscall with the
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;; trace-bit set. We need to call do_syscall_trace and then continue
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;; with the call.
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_syscall_trace_entry:
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;; PT_r10 in the frame contains -ENOSYS as required, at this point
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jsr do_syscall_trace
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;; now re-enter the syscall code to do the syscall itself
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@ -292,10 +292,10 @@ _syscall_trace_entry:
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move.d [$sp+PT_r13], $r13
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move [$sp+PT_mof], $mof
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move [$sp+PT_srp], $srp
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ba _syscall_traced
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nop
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;; resume performs the actual task-switching, by switching stack pointers
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;; input arguments: r10 = prev, r11 = next, r12 = thread offset in task struct
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;; returns old current in r10
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@ -303,29 +303,29 @@ _syscall_trace_entry:
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;; TODO: see the i386 version. The switch_to which calls resume in our version
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;; could really be an inline asm of this.
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resume:
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push $srp ; we keep the old/new PC on the stack
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resume:
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push $srp ; we keep the old/new PC on the stack
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add.d $r12, $r10 ; r10 = current tasks tss
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move $dccr, [$r10+THREAD_dccr]; save irq enable state
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di
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move $usp, [$r10+ THREAD_usp] ; save user-mode stackpointer
|
||||
|
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|
||||
;; See copy_thread for the reason why register R9 is saved.
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subq 10*4, $sp
|
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movem $r9, [$sp] ; save non-scratch registers and R9.
|
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|
||||
|
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move.d $sp, [$r10+THREAD_ksp] ; save the kernel stack pointer for the old task
|
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move.d $sp, $r10 ; return last running task in r10
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and.d -8192, $r10 ; get thread_info from stackpointer
|
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move.d [$r10+TI_task], $r10 ; get task
|
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move.d [$r10+TI_task], $r10 ; get task
|
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add.d $r12, $r11 ; find the new tasks tss
|
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move.d [$r11+THREAD_ksp], $sp ; switch into the new stackframe by restoring kernel sp
|
||||
|
||||
movem [$sp+], $r9 ; restore non-scratch registers and R9.
|
||||
|
||||
move [$r11+THREAD_usp], $usp ; restore user-mode stackpointer
|
||||
|
||||
|
||||
move [$r11+THREAD_dccr], $dccr ; restore irq enable status
|
||||
jump [$sp+] ; restore PC
|
||||
|
||||
@ -401,7 +401,7 @@ mmu_bus_fault:
|
||||
push $r10 ; frametype == 1, BUSFAULT frame type
|
||||
|
||||
move.d $sp, $r10 ; pt_regs argument to handle_mmu_bus_fault
|
||||
|
||||
|
||||
jsr handle_mmu_bus_fault ; in arch/cris/arch-v10/mm/fault.c
|
||||
|
||||
;; now we need to return through the normal path, we cannot just
|
||||
@ -410,10 +410,10 @@ mmu_bus_fault:
|
||||
;; whatever.
|
||||
|
||||
moveq 0, $r9 ; busfault is equivalent to an irq
|
||||
|
||||
|
||||
ba ret_from_intr
|
||||
nop
|
||||
|
||||
|
||||
;; special handlers for breakpoint and NMI
|
||||
hwbreakpoint:
|
||||
push $dccr
|
||||
@ -429,7 +429,7 @@ hwbreakpoint:
|
||||
pop $dccr
|
||||
retb
|
||||
nop
|
||||
|
||||
|
||||
IRQ1_interrupt:
|
||||
;; this prologue MUST match the one in irq.h and the struct in ptregs.h!!!
|
||||
move $brp,[$sp=$sp-16]; instruction pointer and room for a fake SBFS frame
|
||||
@ -457,7 +457,7 @@ IRQ1_interrupt:
|
||||
ba _Rexit ; Return the standard way
|
||||
nop
|
||||
wdog:
|
||||
#if defined(CONFIG_ETRAX_WATCHDOG) && !defined(CONFIG_SVINTO_SIM)
|
||||
#if defined(CONFIG_ETRAX_WATCHDOG)
|
||||
;; Check if we're waiting for reset to happen, as signalled by
|
||||
;; hard_reset_now setting cause_of_death to a magic value. If so, just
|
||||
;; get stuck until reset happens.
|
||||
@ -500,7 +500,7 @@ Watchdog_bite:
|
||||
move.d $r10, [$r11]
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
;; Note that we don't do "setf m" here (or after two necessary NOPs),
|
||||
;; since *not* doing that saves us from re-entrancy checks. We don't want
|
||||
;; to get here again due to possible subsequent NMIs; we want the watchdog
|
||||
@ -523,16 +523,16 @@ _watchdogmsg:
|
||||
.ascii "Oops: bitten by watchdog\n\0"
|
||||
.previous
|
||||
|
||||
#endif /* CONFIG_ETRAX_WATCHDOG and not CONFIG_SVINTO_SIM */
|
||||
#endif /* CONFIG_ETRAX_WATCHDOG */
|
||||
|
||||
spurious_interrupt:
|
||||
spurious_interrupt:
|
||||
di
|
||||
jump hard_reset_now
|
||||
|
||||
;; this handles the case when multiple interrupts arrive at the same time
|
||||
;; we jump to the first set interrupt bit in a priority fashion
|
||||
;; the hardware will call the unserved interrupts after the handler finishes
|
||||
|
||||
|
||||
multiple_interrupt:
|
||||
;; this prologue MUST match the one in irq.h and the struct in ptregs.h!!!
|
||||
move $irp,[$sp=$sp-16]; instruction pointer and room for a fake SBFS frame
|
||||
@ -551,7 +551,7 @@ multiple_interrupt:
|
||||
jump ret_from_intr
|
||||
|
||||
do_sigtrap:
|
||||
;;
|
||||
;;
|
||||
;; SIGTRAP the process that executed the break instruction.
|
||||
;; Make a frame that Rexit in entry.S expects.
|
||||
;;
|
||||
@ -568,30 +568,30 @@ do_sigtrap:
|
||||
movs.w -8192,$r9 ; THREAD_SIZE == 8192
|
||||
and.d $sp, $r9
|
||||
move.d [$r9+TI_task], $r10
|
||||
move.d [$r10+TASK_pid], $r10 ; current->pid as arg1.
|
||||
move.d [$r10+TASK_pid], $r10 ; current->pid as arg1.
|
||||
moveq 5, $r11 ; SIGTRAP as arg2.
|
||||
jsr sys_kill
|
||||
jsr sys_kill
|
||||
jump ret_from_intr ; Use the return routine for interrupts.
|
||||
|
||||
gdb_handle_breakpoint:
|
||||
gdb_handle_breakpoint:
|
||||
push $dccr
|
||||
push $r0
|
||||
#ifdef CONFIG_ETRAX_KGDB
|
||||
move $dccr, $r0 ; U-flag not affected by previous insns.
|
||||
move $dccr, $r0 ; U-flag not affected by previous insns.
|
||||
btstq 8, $r0 ; Test the U-flag.
|
||||
bmi _ugdb_handle_breakpoint ; Go to user mode debugging.
|
||||
nop ; Empty delay slot (cannot pop r0 here).
|
||||
bmi _ugdb_handle_breakpoint ; Go to user mode debugging.
|
||||
nop ; Empty delay slot (cannot pop r0 here).
|
||||
pop $r0 ; Restore r0.
|
||||
ba kgdb_handle_breakpoint ; Go to kernel debugging.
|
||||
ba kgdb_handle_breakpoint ; Go to kernel debugging.
|
||||
pop $dccr ; Restore dccr in delay slot.
|
||||
#endif
|
||||
|
||||
_ugdb_handle_breakpoint:
|
||||
|
||||
_ugdb_handle_breakpoint:
|
||||
move $brp, $r0 ; Use r0 temporarily for calculation.
|
||||
subq 2, $r0 ; Set to address of previous instruction.
|
||||
move $r0, $brp
|
||||
pop $r0 ; Restore r0.
|
||||
ba do_sigtrap ; SIGTRAP the offending process.
|
||||
pop $r0 ; Restore r0.
|
||||
ba do_sigtrap ; SIGTRAP the offending process.
|
||||
pop $dccr ; Restore dccr in delay slot.
|
||||
|
||||
.data
|
||||
@ -602,7 +602,7 @@ hw_bp_trig_ptr:
|
||||
.dword hw_bp_trigs
|
||||
|
||||
.section .rodata,"a"
|
||||
sys_call_table:
|
||||
sys_call_table:
|
||||
.long sys_restart_syscall /* 0 - old "setup()" system call, used for restarting */
|
||||
.long sys_exit
|
||||
.long sys_fork
|
||||
@ -713,7 +713,7 @@ sys_call_table:
|
||||
.long sys_newlstat
|
||||
.long sys_newfstat
|
||||
.long sys_ni_syscall /* old sys_uname holder */
|
||||
.long sys_ni_syscall /* sys_iopl in i386 */
|
||||
.long sys_ni_syscall /* 110 */ /* sys_iopl in i386 */
|
||||
.long sys_vhangup
|
||||
.long sys_ni_syscall /* old "idle" system call */
|
||||
.long sys_ni_syscall /* vm86old in i386 */
|
||||
@ -730,7 +730,7 @@ sys_call_table:
|
||||
.long sys_adjtimex
|
||||
.long sys_mprotect /* 125 */
|
||||
.long sys_sigprocmask
|
||||
.long sys_ni_syscall /* old "create_module" */
|
||||
.long sys_ni_syscall /* old "create_module" */
|
||||
.long sys_init_module
|
||||
.long sys_delete_module
|
||||
.long sys_ni_syscall /* 130: old "get_kernel_syms" */
|
||||
@ -795,7 +795,7 @@ sys_call_table:
|
||||
.long sys_ni_syscall /* streams2 */
|
||||
.long sys_vfork /* 190 */
|
||||
.long sys_getrlimit
|
||||
.long sys_mmap2
|
||||
.long sys_mmap2 /* mmap_pgoff */
|
||||
.long sys_truncate64
|
||||
.long sys_ftruncate64
|
||||
.long sys_stat64 /* 195 */
|
||||
@ -861,21 +861,21 @@ sys_call_table:
|
||||
.long sys_epoll_ctl /* 255 */
|
||||
.long sys_epoll_wait
|
||||
.long sys_remap_file_pages
|
||||
.long sys_set_tid_address
|
||||
.long sys_timer_create
|
||||
.long sys_timer_settime /* 260 */
|
||||
.long sys_timer_gettime
|
||||
.long sys_timer_getoverrun
|
||||
.long sys_timer_delete
|
||||
.long sys_clock_settime
|
||||
.long sys_clock_gettime /* 265 */
|
||||
.long sys_clock_getres
|
||||
.long sys_clock_nanosleep
|
||||
.long sys_set_tid_address
|
||||
.long sys_timer_create
|
||||
.long sys_timer_settime /* 260 */
|
||||
.long sys_timer_gettime
|
||||
.long sys_timer_getoverrun
|
||||
.long sys_timer_delete
|
||||
.long sys_clock_settime
|
||||
.long sys_clock_gettime /* 265 */
|
||||
.long sys_clock_getres
|
||||
.long sys_clock_nanosleep
|
||||
.long sys_statfs64
|
||||
.long sys_fstatfs64
|
||||
.long sys_tgkill /* 270 */
|
||||
.long sys_fstatfs64
|
||||
.long sys_tgkill /* 270 */
|
||||
.long sys_utimes
|
||||
.long sys_fadvise64_64
|
||||
.long sys_fadvise64_64
|
||||
.long sys_ni_syscall /* sys_vserver */
|
||||
.long sys_ni_syscall /* sys_mbind */
|
||||
.long sys_ni_syscall /* 275 sys_get_mempolicy */
|
||||
@ -886,7 +886,7 @@ sys_call_table:
|
||||
.long sys_mq_timedreceive /* 280 */
|
||||
.long sys_mq_notify
|
||||
.long sys_mq_getsetattr
|
||||
.long sys_ni_syscall /* reserved for kexec */
|
||||
.long sys_ni_syscall
|
||||
.long sys_waitid
|
||||
.long sys_ni_syscall /* 285 */ /* available */
|
||||
.long sys_add_key
|
||||
@ -939,6 +939,22 @@ sys_call_table:
|
||||
.long sys_preadv
|
||||
.long sys_pwritev
|
||||
.long sys_setns /* 335 */
|
||||
.long sys_name_to_handle_at
|
||||
.long sys_open_by_handle_at
|
||||
.long sys_rt_tgsigqueueinfo
|
||||
.long sys_perf_event_open
|
||||
.long sys_recvmmsg /* 340 */
|
||||
.long sys_accept4
|
||||
.long sys_fanotify_init
|
||||
.long sys_fanotify_mark
|
||||
.long sys_prlimit64
|
||||
.long sys_clock_adjtime /* 345 */
|
||||
.long sys_syncfs
|
||||
.long sys_sendmmsg
|
||||
.long sys_process_vm_readv
|
||||
.long sys_process_vm_writev
|
||||
.long sys_kcmp /* 350 */
|
||||
.long sys_finit_module
|
||||
|
||||
/*
|
||||
* NOTE!! This doesn't have to be exact - we just have
|
||||
@ -950,4 +966,4 @@ sys_call_table:
|
||||
.rept NR_syscalls-(.-sys_call_table)/4
|
||||
.long sys_ni_syscall
|
||||
.endr
|
||||
|
||||
|
||||
|
||||
@ -1,12 +1,10 @@
|
||||
/*
|
||||
* Head of the kernel - alter with care
|
||||
*
|
||||
* Copyright (C) 2000, 2001 Axis Communications AB
|
||||
* Copyright (C) 2000, 2001, 2010 Axis Communications AB
|
||||
*
|
||||
* Authors: Bjorn Wesen (bjornw@axis.com)
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
#define ASSEMBLER_MACROS_ONLY
|
||||
/* The IO_* macros use the ## token concatenation operator, so
|
||||
-traditional must not be used when assembling this file. */
|
||||
@ -18,15 +16,15 @@
|
||||
|
||||
#define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\
|
||||
IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk)
|
||||
|
||||
|
||||
;; exported symbols
|
||||
|
||||
|
||||
.globl etrax_irv
|
||||
.globl romfs_start
|
||||
.globl romfs_length
|
||||
.globl romfs_in_flash
|
||||
.globl swapper_pg_dir
|
||||
|
||||
|
||||
.text
|
||||
|
||||
;; This is the entry point of the kernel. We are in supervisor mode.
|
||||
@ -35,10 +33,10 @@
|
||||
;; put a nop (2 bytes) here first so we dont accidentally skip the di
|
||||
;;
|
||||
;; NOTICE! The registers r8 and r9 are used as parameters carrying
|
||||
;; information from the decompressor (if the kernel was compressed).
|
||||
;; information from the decompressor (if the kernel was compressed).
|
||||
;; They should not be used in the code below until read.
|
||||
|
||||
nop
|
||||
|
||||
nop
|
||||
di
|
||||
|
||||
;; First setup the kseg_c mapping from where the kernel is linked
|
||||
@ -58,19 +56,19 @@
|
||||
|
||||
#ifdef CONFIG_CRIS_LOW_MAP
|
||||
; kseg mappings, temporary map of 0xc0->0x40
|
||||
move.d IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \
|
||||
move.d IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \
|
||||
| IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb) \
|
||||
| IO_FIELD (R_MMU_KBASE_HI, base_9, 9) \
|
||||
| IO_FIELD (R_MMU_KBASE_HI, base_8, 8), $r0
|
||||
move.d $r0, [R_MMU_KBASE_HI]
|
||||
|
||||
; temporary map of 0x40->0x40 and 0x60->0x40
|
||||
move.d IO_FIELD (R_MMU_KBASE_LO, base_6, 4) \
|
||||
; temporary map of 0x40->0x40 and 0x60->0x40
|
||||
move.d IO_FIELD (R_MMU_KBASE_LO, base_6, 4) \
|
||||
| IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
|
||||
move.d $r0, [R_MMU_KBASE_LO]
|
||||
|
||||
; mmu enable, segs e,c,b,a,6,5,4,0 segment mapped
|
||||
move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
|
||||
move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
|
||||
| IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
|
||||
| IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
|
||||
| IO_STATE (R_MMU_CONFIG, we_excp, enable) \
|
||||
@ -93,17 +91,17 @@
|
||||
move.d $r0, [R_MMU_CONFIG]
|
||||
#else
|
||||
; kseg mappings
|
||||
move.d IO_FIELD (R_MMU_KBASE_HI, base_e, 8) \
|
||||
move.d IO_FIELD (R_MMU_KBASE_HI, base_e, 8) \
|
||||
| IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \
|
||||
| IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb), $r0
|
||||
move.d $r0, [R_MMU_KBASE_HI]
|
||||
|
||||
; temporary map of 0x40->0x40 and 0x00->0x00
|
||||
; temporary map of 0x40->0x40 and 0x00->0x00
|
||||
move.d IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
|
||||
move.d $r0, [R_MMU_KBASE_LO]
|
||||
|
||||
; mmu enable, segs f,e,c,b,4,0 segment mapped
|
||||
move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
|
||||
move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
|
||||
| IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
|
||||
| IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
|
||||
| IO_STATE (R_MMU_CONFIG, we_excp, enable) \
|
||||
@ -141,12 +139,12 @@
|
||||
;;
|
||||
;; In both cases, we start in un-cached mode, and need to jump into a
|
||||
;; cached PC after we're done fiddling around with the segments.
|
||||
;;
|
||||
;;
|
||||
;; arch/etrax100/etrax100.ld sets some symbols that define the start
|
||||
;; and end of each segment.
|
||||
|
||||
;; Check if we start from DRAM or FLASH by testing PC
|
||||
|
||||
|
||||
move.d $pc,$r0
|
||||
and.d 0x7fffffff,$r0 ; get rid of the non-cache bit
|
||||
cmp.d 0x10000,$r0 ; arbitrary... just something above this code
|
||||
@ -163,30 +161,28 @@ _inflash0:
|
||||
;; after init.
|
||||
.section ".init.text", "ax"
|
||||
_inflash:
|
||||
#ifdef CONFIG_ETRAX_ETHERNET
|
||||
#ifdef CONFIG_ETRAX_ETHERNET
|
||||
;; Start MII clock to make sure it is running when tranceiver is reset
|
||||
move.d START_ETHERNET_CLOCK, $r0
|
||||
move.d $r0, [R_NETWORK_GEN_CONFIG]
|
||||
#endif
|
||||
|
||||
;; Set up waitstates etc according to kernel configuration.
|
||||
#ifndef CONFIG_SVINTO_SIM
|
||||
move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
|
||||
move.d $r0, [R_WAITSTATES]
|
||||
|
||||
move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
|
||||
move.d $r0, [R_BUS_CONFIG]
|
||||
#endif
|
||||
|
||||
;; We need to initialze DRAM registers before we start using the DRAM
|
||||
|
||||
cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized?
|
||||
beq _dram_init_finished
|
||||
nop
|
||||
|
||||
|
||||
#include "../lib/dram_init.S"
|
||||
|
||||
_dram_init_finished:
|
||||
_dram_init_finished:
|
||||
;; Copy text+data to DRAM
|
||||
;; This is fragile - the calculation of r4 as the image size depends
|
||||
;; on that the labels below actually are the first and last positions
|
||||
@ -198,7 +194,7 @@ _dram_init_finished:
|
||||
;; between the physical start of the flash and the flash-image start,
|
||||
;; and when run with compression, the kernel is actually unpacked to
|
||||
;; DRAM and we never get here in the first place :))
|
||||
|
||||
|
||||
moveq 0, $r0 ; source
|
||||
move.d text_start, $r1 ; destination
|
||||
move.d __vmlinux_end, $r2 ; end destination
|
||||
@ -229,10 +225,10 @@ _dram_init_finished:
|
||||
add.d 0xf0000000, $r4 ; add flash start in virtual memory (cached)
|
||||
#endif
|
||||
move.d $r4, [romfs_start]
|
||||
1:
|
||||
1:
|
||||
moveq 1, $r0
|
||||
move.d $r0, [romfs_in_flash]
|
||||
|
||||
|
||||
jump _start_it ; enter code, cached this time
|
||||
|
||||
_inram:
|
||||
@ -241,7 +237,7 @@ _inram:
|
||||
|
||||
moveq 0, $r0
|
||||
move.d $r0, [romfs_length] ; default if there is no cramfs
|
||||
|
||||
|
||||
;; The kernel could have been unpacked to DRAM by the loader, but
|
||||
;; the cramfs image could still be in the Flash directly after the
|
||||
;; compressed kernel image. The loader passes the address of the
|
||||
@ -251,7 +247,7 @@ _inram:
|
||||
;; (Notice that if this is not booted from the loader, r9 will be
|
||||
;; garbage but we do sanity checks on it, the chance that it points
|
||||
;; to a cramfs magic is small.. )
|
||||
|
||||
|
||||
cmp.d 0x0ffffff8, $r9
|
||||
bhs _no_romfs_in_flash ; r9 points outside the flash area
|
||||
nop
|
||||
@ -274,7 +270,7 @@ _inram:
|
||||
jump _start_it ; enter code, cached this time
|
||||
|
||||
_no_romfs_in_flash:
|
||||
|
||||
|
||||
;; Check if there is a cramfs (magic value).
|
||||
;; Notice that we check for cramfs magic value - which is
|
||||
;; the "rom fs" we'll possibly use in 2.4 if not JFFS (which does
|
||||
@ -286,8 +282,8 @@ _no_romfs_in_flash:
|
||||
bne 2f
|
||||
nop
|
||||
|
||||
;; Ok. What is its size ?
|
||||
|
||||
;; Ok. What is its size ?
|
||||
|
||||
move.d [$r0 + 4], $r2 ; cramfs_super.size (again, no need to swapwb)
|
||||
|
||||
;; We want to copy it to the end of the BSS
|
||||
@ -303,7 +299,7 @@ _no_romfs_in_flash:
|
||||
|
||||
add.d $r2, $r0
|
||||
add.d $r2, $r1
|
||||
|
||||
|
||||
;; Go ahead. Make my loop.
|
||||
|
||||
lsrq 1, $r2 ; size is in bytes, we copy words
|
||||
@ -314,14 +310,14 @@ _no_romfs_in_flash:
|
||||
bne 1b
|
||||
nop
|
||||
|
||||
2:
|
||||
2:
|
||||
;; Dont worry that the BSS is tainted. It will be cleared later.
|
||||
|
||||
moveq 0, $r0
|
||||
move.d $r0, [romfs_in_flash]
|
||||
|
||||
jump _start_it ; better skip the additional cramfs check below
|
||||
|
||||
|
||||
_start_it:
|
||||
|
||||
;; Check if kernel command line is supplied
|
||||
@ -348,7 +344,7 @@ no_command_line:
|
||||
move.d ibr_start,$r0 ; this symbol is set by the linker script
|
||||
move $r0,$ibr
|
||||
move.d $r0,[etrax_irv] ; set the interrupt base register and pointer
|
||||
|
||||
|
||||
;; Clear BSS region, from _bss_start to _end
|
||||
|
||||
move.d __bss_start, $r0
|
||||
@ -357,7 +353,7 @@ no_command_line:
|
||||
cmp.d $r1, $r0
|
||||
blo 1b
|
||||
nop
|
||||
|
||||
|
||||
#ifdef CONFIG_BLK_DEV_ETRAXIDE
|
||||
;; disable ATA before enabling it in genconfig below
|
||||
moveq 0,$r0
|
||||
@ -380,7 +376,7 @@ no_command_line:
|
||||
|
||||
#ifdef CONFIG_JULIETTE
|
||||
;; configure external DMA channel 0 before enabling it in genconfig
|
||||
|
||||
|
||||
moveq 0,$r0
|
||||
move.d $r0,[R_EXT_DMA_0_ADDR]
|
||||
; cnt enable, word size, output, stop, size 0
|
||||
@ -395,7 +391,7 @@ no_command_line:
|
||||
move.d $r0,[R_EXT_DMA_0_CMD]
|
||||
|
||||
;; reset dma4 and wait for completion
|
||||
|
||||
|
||||
moveq IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
|
||||
move.b $r0,[R_DMA_CH4_CMD]
|
||||
1: move.b [R_DMA_CH4_CMD],$r0
|
||||
@ -405,7 +401,7 @@ no_command_line:
|
||||
nop
|
||||
|
||||
;; reset dma5 and wait for completion
|
||||
|
||||
|
||||
moveq IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
|
||||
move.b $r0,[R_DMA_CH5_CMD]
|
||||
1: move.b [R_DMA_CH5_CMD],$r0
|
||||
@ -413,8 +409,8 @@ no_command_line:
|
||||
cmp.b IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
|
||||
beq 1b
|
||||
nop
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
;; Etrax product HW genconfig setup
|
||||
|
||||
moveq 0,$r0
|
||||
@ -468,7 +464,6 @@ no_command_line:
|
||||
|
||||
move.d $r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG
|
||||
|
||||
#ifndef CONFIG_SVINTO_SIM
|
||||
move.d $r0,[R_GEN_CONFIG]
|
||||
|
||||
#if 0
|
||||
@ -486,7 +481,7 @@ no_command_line:
|
||||
beq 1b
|
||||
nop
|
||||
#endif
|
||||
|
||||
|
||||
moveq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
|
||||
move.b $r0,[R_DMA_CH8_CMD] ; reset (ser1 dma out)
|
||||
move.b $r0,[R_DMA_CH9_CMD] ; reset (ser1 dma in)
|
||||
@ -503,7 +498,7 @@ no_command_line:
|
||||
|
||||
;; setup port PA and PB default initial directions and data
|
||||
;; including their shadow registers
|
||||
|
||||
|
||||
move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR,$r0
|
||||
#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7)
|
||||
or.b IO_STATE (R_PORT_PA_DIR, dir7, output),$r0
|
||||
@ -520,7 +515,7 @@ no_command_line:
|
||||
#endif
|
||||
move.b $r0,[port_pa_data_shadow]
|
||||
move.b $r0,[R_PORT_PA_DATA]
|
||||
|
||||
|
||||
move.b CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG,$r0
|
||||
move.b $r0,[port_pb_config_shadow]
|
||||
move.b $r0,[R_PORT_PB_CONFIG]
|
||||
@ -562,13 +557,13 @@ no_command_line:
|
||||
#endif
|
||||
move.d $r0,[port_g_data_shadow]
|
||||
move.d $r0,[R_PORT_G_DATA]
|
||||
|
||||
|
||||
;; setup the serial port 0 at 115200 baud for debug purposes
|
||||
|
||||
|
||||
moveq IO_STATE (R_SERIAL0_XOFF, tx_stop, enable) \
|
||||
| IO_STATE (R_SERIAL0_XOFF, auto_xoff, disable) \
|
||||
| IO_FIELD (R_SERIAL0_XOFF, xoff_char, 0),$r0
|
||||
move.d $r0,[R_SERIAL0_XOFF]
|
||||
move.d $r0,[R_SERIAL0_XOFF]
|
||||
|
||||
; 115.2kbaud for both transmit and receive
|
||||
move.b IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz) \
|
||||
@ -584,8 +579,8 @@ no_command_line:
|
||||
| IO_STATE (R_SERIAL0_REC_CTRL, rec_par, even) \
|
||||
| IO_STATE (R_SERIAL0_REC_CTRL, rec_par_en, disable) \
|
||||
| IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0
|
||||
move.b $r0,[R_SERIAL0_REC_CTRL]
|
||||
|
||||
move.b $r0,[R_SERIAL0_REC_CTRL]
|
||||
|
||||
; Set up and enable the serial0 transmitter.
|
||||
move.b IO_FIELD (R_SERIAL0_TR_CTRL, txd, 0) \
|
||||
| IO_STATE (R_SERIAL0_TR_CTRL, tr_enable, enable) \
|
||||
@ -598,11 +593,11 @@ no_command_line:
|
||||
move.b $r0,[R_SERIAL0_TR_CTRL]
|
||||
|
||||
;; setup the serial port 1 at 115200 baud for debug purposes
|
||||
|
||||
|
||||
moveq IO_STATE (R_SERIAL1_XOFF, tx_stop, enable) \
|
||||
| IO_STATE (R_SERIAL1_XOFF, auto_xoff, disable) \
|
||||
| IO_FIELD (R_SERIAL1_XOFF, xoff_char, 0),$r0
|
||||
move.d $r0,[R_SERIAL1_XOFF]
|
||||
move.d $r0,[R_SERIAL1_XOFF]
|
||||
|
||||
; 115.2kbaud for both transmit and receive
|
||||
move.b IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz) \
|
||||
@ -618,8 +613,8 @@ no_command_line:
|
||||
| IO_STATE (R_SERIAL1_REC_CTRL, rec_par, even) \
|
||||
| IO_STATE (R_SERIAL1_REC_CTRL, rec_par_en, disable) \
|
||||
| IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0
|
||||
move.b $r0,[R_SERIAL1_REC_CTRL]
|
||||
|
||||
move.b $r0,[R_SERIAL1_REC_CTRL]
|
||||
|
||||
; Set up and enable the serial1 transmitter.
|
||||
move.b IO_FIELD (R_SERIAL1_TR_CTRL, txd, 0) \
|
||||
| IO_STATE (R_SERIAL1_TR_CTRL, tr_enable, enable) \
|
||||
@ -666,14 +661,14 @@ no_command_line:
|
||||
| IO_STATE (R_SERIAL2_TR_CTRL, tr_bitnr, tr_8bit),$r0
|
||||
move.b $r0,[R_SERIAL2_TR_CTRL]
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ETRAX_SERIAL_PORT3
|
||||
|
||||
#ifdef CONFIG_ETRAX_SERIAL_PORT3
|
||||
;; setup the serial port 3 at 115200 baud for debug purposes
|
||||
|
||||
|
||||
moveq IO_STATE (R_SERIAL3_XOFF, tx_stop, enable) \
|
||||
| IO_STATE (R_SERIAL3_XOFF, auto_xoff, disable) \
|
||||
| IO_FIELD (R_SERIAL3_XOFF, xoff_char, 0),$r0
|
||||
move.d $r0,[R_SERIAL3_XOFF]
|
||||
move.d $r0,[R_SERIAL3_XOFF]
|
||||
|
||||
; 115.2kbaud for both transmit and receive
|
||||
move.b IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz) \
|
||||
@ -689,8 +684,8 @@ no_command_line:
|
||||
| IO_STATE (R_SERIAL3_REC_CTRL, rec_par, even) \
|
||||
| IO_STATE (R_SERIAL3_REC_CTRL, rec_par_en, disable) \
|
||||
| IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0
|
||||
move.b $r0,[R_SERIAL3_REC_CTRL]
|
||||
|
||||
move.b $r0,[R_SERIAL3_REC_CTRL]
|
||||
|
||||
; Set up and enable the serial3 transmitter.
|
||||
move.b IO_FIELD (R_SERIAL3_TR_CTRL, txd, 0) \
|
||||
| IO_STATE (R_SERIAL3_TR_CTRL, tr_enable, enable) \
|
||||
@ -702,13 +697,11 @@ no_command_line:
|
||||
| IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0
|
||||
move.b $r0,[R_SERIAL3_TR_CTRL]
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_SVINTO_SIM */
|
||||
|
||||
jump start_kernel ; jump into the C-function start_kernel in init/main.c
|
||||
|
||||
|
||||
.data
|
||||
etrax_irv:
|
||||
etrax_irv:
|
||||
.dword 0
|
||||
romfs_start:
|
||||
.dword 0
|
||||
@ -716,13 +709,13 @@ romfs_length:
|
||||
.dword 0
|
||||
romfs_in_flash:
|
||||
.dword 0
|
||||
|
||||
|
||||
;; put some special pages at the beginning of the kernel aligned
|
||||
;; to page boundaries - the kernel cannot start until after this
|
||||
|
||||
#ifdef CONFIG_CRIS_LOW_MAP
|
||||
swapper_pg_dir = 0x60002000
|
||||
#else
|
||||
#else
|
||||
swapper_pg_dir = 0xc0002000
|
||||
#endif
|
||||
|
||||
|
||||
@ -5,7 +5,7 @@
|
||||
*
|
||||
* Authors: Bjorn Wesen (bjornw@axis.com)
|
||||
*
|
||||
* This file contains the interrupt vectors and some
|
||||
* This file contains the interrupt vectors and some
|
||||
* helper functions
|
||||
*
|
||||
*/
|
||||
@ -182,19 +182,14 @@ void do_multiple_IRQ(struct pt_regs* regs)
|
||||
setting the irq vector table.
|
||||
*/
|
||||
|
||||
void __init
|
||||
init_IRQ(void)
|
||||
void __init init_IRQ(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* clear all interrupt masks */
|
||||
|
||||
#ifndef CONFIG_SVINTO_SIM
|
||||
*R_IRQ_MASK0_CLR = 0xffffffff;
|
||||
*R_IRQ_MASK1_CLR = 0xffffffff;
|
||||
*R_IRQ_MASK2_CLR = 0xffffffff;
|
||||
#endif
|
||||
|
||||
*R_VECT_MASK_CLR = 0xffffffff;
|
||||
|
||||
for (i = 0; i < 256; i++)
|
||||
@ -211,25 +206,20 @@ init_IRQ(void)
|
||||
executed by the associated break handler, rather than just a jump
|
||||
address. therefore we need to setup a default breakpoint handler
|
||||
for all breakpoints */
|
||||
|
||||
for (i = 0; i < 16; i++)
|
||||
set_break_vector(i, do_sigtrap);
|
||||
|
||||
|
||||
/* except IRQ 15 which is the multiple-IRQ handler on Etrax100 */
|
||||
|
||||
set_int_vector(15, multiple_interrupt);
|
||||
|
||||
/* 0 and 1 which are special breakpoint/NMI traps */
|
||||
|
||||
/* 0 and 1 which are special breakpoint/NMI traps */
|
||||
set_int_vector(0, hwbreakpoint);
|
||||
set_int_vector(1, IRQ1_interrupt);
|
||||
|
||||
/* and irq 14 which is the mmu bus fault handler */
|
||||
|
||||
set_int_vector(14, mmu_bus_fault);
|
||||
|
||||
/* setup the system-call trap, which is reached by BREAK 13 */
|
||||
|
||||
set_break_vector(13, system_call);
|
||||
|
||||
/* setup a breakpoint handler for debugging used for both user and
|
||||
|
||||
@ -14,7 +14,6 @@
|
||||
#include <linux/slab.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/fs.h>
|
||||
#include <arch/svinto.h>
|
||||
#include <linux/init.h>
|
||||
#include <arch/system.h>
|
||||
#include <linux/ptrace.h>
|
||||
@ -56,14 +55,14 @@ void hard_reset_now (void)
|
||||
* code to know about it than the watchdog handler in entry.S and
|
||||
* this code, implementing hard reset through the watchdog.
|
||||
*/
|
||||
#if defined(CONFIG_ETRAX_WATCHDOG) && !defined(CONFIG_SVINTO_SIM)
|
||||
#if defined(CONFIG_ETRAX_WATCHDOG)
|
||||
extern int cause_of_death;
|
||||
#endif
|
||||
|
||||
printk("*** HARD RESET ***\n");
|
||||
local_irq_disable();
|
||||
|
||||
#if defined(CONFIG_ETRAX_WATCHDOG) && !defined(CONFIG_SVINTO_SIM)
|
||||
#if defined(CONFIG_ETRAX_WATCHDOG)
|
||||
cause_of_death = 0xbedead;
|
||||
#else
|
||||
/* Since we dont plan to keep on resetting the watchdog,
|
||||
|
||||
@ -14,7 +14,6 @@
|
||||
#include <linux/sched.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/mm.h>
|
||||
#include <arch/svinto.h>
|
||||
#include <asm/types.h>
|
||||
#include <asm/signal.h>
|
||||
#include <asm/io.h>
|
||||
@ -34,7 +33,7 @@ unsigned long get_ns_in_jiffie(void)
|
||||
|
||||
local_irq_save(flags);
|
||||
timer_count = *R_TIMER0_DATA;
|
||||
presc_count = *R_TIM_PRESC_STATUS;
|
||||
presc_count = *R_TIM_PRESC_STATUS;
|
||||
/* presc_count might be wrapped */
|
||||
t1 = *R_TIMER0_DATA;
|
||||
|
||||
@ -50,7 +49,7 @@ unsigned long get_ns_in_jiffie(void)
|
||||
presc_count = PRESCALE_VALUE - presc_count - PRESCALE_VALUE/2;
|
||||
}
|
||||
|
||||
ns = ( (TIMER0_DIV - timer_count) * ((1000000000/HZ)/TIMER0_DIV )) +
|
||||
ns = ( (TIMER0_DIV - timer_count) * ((1000000000/HZ)/TIMER0_DIV )) +
|
||||
( (presc_count) * (1000000000/PRESCALE_FREQ));
|
||||
return ns;
|
||||
}
|
||||
@ -80,7 +79,7 @@ static u32 cris_v10_gettimeoffset(void)
|
||||
* by the R_WATCHDOG register. The R_WATCHDOG register contains an enable bit
|
||||
* and a 3-bit key value. The effect of writing to the R_WATCHDOG register is
|
||||
* described in the table below:
|
||||
*
|
||||
*
|
||||
* Watchdog Value written:
|
||||
* state: To enable: To key: Operation:
|
||||
* -------- ---------- ------- ----------
|
||||
@ -89,15 +88,15 @@ static u32 cris_v10_gettimeoffset(void)
|
||||
* started 0 ~key Stop watchdog
|
||||
* started 1 ~key Restart watchdog with key = ~key.
|
||||
* started X new_key_val Change key to new_key_val.
|
||||
*
|
||||
*
|
||||
* Note: '~' is the bitwise NOT operator.
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
/* right now, starting the watchdog is the same as resetting it */
|
||||
#define start_watchdog reset_watchdog
|
||||
|
||||
#if defined(CONFIG_ETRAX_WATCHDOG) && !defined(CONFIG_SVINTO_SIM)
|
||||
#ifdef CONFIG_ETRAX_WATCHDOG
|
||||
static int watchdog_key = 0; /* arbitrary number */
|
||||
#endif
|
||||
|
||||
@ -107,10 +106,9 @@ static int watchdog_key = 0; /* arbitrary number */
|
||||
|
||||
#define WATCHDOG_MIN_FREE_PAGES 8
|
||||
|
||||
void
|
||||
reset_watchdog(void)
|
||||
void reset_watchdog(void)
|
||||
{
|
||||
#if defined(CONFIG_ETRAX_WATCHDOG) && !defined(CONFIG_SVINTO_SIM)
|
||||
#if defined(CONFIG_ETRAX_WATCHDOG)
|
||||
/* only keep watchdog happy as long as we have memory left! */
|
||||
if(nr_free_pages() > WATCHDOG_MIN_FREE_PAGES) {
|
||||
/* reset the watchdog with the inverse of the old key */
|
||||
@ -123,28 +121,23 @@ reset_watchdog(void)
|
||||
|
||||
/* stop the watchdog - we still need the correct key */
|
||||
|
||||
void
|
||||
stop_watchdog(void)
|
||||
void stop_watchdog(void)
|
||||
{
|
||||
#if defined(CONFIG_ETRAX_WATCHDOG) && !defined(CONFIG_SVINTO_SIM)
|
||||
#ifdef CONFIG_ETRAX_WATCHDOG
|
||||
watchdog_key ^= 0x7; /* invert key, which is 3 bits */
|
||||
*R_WATCHDOG = IO_FIELD(R_WATCHDOG, key, watchdog_key) |
|
||||
IO_STATE(R_WATCHDOG, enable, stop);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
extern void cris_do_profile(struct pt_regs *regs);
|
||||
|
||||
/*
|
||||
* timer_interrupt() needs to keep up the real-time clock,
|
||||
* as well as call the "xtime_update()" routine every clocktick
|
||||
*/
|
||||
|
||||
//static unsigned short myjiff; /* used by our debug routine print_timestamp */
|
||||
|
||||
extern void cris_do_profile(struct pt_regs *regs);
|
||||
|
||||
static inline irqreturn_t
|
||||
timer_interrupt(int irq, void *dev_id)
|
||||
static inline irqreturn_t timer_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
struct pt_regs *regs = get_irq_regs();
|
||||
/* acknowledge the timer irq */
|
||||
@ -160,44 +153,39 @@ timer_interrupt(int irq, void *dev_id)
|
||||
IO_STATE( R_TIMER_CTRL, tm0, run) |
|
||||
IO_STATE( R_TIMER_CTRL, clksel0, c6250kHz);
|
||||
#else
|
||||
*R_TIMER_CTRL = r_timer_ctrl_shadow |
|
||||
IO_STATE(R_TIMER_CTRL, i0, clr);
|
||||
*R_TIMER_CTRL = r_timer_ctrl_shadow | IO_STATE(R_TIMER_CTRL, i0, clr);
|
||||
#endif
|
||||
|
||||
/* reset watchdog otherwise it resets us! */
|
||||
reset_watchdog();
|
||||
|
||||
|
||||
/* Update statistics. */
|
||||
update_process_times(user_mode(regs));
|
||||
|
||||
/* call the real timer interrupt handler */
|
||||
|
||||
xtime_update(1);
|
||||
|
||||
|
||||
cris_do_profile(regs); /* Save profiling information */
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
/* timer is IRQF_SHARED so drivers can add stuff to the timer irq chain
|
||||
* it needs to be IRQF_DISABLED to make the jiffies update work properly
|
||||
*/
|
||||
/* timer is IRQF_SHARED so drivers can add stuff to the timer irq chain */
|
||||
|
||||
static struct irqaction irq2 = {
|
||||
.handler = timer_interrupt,
|
||||
.flags = IRQF_SHARED | IRQF_DISABLED,
|
||||
.flags = IRQF_SHARED,
|
||||
.name = "timer",
|
||||
};
|
||||
|
||||
void __init
|
||||
time_init(void)
|
||||
{
|
||||
void __init time_init(void)
|
||||
{
|
||||
arch_gettimeoffset = cris_v10_gettimeoffset;
|
||||
|
||||
/* probe for the RTC and read it if it exists
|
||||
* Before the RTC can be probed the loops_per_usec variable needs
|
||||
* to be initialized to make usleep work. A better value for
|
||||
* loops_per_usec is calculated by the kernel later once the
|
||||
* clock has started.
|
||||
/* probe for the RTC and read it if it exists
|
||||
* Before the RTC can be probed the loops_per_usec variable needs
|
||||
* to be initialized to make usleep work. A better value for
|
||||
* loops_per_usec is calculated by the kernel later once the
|
||||
* clock has started.
|
||||
*/
|
||||
loops_per_usec = 50;
|
||||
|
||||
@ -208,7 +196,7 @@ time_init(void)
|
||||
* Remember that linux/timex.h contains #defines that rely on the
|
||||
* timer settings below (hz and divide factor) !!!
|
||||
*/
|
||||
|
||||
|
||||
#ifdef USE_CASCADE_TIMERS
|
||||
*R_TIMER_CTRL =
|
||||
IO_FIELD( R_TIMER_CTRL, timerdiv1, 0) |
|
||||
@ -219,8 +207,8 @@ time_init(void)
|
||||
IO_STATE( R_TIMER_CTRL, i0, nop) |
|
||||
IO_STATE( R_TIMER_CTRL, tm0, stop_ld) |
|
||||
IO_STATE( R_TIMER_CTRL, clksel0, c6250kHz);
|
||||
|
||||
*R_TIMER_CTRL = r_timer_ctrl_shadow =
|
||||
|
||||
*R_TIMER_CTRL = r_timer_ctrl_shadow =
|
||||
IO_FIELD( R_TIMER_CTRL, timerdiv1, 0) |
|
||||
IO_FIELD( R_TIMER_CTRL, timerdiv0, 0) |
|
||||
IO_STATE( R_TIMER_CTRL, i1, nop) |
|
||||
@ -230,18 +218,18 @@ time_init(void)
|
||||
IO_STATE( R_TIMER_CTRL, tm0, run) |
|
||||
IO_STATE( R_TIMER_CTRL, clksel0, c6250kHz);
|
||||
#else
|
||||
*R_TIMER_CTRL =
|
||||
IO_FIELD(R_TIMER_CTRL, timerdiv1, 192) |
|
||||
*R_TIMER_CTRL =
|
||||
IO_FIELD(R_TIMER_CTRL, timerdiv1, 192) |
|
||||
IO_FIELD(R_TIMER_CTRL, timerdiv0, TIMER0_DIV) |
|
||||
IO_STATE(R_TIMER_CTRL, i1, nop) |
|
||||
IO_STATE(R_TIMER_CTRL, i1, nop) |
|
||||
IO_STATE(R_TIMER_CTRL, tm1, stop_ld) |
|
||||
IO_STATE(R_TIMER_CTRL, clksel1, c19k2Hz) |
|
||||
IO_STATE(R_TIMER_CTRL, i0, nop) |
|
||||
IO_STATE(R_TIMER_CTRL, tm0, stop_ld) |
|
||||
IO_STATE(R_TIMER_CTRL, clksel0, flexible);
|
||||
|
||||
|
||||
*R_TIMER_CTRL = r_timer_ctrl_shadow =
|
||||
IO_FIELD(R_TIMER_CTRL, timerdiv1, 192) |
|
||||
IO_FIELD(R_TIMER_CTRL, timerdiv1, 192) |
|
||||
IO_FIELD(R_TIMER_CTRL, timerdiv0, TIMER0_DIV) |
|
||||
IO_STATE(R_TIMER_CTRL, i1, nop) |
|
||||
IO_STATE(R_TIMER_CTRL, tm1, run) |
|
||||
@ -253,16 +241,14 @@ time_init(void)
|
||||
*R_TIMER_PRESCALE = PRESCALE_VALUE;
|
||||
#endif
|
||||
|
||||
*R_IRQ_MASK0_SET =
|
||||
IO_STATE(R_IRQ_MASK0_SET, timer0, set); /* unmask the timer irq */
|
||||
|
||||
/* now actually register the timer irq handler that calls timer_interrupt() */
|
||||
|
||||
/* unmask the timer irq */
|
||||
*R_IRQ_MASK0_SET = IO_STATE(R_IRQ_MASK0_SET, timer0, set);
|
||||
|
||||
/* now actually register the irq handler that calls timer_interrupt() */
|
||||
setup_irq(2, &irq2); /* irq 2 is the timer0 irq in etrax */
|
||||
|
||||
/* enable watchdog if we should use one */
|
||||
|
||||
#if defined(CONFIG_ETRAX_WATCHDOG) && !defined(CONFIG_SVINTO_SIM)
|
||||
#if defined(CONFIG_ETRAX_WATCHDOG)
|
||||
printk("Enabling watchdog...\n");
|
||||
start_watchdog();
|
||||
|
||||
@ -275,9 +261,7 @@ time_init(void)
|
||||
driver or infrastructure support yet. */
|
||||
asm ("setf m");
|
||||
|
||||
*R_IRQ_MASK0_SET =
|
||||
IO_STATE(R_IRQ_MASK0_SET, watchdog_nmi, set);
|
||||
*R_VECT_MASK_SET =
|
||||
IO_STATE(R_VECT_MASK_SET, nmi, set);
|
||||
*R_IRQ_MASK0_SET = IO_STATE(R_IRQ_MASK0_SET, watchdog_nmi, set);
|
||||
*R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, nmi, set);
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -5,9 +5,7 @@
|
||||
* Note: This file may not modify r9 because r9 is used to carry
|
||||
* information from the decompresser to the kernel
|
||||
*
|
||||
* Copyright (C) 2000, 2001 Axis Communications AB
|
||||
*
|
||||
* Authors: Mikael Starvik (starvik@axis.com)
|
||||
* Copyright (C) 2000-2012 Axis Communications AB
|
||||
*
|
||||
*/
|
||||
|
||||
@ -18,16 +16,15 @@
|
||||
|
||||
|
||||
;; WARNING! The registers r8 and r9 are used as parameters carrying
|
||||
;; information from the decompressor (if the kernel was compressed).
|
||||
;; information from the decompressor (if the kernel was compressed).
|
||||
;; They should not be used in the code below.
|
||||
|
||||
#ifndef CONFIG_SVINTO_SIM
|
||||
move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
|
||||
move.d $r0, [R_WAITSTATES]
|
||||
|
||||
move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
|
||||
move.d $r0, [R_BUS_CONFIG]
|
||||
|
||||
|
||||
#ifndef CONFIG_ETRAX_SDRAM
|
||||
move.d CONFIG_ETRAX_DEF_R_DRAM_CONFIG, $r0
|
||||
move.d $r0, [R_DRAM_CONFIG]
|
||||
@ -38,14 +35,14 @@
|
||||
;; Samsung SDRAMs seem to require to be initialized twice to work properly.
|
||||
moveq 2, $r6
|
||||
_sdram_init:
|
||||
|
||||
|
||||
; Refer to ETRAX 100LX Designers Reference for a description of SDRAM initialization
|
||||
|
||||
|
||||
; Bank configuration
|
||||
move.d CONFIG_ETRAX_DEF_R_SDRAM_CONFIG, $r0
|
||||
move.d $r0, [R_SDRAM_CONFIG]
|
||||
|
||||
; Calculate value of mrs_data
|
||||
; Calculate value of mrs_data
|
||||
; CAS latency = 2 && bus_width = 32 => 0x40
|
||||
; CAS latency = 3 && bus_width = 32 => 0x60
|
||||
; CAS latency = 2 && bus_width = 16 => 0x20
|
||||
@ -56,22 +53,22 @@ _sdram_init:
|
||||
and.d 0x00ff0000, $r2
|
||||
bne _set_timing
|
||||
lsrq 16, $r2
|
||||
|
||||
|
||||
move.d 0x40, $r2 ; Assume 32 bits and CAS latency = 2
|
||||
move.d CONFIG_ETRAX_DEF_R_SDRAM_TIMING, $r1
|
||||
move.d $r1, $r3
|
||||
and.d 0x03, $r1 ; Get CAS latency
|
||||
and.d 0x03, $r1 ; Get CAS latency
|
||||
and.d 0x1000, $r3 ; 50 or 100 MHz?
|
||||
beq _speed_50
|
||||
nop
|
||||
_speed_100:
|
||||
_speed_100:
|
||||
cmp.d 0x00, $r1 ; CAS latency = 2?
|
||||
beq _bw_check
|
||||
nop
|
||||
or.d 0x20, $r2 ; CAS latency = 3
|
||||
or.d 0x20, $r2 ; CAS latency = 3
|
||||
ba _bw_check
|
||||
nop
|
||||
_speed_50:
|
||||
_speed_50:
|
||||
cmp.d 0x01, $r1 ; CAS latency = 2?
|
||||
beq _bw_check
|
||||
nop
|
||||
@ -86,19 +83,19 @@ _bw_check:
|
||||
; Set timing parameters. Starts master clock
|
||||
_set_timing:
|
||||
move.d CONFIG_ETRAX_DEF_R_SDRAM_TIMING, $r1
|
||||
and.d 0x8000f9ff, $r1 ; Make sure mrs data and command is 0
|
||||
and.d 0x8000f9ff, $r1 ; Make sure mrs data and command is 0
|
||||
or.d 0x80000000, $r1 ; Make sure sdram enable bit is set
|
||||
move.d $r1, $r5
|
||||
or.d 0x0000c000, $r1 ; ref = disable
|
||||
lslq 16, $r2 ; mrs data starts at bit 16
|
||||
or.d $r2, $r1
|
||||
move.d $r1, [R_SDRAM_TIMING]
|
||||
|
||||
or.d $r2, $r1
|
||||
move.d $r1, [R_SDRAM_TIMING]
|
||||
|
||||
; Wait 200us
|
||||
move.d 10000, $r2
|
||||
1: bne 1b
|
||||
subq 1, $r2
|
||||
|
||||
|
||||
; Issue initialization command sequence
|
||||
move.d _sdram_commands_start, $r2
|
||||
and.d 0x000fffff, $r2 ; Make sure commands are read from flash
|
||||
@ -144,7 +141,6 @@ _sdram_commands_start:
|
||||
.byte 2 ; refresh
|
||||
.byte 0 ; nop
|
||||
.byte 1 ; mrs
|
||||
.byte 0 ; nop
|
||||
_sdram_commands_end:
|
||||
#endif
|
||||
.byte 0 ; nop
|
||||
_sdram_commands_end:
|
||||
#endif
|
||||
|
||||
@ -978,7 +978,7 @@ static int __init gpio_init(void)
|
||||
CRIS_LED_DISK_WRITE(0);
|
||||
|
||||
int res2 = request_irq(GIO_INTR_VECT, gpio_interrupt,
|
||||
IRQF_SHARED | IRQF_DISABLED, "gpio", &alarmlist);
|
||||
IRQF_SHARED, "gpio", &alarmlist);
|
||||
if (res2) {
|
||||
printk(KERN_ERR "err: irq for gpio\n");
|
||||
return res2;
|
||||
|
||||
@ -964,11 +964,11 @@ gpio_init(void)
|
||||
* in some tests.
|
||||
*/
|
||||
if (request_irq(TIMER0_INTR_VECT, gpio_poll_timer_interrupt,
|
||||
IRQF_SHARED | IRQF_DISABLED, "gpio poll", &alarmlist))
|
||||
IRQF_SHARED, "gpio poll", &alarmlist))
|
||||
printk(KERN_ERR "timer0 irq for gpio\n");
|
||||
|
||||
if (request_irq(GIO_INTR_VECT, gpio_pa_interrupt,
|
||||
IRQF_SHARED | IRQF_DISABLED, "gpio PA", &alarmlist))
|
||||
IRQF_SHARED, "gpio PA", &alarmlist))
|
||||
printk(KERN_ERR "PA irq for gpio\n");
|
||||
|
||||
#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
|
||||
|
||||
@ -19,6 +19,7 @@
|
||||
#include <linux/init.h>
|
||||
#include <linux/timer.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/wait.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <dma.h>
|
||||
@ -1144,7 +1145,8 @@ static ssize_t sync_serial_read(struct file * file, char * buf,
|
||||
if (file->f_flags & O_NONBLOCK)
|
||||
return -EAGAIN;
|
||||
|
||||
interruptible_sleep_on(&port->in_wait_q);
|
||||
wait_event_interruptible(port->in_wait_q,
|
||||
!(start == end && !port->full));
|
||||
if (signal_pending(current))
|
||||
return -EINTR;
|
||||
|
||||
|
||||
@ -424,7 +424,7 @@ nmi_interrupt:
|
||||
bpl 1f
|
||||
nop
|
||||
jsr handle_watchdog_bite ; In time.c.
|
||||
move.d $sp, $r10 ; Pointer to registers
|
||||
move.d $sp, $r10 ; Pointer to registers
|
||||
1: btstq REG_BIT(intr_vect, r_nmi, ext), $r0
|
||||
bpl 1f
|
||||
nop
|
||||
@ -452,7 +452,7 @@ spurious_interrupt:
|
||||
nop
|
||||
|
||||
;; This handles the case when multiple interrupts arrive at the same
|
||||
;; time. Jump to the first set interrupt bit in a priotiry fashion. The
|
||||
;; time. Jump to the first set interrupt bit in a priority fashion. The
|
||||
;; hardware will call the unserved interrupts after the handler
|
||||
;; finishes.
|
||||
.type multiple_interrupt, @function
|
||||
@ -885,13 +885,29 @@ sys_call_table:
|
||||
.long sys_preadv
|
||||
.long sys_pwritev
|
||||
.long sys_setns /* 335 */
|
||||
.long sys_name_to_handle_at
|
||||
.long sys_open_by_handle_at
|
||||
.long sys_rt_tgsigqueueinfo
|
||||
.long sys_perf_event_open
|
||||
.long sys_recvmmsg /* 340 */
|
||||
.long sys_accept4
|
||||
.long sys_fanotify_init
|
||||
.long sys_fanotify_mark
|
||||
.long sys_prlimit64
|
||||
.long sys_clock_adjtime /* 345 */
|
||||
.long sys_syncfs
|
||||
.long sys_sendmmsg
|
||||
.long sys_process_vm_readv
|
||||
.long sys_process_vm_writev
|
||||
.long sys_kcmp /* 350 */
|
||||
.long sys_finit_module
|
||||
|
||||
/*
|
||||
* NOTE!! This doesn't have to be exact - we just have
|
||||
* to make sure we have _enough_ of the "sys_ni_syscall"
|
||||
* entries. Don't panic if you notice that this hasn't
|
||||
* been shrunk every time we add a new system call.
|
||||
*/
|
||||
/*
|
||||
* NOTE!! This doesn't have to be exact - we just have
|
||||
* to make sure we have _enough_ of the "sys_ni_syscall"
|
||||
* entries. Don't panic if you notice that this hasn't
|
||||
* been shrunk every time we add a new system call.
|
||||
*/
|
||||
|
||||
.rept NR_syscalls - (.-sys_call_table) / 4
|
||||
.long sys_ni_syscall
|
||||
|
||||
@ -786,7 +786,7 @@ int fast_timer_init(void)
|
||||
proc_create("fasttimer", 0, NULL, &proc_fasttimer_fops);
|
||||
#endif /* PROC_FS */
|
||||
if (request_irq(TIMER0_INTR_VECT, timer_trig_interrupt,
|
||||
IRQF_SHARED | IRQF_DISABLED,
|
||||
IRQF_SHARED,
|
||||
"fast timer int", &fast_timer_list))
|
||||
printk(KERN_ERR "err: fasttimer irq\n");
|
||||
fast_timer_is_init = 1;
|
||||
|
||||
@ -331,11 +331,11 @@ extern void do_IRQ(int irq, struct pt_regs * regs);
|
||||
void
|
||||
crisv32_do_IRQ(int irq, int block, struct pt_regs* regs)
|
||||
{
|
||||
/* Interrupts that may not be moved to another CPU and
|
||||
* are IRQF_DISABLED may skip blocking. This is currently
|
||||
* only valid for the timer IRQ and the IPI and is used
|
||||
* for the timer interrupt to avoid watchdog starvation.
|
||||
*/
|
||||
/* Interrupts that may not be moved to another CPU may
|
||||
* skip blocking. This is currently only valid for the
|
||||
* timer IRQ and the IPI and is used for the timer
|
||||
* interrupt to avoid watchdog starvation.
|
||||
*/
|
||||
if (!block) {
|
||||
do_IRQ(irq, regs);
|
||||
return;
|
||||
|
||||
@ -64,7 +64,7 @@ static irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id);
|
||||
static int send_ipi(int vector, int wait, cpumask_t cpu_mask);
|
||||
static struct irqaction irq_ipi = {
|
||||
.handler = crisv32_ipi_interrupt,
|
||||
.flags = IRQF_DISABLED,
|
||||
.flags = 0,
|
||||
.name = "ipi",
|
||||
};
|
||||
|
||||
|
||||
@ -216,12 +216,10 @@ static inline irqreturn_t timer_interrupt(int irq, void *dev_id)
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
/* Timer is IRQF_SHARED so drivers can add stuff to the timer irq chain.
|
||||
* It needs to be IRQF_DISABLED to make the jiffies update work properly.
|
||||
*/
|
||||
/* Timer is IRQF_SHARED so drivers can add stuff to the timer irq chain. */
|
||||
static struct irqaction irq_timer = {
|
||||
.handler = timer_interrupt,
|
||||
.flags = IRQF_SHARED | IRQF_DISABLED,
|
||||
.flags = IRQF_SHARED,
|
||||
.name = "timer"
|
||||
};
|
||||
|
||||
|
||||
@ -256,11 +256,11 @@ static void crisv32_arbiter_init(void)
|
||||
crisv32_arbiter_config(1, EXT_REGION, 0);
|
||||
|
||||
if (request_irq(MEMARB_FOO_INTR_VECT, crisv32_foo_arbiter_irq,
|
||||
IRQF_DISABLED, "arbiter", NULL))
|
||||
0, "arbiter", NULL))
|
||||
printk(KERN_ERR "Couldn't allocate arbiter IRQ\n");
|
||||
|
||||
if (request_irq(MEMARB_BAR_INTR_VECT, crisv32_bar_arbiter_irq,
|
||||
IRQF_DISABLED, "arbiter", NULL))
|
||||
0, "arbiter", NULL))
|
||||
printk(KERN_ERR "Couldn't allocate arbiter IRQ\n");
|
||||
|
||||
#ifndef CONFIG_ETRAX_KGDB
|
||||
|
||||
@ -184,7 +184,7 @@ static void crisv32_arbiter_init(void)
|
||||
crisv32_arbiter_config(EXT_REGION, 0);
|
||||
crisv32_arbiter_config(INT_REGION, 0);
|
||||
|
||||
if (request_irq(MEMARB_INTR_VECT, crisv32_arbiter_irq, IRQF_DISABLED,
|
||||
if (request_irq(MEMARB_INTR_VECT, crisv32_arbiter_irq, 0,
|
||||
"arbiter", NULL))
|
||||
printk(KERN_ERR "Couldn't allocate arbiter IRQ\n");
|
||||
|
||||
|
||||
@ -50,7 +50,6 @@
|
||||
|
||||
nop
|
||||
di
|
||||
#ifndef CONFIG_SVINTO_SIM
|
||||
;; setup port PA and PB default initial directions and data
|
||||
;; (so we can flash LEDs, and so that DTR and others are set)
|
||||
|
||||
@ -67,7 +66,6 @@
|
||||
;; We need to setup the bus registers before we start using the DRAM
|
||||
#include "../../lib/dram_init.S"
|
||||
|
||||
#endif
|
||||
;; Setup the stack to a suitably high address.
|
||||
;; We assume 8 MB is the minimum DRAM in an eLinux
|
||||
;; product and put the sp at the top for now.
|
||||
|
||||
@ -1,8 +1,6 @@
|
||||
#ifndef _ASM_ARCH_CRIS_IO_H
|
||||
#define _ASM_ARCH_CRIS_IO_H
|
||||
|
||||
#include <arch/svinto.h>
|
||||
|
||||
/* Etrax shadow registers - which live in arch/cris/kernel/shadows.c */
|
||||
|
||||
extern unsigned long gen_config_ii_shadow;
|
||||
@ -34,7 +32,7 @@ extern volatile unsigned long *port_csp4_addr;
|
||||
|
||||
/* The LED's on various Etrax-based products are set differently. */
|
||||
|
||||
#if defined(CONFIG_ETRAX_NO_LEDS) || defined(CONFIG_SVINTO_SIM)
|
||||
#if defined(CONFIG_ETRAX_NO_LEDS)
|
||||
#undef CONFIG_ETRAX_PA_LEDS
|
||||
#undef CONFIG_ETRAX_PB_LEDS
|
||||
#undef CONFIG_ETRAX_CSP0_LEDS
|
||||
@ -171,29 +169,4 @@ extern volatile unsigned long *port_csp4_addr;
|
||||
#define SOFT_SHUTDOWN()
|
||||
#endif
|
||||
|
||||
/* Console I/O for simulated etrax100. Use #ifdef so erroneous
|
||||
use will be evident. */
|
||||
#ifdef CONFIG_SVINTO_SIM
|
||||
/* Let's use the ucsim interface since it lets us do write(2, ...) */
|
||||
#define SIMCOUT(s,len) \
|
||||
asm ("moveq 4,$r9 \n\t" \
|
||||
"moveq 2,$r10 \n\t" \
|
||||
"move.d %0,$r11 \n\t" \
|
||||
"move.d %1,$r12 \n\t" \
|
||||
"push $irp \n\t" \
|
||||
"move 0f,$irp \n\t" \
|
||||
"jump -6809 \n" \
|
||||
"0: \n\t" \
|
||||
"pop $irp" \
|
||||
: : "rm" (s), "rm" (len) : "r9","r10","r11","r12","memory")
|
||||
#define TRACE_ON() __extension__ \
|
||||
({ int _Foofoo; __asm__ volatile ("bmod [%0],%0" : "=r" (_Foofoo) : "0" \
|
||||
(255)); _Foofoo; })
|
||||
|
||||
#define TRACE_OFF() do { __asm__ volatile ("bmod [%0],%0" :: "r" (254)); } while (0)
|
||||
#define SIM_END() do { __asm__ volatile ("bmod [%0],%0" :: "r" (28)); } while (0)
|
||||
#define CRIS_CYCLES() __extension__ \
|
||||
({ unsigned long c; asm ("bmod [%1],%0" : "=r" (c) : "r" (27)); c;})
|
||||
#endif /* ! defined CONFIG_SVINTO_SIM */
|
||||
|
||||
#endif
|
||||
|
||||
@ -141,9 +141,9 @@ __asm__ ( \
|
||||
* handler is run and it prioritizes the timer interrupt. However if we had BLOCK'ed
|
||||
* it here, we would not get the multiple_irq at all.
|
||||
*
|
||||
* The non-blocking here is based on the knowledge that the timer interrupt is
|
||||
* registered as a fast interrupt (IRQF_DISABLED) so that we _know_ there will not
|
||||
* be an sti() before the timer irq handler is run to acknowledge the interrupt.
|
||||
* The non-blocking here is based on the knowledge that the timer interrupt runs
|
||||
* with interrupts disabled, and therefore there will not be an sti() before the
|
||||
* timer irq handler is run to acknowledge the interrupt.
|
||||
*/
|
||||
|
||||
#define BUILD_TIMER_IRQ(nr,mask) \
|
||||
|
||||
@ -102,9 +102,9 @@ __asm__ ( \
|
||||
* multiple_irq handler is run and it prioritizes the timer interrupt. However
|
||||
* if we had BLOCK'edit here, we would not get the multiple_irq at all.
|
||||
*
|
||||
* The non-blocking here is based on the knowledge that the timer interrupt is
|
||||
* registered as a fast interrupt (IRQF_DISABLED) so that we _know_ there will not
|
||||
* be an sti() before the timer irq handler is run to acknowledge the interrupt.
|
||||
* The non-blocking here is based on the knowledge that the timer interrupt runs
|
||||
* with interrupts disabled, and therefore there will not be an sti() before the
|
||||
* timer irq handler is run to acknowledge the interrupt.
|
||||
*/
|
||||
#define BUILD_TIMER_IRQ(nr, mask) \
|
||||
void IRQ_NAME(nr); \
|
||||
|
||||
@ -4,7 +4,7 @@
|
||||
#include <uapi/asm/unistd.h>
|
||||
|
||||
|
||||
#define NR_syscalls 336
|
||||
#define NR_syscalls 360
|
||||
|
||||
#include <arch/unistd.h>
|
||||
|
||||
|
||||
@ -340,5 +340,21 @@
|
||||
#define __NR_preadv 333
|
||||
#define __NR_pwritev 334
|
||||
#define __NR_setns 335
|
||||
#define __NR_name_to_handle_at 336
|
||||
#define __NR_open_by_handle_at 337
|
||||
#define __NR_rt_tgsigqueueinfo 338
|
||||
#define __NR_perf_event_open 339
|
||||
#define __NR_recvmmsg 340
|
||||
#define __NR_accept4 341
|
||||
#define __NR_fanotify_init 342
|
||||
#define __NR_fanotify_mark 343
|
||||
#define __NR_prlimit64 344
|
||||
#define __NR_clock_adjtime 345
|
||||
#define __NR_syncfs 346
|
||||
#define __NR_sendmmsg 347
|
||||
#define __NR_process_vm_readv 348
|
||||
#define __NR_process_vm_writev 349
|
||||
#define __NR_kcmp 350
|
||||
#define __NR_finit_module 351
|
||||
|
||||
#endif /* _UAPI_ASM_CRIS_UNISTD_H_ */
|
||||
|
||||
@ -40,9 +40,6 @@
|
||||
|
||||
/* called by the assembler IRQ entry functions defined in irq.h
|
||||
* to dispatch the interrupts to registered handlers
|
||||
* interrupts are disabled upon entry - depending on if the
|
||||
* interrupt was registered with IRQF_DISABLED or not, interrupts
|
||||
* are re-enabled or not.
|
||||
*/
|
||||
|
||||
asmlinkage void do_IRQ(int irq, struct pt_regs * regs)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user