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[ARM] armv7: add dedicated ARMv7 barrier instructions

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Starting with ARMv7, there are dedicated instruction for the ISB, DSB
and DMB barriers and there is no need to execute them as CP15
operations.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Catalin Marinas 2007-05-08 22:53:44 +01:00 committed by Russell King
parent aaf83acba9
commit 56163fcf19
1 changed files with 5 additions and 1 deletions
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6
include/asm-arm/system.h
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@ -158,7 +158,11 @@ extern unsigned int user_debug;
#define vectors_high() (0)
#endif
#if defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ >= 6
#if __LINUX_ARM_ARCH__ >= 7
#define isb() __asm__ __volatile__ ("isb" : : : "memory")
#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
#elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6
#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
: : "r" (0) : "memory")
#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \