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ARM: EXYNOS: Remove unused static uart resource information
All supported EXYNOS5 platforms are device tree enabled and hence the unused static uart resource information is removed. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> [kgene.kim@samsung.com: changed to exynos4_init_uarts() clearly] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -62,7 +62,7 @@ static void exynos4_map_io(void);
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static void exynos5_map_io(void);
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static void exynos4_init_clocks(int xtal);
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static void exynos5_init_clocks(int xtal);
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static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no);
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static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);
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static int exynos_init(void);
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static struct cpu_table cpu_ids[] __initdata = {
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@ -71,7 +71,7 @@ static struct cpu_table cpu_ids[] __initdata = {
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.idmask = EXYNOS4_CPU_MASK,
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.map_io = exynos4_map_io,
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.init_clocks = exynos4_init_clocks,
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.init_uarts = exynos_init_uarts,
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.init_uarts = exynos4_init_uarts,
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.init = exynos_init,
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.name = name_exynos4210,
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}, {
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@ -79,7 +79,7 @@ static struct cpu_table cpu_ids[] __initdata = {
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.idmask = EXYNOS4_CPU_MASK,
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.map_io = exynos4_map_io,
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.init_clocks = exynos4_init_clocks,
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.init_uarts = exynos_init_uarts,
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.init_uarts = exynos4_init_uarts,
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.init = exynos_init,
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.name = name_exynos4212,
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}, {
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@ -87,7 +87,7 @@ static struct cpu_table cpu_ids[] __initdata = {
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.idmask = EXYNOS4_CPU_MASK,
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.map_io = exynos4_map_io,
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.init_clocks = exynos4_init_clocks,
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.init_uarts = exynos_init_uarts,
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.init_uarts = exynos4_init_uarts,
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.init = exynos_init,
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.name = name_exynos4412,
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}, {
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@ -95,7 +95,6 @@ static struct cpu_table cpu_ids[] __initdata = {
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.idmask = EXYNOS5_SOC_MASK,
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.map_io = exynos5_map_io,
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.init_clocks = exynos5_init_clocks,
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.init_uarts = exynos_init_uarts,
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.init = exynos_init,
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.name = name_exynos5250,
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},
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@ -707,7 +706,7 @@ static int __init exynos_init(void)
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/* uart registration process */
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static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no)
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static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
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{
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struct s3c2410_uartcfg *tcfg = cfg;
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u32 ucnt;
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@ -715,10 +714,7 @@ static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no)
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for (ucnt = 0; ucnt < no; ucnt++, tcfg++)
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tcfg->has_fracval = 1;
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if (soc_is_exynos5250())
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s3c24xx_init_uartdevs("exynos4210-uart", exynos5_uart_resources, cfg, no);
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else
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s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no);
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s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no);
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}
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static void __iomem *exynos_eint_base;
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@ -52,27 +52,3 @@ struct s3c24xx_uart_resources exynos4_uart_resources[] __initdata = {
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.nr_resources = ARRAY_SIZE(exynos4_uart3_resource),
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},
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};
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EXYNOS_UART_RESOURCE(5, 0)
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EXYNOS_UART_RESOURCE(5, 1)
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EXYNOS_UART_RESOURCE(5, 2)
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EXYNOS_UART_RESOURCE(5, 3)
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struct s3c24xx_uart_resources exynos5_uart_resources[] __initdata = {
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[0] = {
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.resources = exynos5_uart0_resource,
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.nr_resources = ARRAY_SIZE(exynos5_uart0_resource),
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},
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[1] = {
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.resources = exynos5_uart1_resource,
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.nr_resources = ARRAY_SIZE(exynos5_uart0_resource),
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},
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[2] = {
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.resources = exynos5_uart2_resource,
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.nr_resources = ARRAY_SIZE(exynos5_uart2_resource),
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},
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[3] = {
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.resources = exynos5_uart3_resource,
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.nr_resources = ARRAY_SIZE(exynos5_uart3_resource),
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},
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};
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@ -259,11 +259,6 @@
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#define EXYNOS5_IRQ_IEM_IEC IRQ_SPI(48)
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#define EXYNOS5_IRQ_IEM_APC IRQ_SPI(49)
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#define EXYNOS5_IRQ_GPIO_C2C IRQ_SPI(50)
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#define EXYNOS5_IRQ_UART0 IRQ_SPI(51)
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#define EXYNOS5_IRQ_UART1 IRQ_SPI(52)
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#define EXYNOS5_IRQ_UART2 IRQ_SPI(53)
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#define EXYNOS5_IRQ_UART3 IRQ_SPI(54)
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#define EXYNOS5_IRQ_UART4 IRQ_SPI(55)
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#define EXYNOS5_IRQ_IIC IRQ_SPI(56)
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#define EXYNOS5_IRQ_IIC1 IRQ_SPI(57)
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#define EXYNOS5_IRQ_IIC2 IRQ_SPI(58)
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@ -271,7 +271,6 @@
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#define EXYNOS5_PA_UART1 0x12C10000
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#define EXYNOS5_PA_UART2 0x12C20000
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#define EXYNOS5_PA_UART3 0x12C30000
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#define EXYNOS5_SZ_UART SZ_256
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#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
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