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Merge branch 'asoc-4.19' into asoc-4.20 Cirrus conflict
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commit
54a3da1c10
@ -13432,9 +13432,8 @@ F: drivers/i2c/busses/i2c-synquacer.c
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F: Documentation/devicetree/bindings/i2c/i2c-synquacer.txt
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SOCIONEXT UNIPHIER SOUND DRIVER
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M: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
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L: alsa-devel@alsa-project.org (moderated for non-subscribers)
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S: Maintained
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S: Orphan
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F: sound/soc/uniphier/
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SOEKRIS NET48XX LED SUPPORT
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@ -16,6 +16,7 @@
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/sizes.h>
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#include <linux/pm_runtime.h>
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@ -184,6 +185,24 @@ static void config_dma_descriptor_in_sram(void __iomem *acp_mmio,
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acp_reg_write(descr_info->xfer_val, acp_mmio, mmACP_SRBM_Targ_Idx_Data);
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}
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static void pre_config_reset(void __iomem *acp_mmio, u16 ch_num)
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{
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u32 dma_ctrl;
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int ret;
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/* clear the reset bit */
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dma_ctrl = acp_reg_read(acp_mmio, mmACP_DMA_CNTL_0 + ch_num);
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dma_ctrl &= ~ACP_DMA_CNTL_0__DMAChRst_MASK;
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acp_reg_write(dma_ctrl, acp_mmio, mmACP_DMA_CNTL_0 + ch_num);
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/* check the reset bit before programming configuration registers */
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ret = readl_poll_timeout(acp_mmio + ((mmACP_DMA_CNTL_0 + ch_num) * 4),
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dma_ctrl,
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!(dma_ctrl & ACP_DMA_CNTL_0__DMAChRst_MASK),
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100, ACP_DMA_RESET_TIME);
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if (ret < 0)
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pr_err("Failed to clear reset of channel : %d\n", ch_num);
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}
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/*
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* Initialize the DMA descriptor information for transfer between
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* system memory <-> ACP SRAM
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@ -236,6 +255,7 @@ static void set_acp_sysmem_dma_descriptors(void __iomem *acp_mmio,
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config_dma_descriptor_in_sram(acp_mmio, dma_dscr_idx,
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&dmadscr[i]);
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}
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pre_config_reset(acp_mmio, ch);
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config_acp_dma_channel(acp_mmio, ch,
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dma_dscr_idx - 1,
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NUM_DSCRS_PER_CHANNEL,
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@ -275,6 +295,7 @@ static void set_acp_to_i2s_dma_descriptors(void __iomem *acp_mmio, u32 size,
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config_dma_descriptor_in_sram(acp_mmio, dma_dscr_idx,
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&dmadscr[i]);
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}
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pre_config_reset(acp_mmio, ch);
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/* Configure the DMA channel with the above descriptore */
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config_acp_dma_channel(acp_mmio, ch, dma_dscr_idx - 1,
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NUM_DSCRS_PER_CHANNEL,
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@ -462,6 +462,11 @@ static void rsnd_adg_get_clkout(struct rsnd_priv *priv,
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goto rsnd_adg_get_clkout_end;
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req_size = prop->length / sizeof(u32);
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if (req_size > REQ_SIZE) {
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dev_err(dev,
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"too many clock-frequency, use top %d\n", REQ_SIZE);
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req_size = REQ_SIZE;
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}
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of_property_read_u32_array(np, "clock-frequency", req_rate, req_size);
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req_48kHz_rate = 0;
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@ -482,7 +482,7 @@ static int rsnd_status_update(u32 *status,
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(func_call && (mod)->ops->fn) ? #fn : ""); \
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if (func_call && (mod)->ops->fn) \
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tmp = (mod)->ops->fn(mod, io, param); \
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if (tmp) \
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if (tmp && (tmp != -EPROBE_DEFER)) \
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dev_err(dev, "%s[%d] : %s error %d\n", \
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rsnd_mod_name(mod), rsnd_mod_id(mod), \
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#fn, tmp); \
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@ -1557,6 +1557,14 @@ exit_snd_probe:
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rsnd_dai_call(remove, &rdai->capture, priv);
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}
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/*
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* adg is very special mod which can't use rsnd_dai_call(remove),
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* and it registers ADG clock on probe.
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* It should be unregister if probe failed.
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* Mainly it is assuming -EPROBE_DEFER case
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*/
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rsnd_adg_remove(priv);
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return ret;
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}
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@ -241,6 +241,10 @@ static int rsnd_dmaen_attach(struct rsnd_dai_stream *io,
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/* try to get DMAEngine channel */
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chan = rsnd_dmaen_request_channel(io, mod_from, mod_to);
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if (IS_ERR_OR_NULL(chan)) {
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/* Let's follow when -EPROBE_DEFER case */
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if (PTR_ERR(chan) == -EPROBE_DEFER)
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return PTR_ERR(chan);
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/*
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* DMA failed. try to PIO mode
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* see
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