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ARM: at91/dts: add pinctrl support for SSC peripheral
Add pinctrl support for SSC on AT91 dtsi files. Signed-off-by: Bo Shen <voice.shen@atmel.com> [nicolas.ferre@atmel.com: split dtsi and driver changes] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reluctantly-acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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@ -306,6 +306,22 @@
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};
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};
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ssc0 {
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pinctrl_ssc0_tx: ssc0_tx-0 {
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atmel,pins =
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<1 16 0x1 0x0 /* PB16 periph A */
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1 17 0x1 0x0 /* PB17 periph A */
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1 18 0x1 0x0>; /* PB18 periph A */
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};
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pinctrl_ssc0_rx: ssc0_rx-0 {
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atmel,pins =
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<1 19 0x1 0x0 /* PB19 periph A */
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1 20 0x1 0x0 /* PB20 periph A */
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1 21 0x1 0x0>; /* PB21 periph A */
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};
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};
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pioA: gpio@fffff400 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff400 0x200>;
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@ -450,6 +466,8 @@
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compatible = "atmel,at91rm9200-ssc";
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reg = <0xfffbc000 0x4000>;
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interrupts = <14 4 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
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status = "disabled";
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};
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@ -271,6 +271,38 @@
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};
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};
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ssc0 {
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pinctrl_ssc0_tx: ssc0_tx-0 {
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atmel,pins =
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<1 0 0x2 0x0 /* PB0 periph B */
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1 1 0x2 0x0 /* PB1 periph B */
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1 2 0x2 0x0>; /* PB2 periph B */
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};
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pinctrl_ssc0_rx: ssc0_rx-0 {
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atmel,pins =
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<1 3 0x2 0x0 /* PB3 periph B */
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1 4 0x2 0x0 /* PB4 periph B */
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1 5 0x2 0x0>; /* PB5 periph B */
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};
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};
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ssc1 {
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pinctrl_ssc1_tx: ssc1_tx-0 {
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atmel,pins =
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<1 6 0x1 0x0 /* PB6 periph A */
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1 7 0x1 0x0 /* PB7 periph A */
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1 8 0x1 0x0>; /* PB8 periph A */
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};
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pinctrl_ssc1_rx: ssc1_rx-0 {
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atmel,pins =
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<1 9 0x1 0x0 /* PB9 periph A */
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1 10 0x1 0x0 /* PB10 periph A */
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1 11 0x1 0x0>; /* PB11 periph A */
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};
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};
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pioA: gpio@fffff200 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff200 0x200>;
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@ -368,6 +400,8 @@
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compatible = "atmel,at91rm9200-ssc";
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reg = <0xfff98000 0x4000>;
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interrupts = <16 4 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
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status = "disabled";
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};
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@ -375,6 +409,8 @@
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compatible = "atmel,at91rm9200-ssc";
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reg = <0xfff9c000 0x4000>;
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interrupts = <17 4 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
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status = "disabled";
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};
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@ -290,6 +290,38 @@
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};
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};
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ssc0 {
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pinctrl_ssc0_tx: ssc0_tx-0 {
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atmel,pins =
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<3 0 0x1 0x0 /* PD0 periph A */
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3 1 0x1 0x0 /* PD1 periph A */
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3 2 0x1 0x0>; /* PD2 periph A */
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};
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pinctrl_ssc0_rx: ssc0_rx-0 {
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atmel,pins =
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<3 3 0x1 0x0 /* PD3 periph A */
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3 4 0x1 0x0 /* PD4 periph A */
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3 5 0x1 0x0>; /* PD5 periph A */
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};
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};
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ssc1 {
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pinctrl_ssc1_tx: ssc1_tx-0 {
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atmel,pins =
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<3 10 0x1 0x0 /* PD10 periph A */
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3 11 0x1 0x0 /* PD11 periph A */
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3 12 0x1 0x0>; /* PD12 periph A */
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};
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pinctrl_ssc1_rx: ssc1_rx-0 {
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atmel,pins =
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<3 13 0x1 0x0 /* PD13 periph A */
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3 14 0x1 0x0 /* PD14 periph A */
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3 15 0x1 0x0>; /* PD15 periph A */
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};
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};
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pioA: gpio@fffff200 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff200 0x200>;
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@ -425,6 +457,8 @@
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compatible = "atmel,at91sam9g45-ssc";
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reg = <0xfff9c000 0x4000>;
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interrupts = <16 4 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
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status = "disabled";
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};
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@ -432,6 +466,8 @@
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compatible = "atmel,at91sam9g45-ssc";
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reg = <0xfffa0000 0x4000>;
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interrupts = <17 4 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
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status = "disabled";
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};
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@ -28,6 +28,7 @@
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tcb1 = &tcb1;
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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ssc0 = &ssc0;
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};
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cpus {
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cpu@0 {
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@ -244,6 +245,22 @@
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};
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};
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ssc0 {
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pinctrl_ssc0_tx: ssc0_tx-0 {
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atmel,pins =
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<0 24 0x2 0x0 /* PA24 periph B */
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0 25 0x2 0x0 /* PA25 periph B */
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0 26 0x2 0x0>; /* PA26 periph B */
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};
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pinctrl_ssc0_rx: ssc0_rx-0 {
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atmel,pins =
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<0 27 0x2 0x0 /* PA27 periph B */
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0 28 0x2 0x0 /* PA28 periph B */
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0 29 0x2 0x0>; /* PA29 periph B */
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};
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};
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pioA: gpio@fffff400 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffff400 0x200>;
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@ -294,6 +311,15 @@
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status = "disabled";
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};
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ssc0: ssc@f0010000 {
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compatible = "atmel,at91sam9g45-ssc";
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reg = <0xf0010000 0x4000>;
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interrupts = <28 4 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
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status = "disabled";
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};
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usart0: serial@f801c000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf801c000 0x4000>;
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@ -88,13 +88,6 @@
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interrupts = <1 4 7>;
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};
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ssc0: ssc@f0010000 {
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compatible = "atmel,at91sam9g45-ssc";
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reg = <0xf0010000 0x4000>;
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interrupts = <28 4 5>;
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status = "disabled";
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};
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tcb0: timer@f8008000 {
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compatible = "atmel,at91sam9x5-tcb";
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reg = <0xf8008000 0x100>;
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@ -290,6 +283,22 @@
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};
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};
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ssc0 {
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pinctrl_ssc0_tx: ssc0_tx-0 {
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atmel,pins =
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<0 24 0x2 0x0 /* PA24 periph B */
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0 25 0x2 0x0 /* PA25 periph B */
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0 26 0x2 0x0>; /* PA26 periph B */
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};
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pinctrl_ssc0_rx: ssc0_rx-0 {
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atmel,pins =
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<0 27 0x2 0x0 /* PA27 periph B */
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0 28 0x2 0x0 /* PA28 periph B */
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0 29 0x2 0x0>; /* PA29 periph B */
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};
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};
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pioA: gpio@fffff400 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffff400 0x200>;
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@ -333,6 +342,15 @@
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};
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};
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ssc0: ssc@f0010000 {
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compatible = "atmel,at91sam9g45-ssc";
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reg = <0xf0010000 0x4000>;
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interrupts = <28 4 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
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status = "disabled";
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};
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mmc0: mmc@f0008000 {
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compatible = "atmel,hsmci";
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reg = <0xf0008000 0x600>;
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