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selftests/powerpc/ptrace: Convert to load/store doubles
Some of the ptrace tests check the contents of floating pointer registers. Currently these use float, which is always 4 bytes, but the ptrace API supports saving/restoring 8 bytes per register, so switch to using doubles to exercise the code more fully. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220627140239.2464900-8-mpe@ellerman.id.au
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@ -127,44 +127,44 @@
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"li 30, %[" #_asm_symbol_name_immed "];" \
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"li 31, %[" #_asm_symbol_name_immed "];"
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#define ASM_LOAD_FPR_SINGLE_PRECISION(_asm_symbol_name_addr) \
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"lfs 0, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 1, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 2, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 3, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 4, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 5, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 6, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 7, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 8, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 9, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 10, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 11, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 12, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 13, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 14, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 15, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 16, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 17, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 18, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 19, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 20, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 21, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 22, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 23, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 24, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 25, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 26, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 27, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 28, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 29, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 30, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfs 31, 0(%[" #_asm_symbol_name_addr "]);"
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#define ASM_LOAD_FPR(_asm_symbol_name_addr) \
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"lfd 0, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 1, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 2, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 3, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 4, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 5, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 6, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 7, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 8, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 9, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 10, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 11, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 12, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 13, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 14, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 15, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 16, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 17, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 18, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 19, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 20, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 21, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 22, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 23, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 24, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 25, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 26, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 27, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 28, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 29, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 30, 0(%[" #_asm_symbol_name_addr "]);" \
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"lfd 31, 0(%[" #_asm_symbol_name_addr "]);"
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#ifndef __ASSEMBLER__
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void store_gpr(unsigned long *addr);
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void load_gpr(unsigned long *addr);
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void store_fpr_single_precision(float *addr);
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void store_fpr(double *addr);
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#endif /* end of __ASSEMBLER__ */
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#endif /* _SELFTESTS_POWERPC_REG_H */
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@ -53,42 +53,42 @@ FUNC_START(store_gpr)
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blr
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FUNC_END(store_gpr)
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/* Single Precision Float - float buf[32] */
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FUNC_START(store_fpr_single_precision)
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stfs 0, 0*4(3)
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stfs 1, 1*4(3)
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stfs 2, 2*4(3)
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stfs 3, 3*4(3)
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stfs 4, 4*4(3)
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stfs 5, 5*4(3)
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stfs 6, 6*4(3)
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stfs 7, 7*4(3)
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stfs 8, 8*4(3)
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stfs 9, 9*4(3)
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stfs 10, 10*4(3)
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stfs 11, 11*4(3)
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stfs 12, 12*4(3)
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stfs 13, 13*4(3)
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stfs 14, 14*4(3)
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stfs 15, 15*4(3)
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stfs 16, 16*4(3)
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stfs 17, 17*4(3)
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stfs 18, 18*4(3)
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stfs 19, 19*4(3)
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stfs 20, 20*4(3)
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stfs 21, 21*4(3)
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stfs 22, 22*4(3)
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stfs 23, 23*4(3)
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stfs 24, 24*4(3)
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stfs 25, 25*4(3)
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stfs 26, 26*4(3)
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stfs 27, 27*4(3)
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stfs 28, 28*4(3)
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stfs 29, 29*4(3)
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stfs 30, 30*4(3)
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stfs 31, 31*4(3)
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/* Double Precision Float - double buf[32] */
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FUNC_START(store_fpr)
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stfd 0, 0*8(3)
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stfd 1, 1*8(3)
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stfd 2, 2*8(3)
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stfd 3, 3*8(3)
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stfd 4, 4*8(3)
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stfd 5, 5*8(3)
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stfd 6, 6*8(3)
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stfd 7, 7*8(3)
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stfd 8, 8*8(3)
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stfd 9, 9*8(3)
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stfd 10, 10*8(3)
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stfd 11, 11*8(3)
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stfd 12, 12*8(3)
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stfd 13, 13*8(3)
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stfd 14, 14*8(3)
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stfd 15, 15*8(3)
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stfd 16, 16*8(3)
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stfd 17, 17*8(3)
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stfd 18, 18*8(3)
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stfd 19, 19*8(3)
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stfd 20, 20*8(3)
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stfd 21, 21*8(3)
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stfd 22, 22*8(3)
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stfd 23, 23*8(3)
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stfd 24, 24*8(3)
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stfd 25, 25*8(3)
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stfd 26, 26*8(3)
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stfd 27, 27*8(3)
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stfd 28, 28*8(3)
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stfd 29, 29*8(3)
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stfd 30, 30*8(3)
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stfd 31, 31*8(3)
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blr
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FUNC_END(store_fpr_single_precision)
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FUNC_END(store_fpr)
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/* VMX/VSX registers - unsigned long buf[128] */
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FUNC_START(loadvsx)
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@ -12,20 +12,20 @@
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int shm_id;
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int *cptr, *pptr;
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float a = FPR_1;
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float b = FPR_2;
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float c = FPR_3;
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double a = FPR_1;
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double b = FPR_2;
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double c = FPR_3;
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void gpr(void)
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{
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unsigned long gpr_buf[18];
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float fpr_buf[32];
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double fpr_buf[32];
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cptr = (int *)shmat(shm_id, NULL, 0);
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asm __volatile__(
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ASM_LOAD_GPR_IMMED(gpr_1)
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ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
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ASM_LOAD_FPR(flt_1)
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:
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: [gpr_1]"i"(GPR_1), [flt_1] "b" (&a)
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: "memory", "r6", "r7", "r8", "r9", "r10",
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@ -41,12 +41,12 @@ void gpr(void)
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shmdt((void *)cptr);
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store_gpr(gpr_buf);
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store_fpr_single_precision(fpr_buf);
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store_fpr(fpr_buf);
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if (validate_gpr(gpr_buf, GPR_3))
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exit(1);
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if (validate_fpr_float(fpr_buf, c))
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if (validate_fpr_double(fpr_buf, c))
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exit(1);
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exit(0);
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@ -55,7 +55,7 @@ void gpr(void)
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int trace_gpr(pid_t child)
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{
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unsigned long gpr[18];
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unsigned long fpr[32];
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__u64 fpr[32];
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FAIL_IF(start_trace(child));
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FAIL_IF(show_gpr(child, gpr));
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@ -12,10 +12,10 @@
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#define FPR_3 0.003
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#define FPR_4 0.004
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#define FPR_1_REP 0x3f50624de0000000
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#define FPR_2_REP 0x3f60624de0000000
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#define FPR_3_REP 0x3f689374c0000000
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#define FPR_4_REP 0x3f70624de0000000
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#define FPR_1_REP 0x3f50624dd2f1a9fcull
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#define FPR_2_REP 0x3f60624dd2f1a9fcull
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#define FPR_3_REP 0x3f689374bc6a7efaull
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#define FPR_4_REP 0x3f70624dd2f1a9fcull
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/* Buffer must have 18 elements */
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int validate_gpr(unsigned long *gpr, unsigned long val)
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@ -36,13 +36,13 @@ int validate_gpr(unsigned long *gpr, unsigned long val)
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}
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/* Buffer must have 32 elements */
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int validate_fpr(unsigned long *fpr, unsigned long val)
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int validate_fpr(__u64 *fpr, __u64 val)
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{
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int i, found = 1;
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for (i = 0; i < 32; i++) {
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if (fpr[i] != val) {
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printf("FPR[%d]: %lx Expected: %lx\n", i, fpr[i], val);
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printf("FPR[%d]: %llx Expected: %llx\n", i, fpr[i], val);
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found = 0;
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}
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}
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@ -53,7 +53,7 @@ int validate_fpr(unsigned long *fpr, unsigned long val)
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}
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/* Buffer must have 32 elements */
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int validate_fpr_float(float *fpr, float val)
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int validate_fpr_double(double *fpr, double val)
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{
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int i, found = 1;
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int shm_id;
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unsigned long *cptr, *pptr;
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float a = FPR_1;
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float b = FPR_2;
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float c = FPR_3;
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double a = FPR_1;
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double b = FPR_2;
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double c = FPR_3;
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void tm_gpr(void)
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{
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unsigned long gpr_buf[18];
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unsigned long result, texasr;
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float fpr_buf[32];
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double fpr_buf[32];
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printf("Starting the child\n");
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cptr = (unsigned long *)shmat(shm_id, NULL, 0);
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@ -29,12 +29,12 @@ trans:
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cptr[1] = 0;
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asm __volatile__(
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ASM_LOAD_GPR_IMMED(gpr_1)
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ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
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ASM_LOAD_FPR(flt_1)
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"1: ;"
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"tbegin.;"
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"beq 2f;"
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ASM_LOAD_GPR_IMMED(gpr_2)
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ASM_LOAD_FPR_SINGLE_PRECISION(flt_2)
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ASM_LOAD_FPR(flt_2)
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"tsuspend.;"
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"li 7, 1;"
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"stw 7, 0(%[cptr1]);"
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@ -70,12 +70,12 @@ trans:
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shmdt((void *)cptr);
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store_gpr(gpr_buf);
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store_fpr_single_precision(fpr_buf);
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store_fpr(fpr_buf);
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if (validate_gpr(gpr_buf, GPR_3))
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exit(1);
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if (validate_fpr_float(fpr_buf, c))
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if (validate_fpr_double(fpr_buf, c))
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exit(1);
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exit(0);
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@ -87,7 +87,7 @@ trans:
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int trace_tm_gpr(pid_t child)
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{
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unsigned long gpr[18];
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unsigned long fpr[32];
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__u64 fpr[32];
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FAIL_IF(start_trace(child));
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FAIL_IF(show_gpr(child, gpr));
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@ -12,10 +12,10 @@
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int shm_id;
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int *cptr, *pptr;
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float a = FPR_1;
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float b = FPR_2;
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float c = FPR_3;
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float d = FPR_4;
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double a = FPR_1;
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double b = FPR_2;
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double c = FPR_3;
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double d = FPR_4;
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__attribute__((used)) void wait_parent(void)
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{
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@ -28,7 +28,7 @@ void tm_spd_gpr(void)
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{
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unsigned long gpr_buf[18];
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unsigned long result, texasr;
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float fpr_buf[32];
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double fpr_buf[32];
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cptr = (int *)shmat(shm_id, NULL, 0);
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@ -36,7 +36,7 @@ trans:
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cptr[2] = 0;
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asm __volatile__(
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ASM_LOAD_GPR_IMMED(gpr_1)
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ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
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ASM_LOAD_FPR(flt_1)
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"1: ;"
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"tbegin.;"
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@ -45,7 +45,7 @@ trans:
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ASM_LOAD_GPR_IMMED(gpr_2)
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"tsuspend.;"
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ASM_LOAD_GPR_IMMED(gpr_4)
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ASM_LOAD_FPR_SINGLE_PRECISION(flt_4)
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ASM_LOAD_FPR(flt_4)
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"bl wait_parent;"
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"tresume.;"
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@ -77,12 +77,12 @@ trans:
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shmdt((void *)cptr);
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store_gpr(gpr_buf);
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store_fpr_single_precision(fpr_buf);
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store_fpr(fpr_buf);
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if (validate_gpr(gpr_buf, GPR_3))
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exit(1);
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if (validate_fpr_float(fpr_buf, c))
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if (validate_fpr_double(fpr_buf, c))
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exit(1);
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exit(0);
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}
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@ -93,7 +93,7 @@ trans:
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int trace_tm_spd_gpr(pid_t child)
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{
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unsigned long gpr[18];
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unsigned long fpr[32];
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__u64 fpr[32];
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FAIL_IF(start_trace(child));
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FAIL_IF(show_gpr(child, gpr));
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@ -4,6 +4,9 @@
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*
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* Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
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*/
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#define __SANE_USERSPACE_TYPES__
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#include <inttypes.h>
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#include <unistd.h>
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#include <stdlib.h>
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@ -30,8 +33,8 @@
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#define TEST_FAIL 1
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struct fpr_regs {
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unsigned long fpr[32];
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unsigned long fpscr;
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__u64 fpr[32];
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__u64 fpscr;
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};
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struct tm_spr_regs {
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@ -318,7 +321,7 @@ fail:
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}
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/* FPR */
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int show_fpr(pid_t child, unsigned long *fpr)
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int show_fpr(pid_t child, __u64 *fpr)
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{
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struct fpr_regs *regs;
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int ret, i;
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@ -337,7 +340,7 @@ int show_fpr(pid_t child, unsigned long *fpr)
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return TEST_PASS;
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}
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int write_fpr(pid_t child, unsigned long val)
|
||||
int write_fpr(pid_t child, __u64 val)
|
||||
{
|
||||
struct fpr_regs *regs;
|
||||
int ret, i;
|
||||
@ -360,7 +363,7 @@ int write_fpr(pid_t child, unsigned long val)
|
||||
return TEST_PASS;
|
||||
}
|
||||
|
||||
int show_ckpt_fpr(pid_t child, unsigned long *fpr)
|
||||
int show_ckpt_fpr(pid_t child, __u64 *fpr)
|
||||
{
|
||||
struct fpr_regs *regs;
|
||||
struct iovec iov;
|
||||
@ -742,4 +745,3 @@ void analyse_texasr(unsigned long texasr)
|
||||
}
|
||||
|
||||
void store_gpr(unsigned long *addr);
|
||||
void store_fpr(float *addr);
|
||||
|
Loading…
Reference in New Issue
Block a user