mirror of
https://github.com/torvalds/linux.git
synced 2024-12-02 17:11:33 +00:00
Merge branch 'linus' into x86/asm, to pick up fixes before merging new changes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
commit
52e31f89cc
6
.mailmap
6
.mailmap
@ -21,6 +21,7 @@ Andrey Ryabinin <ryabinin.a.a@gmail.com> <a.ryabinin@samsung.com>
|
||||
Andrew Morton <akpm@linux-foundation.org>
|
||||
Andrew Vasquez <andrew.vasquez@qlogic.com>
|
||||
Andy Adamson <andros@citi.umich.edu>
|
||||
Antoine Tenart <antoine.tenart@free-electrons.com>
|
||||
Antonio Ospite <ao2@ao2.it> <ao2@amarulasolutions.com>
|
||||
Archit Taneja <archit@ti.com>
|
||||
Arnaud Patard <arnaud.patard@rtp-net.org>
|
||||
@ -30,6 +31,9 @@ Axel Lin <axel.lin@gmail.com>
|
||||
Ben Gardner <bgardner@wabtec.com>
|
||||
Ben M Cahill <ben.m.cahill@intel.com>
|
||||
Björn Steinbrink <B.Steinbrink@gmx.de>
|
||||
Boris Brezillon <boris.brezillon@free-electrons.com>
|
||||
Boris Brezillon <boris.brezillon@free-electrons.com> <b.brezillon.dev@gmail.com>
|
||||
Boris Brezillon <boris.brezillon@free-electrons.com> <b.brezillon@overkiz.com>
|
||||
Brian Avery <b.avery@hp.com>
|
||||
Brian King <brking@us.ibm.com>
|
||||
Christoph Hellwig <hch@lst.de>
|
||||
@ -89,6 +93,7 @@ Leonid I Ananiev <leonid.i.ananiev@intel.com>
|
||||
Linas Vepstas <linas@austin.ibm.com>
|
||||
Mark Brown <broonie@sirena.org.uk>
|
||||
Matthieu CASTET <castet.matthieu@free.fr>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <maurochehab@gmail.com> <mchehab@infradead.org> <mchehab@redhat.com> <m.chehab@samsung.com> <mchehab@osg.samsung.com> <mchehab@s-opensource.com>
|
||||
Mayuresh Janorkar <mayur@ti.com>
|
||||
Michael Buesch <m@bues.ch>
|
||||
Michel Dänzer <michel@tungstengraphics.com>
|
||||
@ -122,6 +127,7 @@ Santosh Shilimkar <santosh.shilimkar@oracle.org>
|
||||
Sascha Hauer <s.hauer@pengutronix.de>
|
||||
S.Çağlar Onur <caglar@pardus.org.tr>
|
||||
Shiraz Hashim <shiraz.linux.kernel@gmail.com> <shiraz.hashim@st.com>
|
||||
Shuah Khan <shuah@kernel.org> <shuahkhan@gmail.com> <shuah.khan@hp.com> <shuahkh@osg.samsung.com> <shuah.kh@samsung.com>
|
||||
Simon Kelley <simon@thekelleys.org.uk>
|
||||
Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
|
||||
Stephen Hemminger <shemminger@osdl.org>
|
||||
|
1
CREDITS
1
CREDITS
@ -649,6 +649,7 @@ D: Configure, Menuconfig, xconfig
|
||||
|
||||
N: Mauro Carvalho Chehab
|
||||
E: m.chehab@samsung.org
|
||||
E: mchehab@osg.samsung.com
|
||||
E: mchehab@infradead.org
|
||||
D: Media subsystem (V4L/DVB) drivers and core
|
||||
D: EDAC drivers and EDAC 3.0 core rework
|
||||
|
@ -1,6 +1,6 @@
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: UVC function directory
|
||||
|
||||
streaming_maxburst - 0..15 (ss only)
|
||||
@ -9,37 +9,37 @@ Description: UVC function directory
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/control
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Control descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/control/class
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Class descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/control/class/ss
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Super speed control class descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/control/class/fs
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Full speed control class descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/control/terminal
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Terminal descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/control/terminal/output
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Output terminal descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/control/terminal/output/default
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Default output terminal descriptors
|
||||
|
||||
All attributes read only:
|
||||
@ -53,12 +53,12 @@ Description: Default output terminal descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/control/terminal/camera
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Camera terminal descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/control/terminal/camera/default
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Default camera terminal descriptors
|
||||
|
||||
All attributes read only:
|
||||
@ -75,12 +75,12 @@ Description: Default camera terminal descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/control/processing
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Processing unit descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/control/processing/default
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Default processing unit descriptors
|
||||
|
||||
All attributes read only:
|
||||
@ -94,49 +94,49 @@ Description: Default processing unit descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/control/header
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Control header descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/control/header/name
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Specific control header descriptors
|
||||
|
||||
dwClockFrequency
|
||||
bcdUVC
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Streaming descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/class
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Streaming class descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/class/ss
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Super speed streaming class descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/class/hs
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: High speed streaming class descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/class/fs
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Full speed streaming class descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/color_matching
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Color matching descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/color_matching/default
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Default color matching descriptors
|
||||
|
||||
All attributes read only:
|
||||
@ -150,12 +150,12 @@ Description: Default color matching descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/mjpeg
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: MJPEG format descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/mjpeg/name
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Specific MJPEG format descriptors
|
||||
|
||||
All attributes read only,
|
||||
@ -174,7 +174,7 @@ Description: Specific MJPEG format descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/mjpeg/name/name
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Specific MJPEG frame descriptors
|
||||
|
||||
dwFrameInterval - indicates how frame interval can be
|
||||
@ -196,12 +196,12 @@ Description: Specific MJPEG frame descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/uncompressed
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Uncompressed format descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/uncompressed/name
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Specific uncompressed format descriptors
|
||||
|
||||
bmaControls - this format's data for bmaControls in
|
||||
@ -221,7 +221,7 @@ Description: Specific uncompressed format descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/uncompressed/name/name
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Specific uncompressed frame descriptors
|
||||
|
||||
dwFrameInterval - indicates how frame interval can be
|
||||
@ -243,12 +243,12 @@ Description: Specific uncompressed frame descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/header
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Streaming header descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/header/name
|
||||
Date: Dec 2014
|
||||
KernelVersion: 3.20
|
||||
KernelVersion: 4.0
|
||||
Description: Specific streaming header descriptors
|
||||
|
||||
All attributes read only:
|
||||
|
@ -1,4 +1,4 @@
|
||||
What /sys/bus/iio/devices/iio:deviceX/in_proximity_raw
|
||||
What /sys/bus/iio/devices/iio:deviceX/in_proximity_input
|
||||
Date: March 2014
|
||||
KernelVersion: 3.15
|
||||
Contact: Matt Ranostay <mranostay@gmail.com>
|
||||
|
@ -7,6 +7,7 @@ Required properties:
|
||||
- "ti,ina220" for ina220
|
||||
- "ti,ina226" for ina226
|
||||
- "ti,ina230" for ina230
|
||||
- "ti,ina231" for ina231
|
||||
- reg: I2C address
|
||||
|
||||
Optional properties:
|
||||
|
@ -44,8 +44,8 @@ Required properties:
|
||||
- our-claim-gpio: The GPIO that we use to claim the bus.
|
||||
- their-claim-gpios: The GPIOs that the other sides use to claim the bus.
|
||||
Note that some implementations may only support a single other master.
|
||||
- Standard I2C mux properties. See mux.txt in this directory.
|
||||
- Single I2C child bus node at reg 0. See mux.txt in this directory.
|
||||
- Standard I2C mux properties. See i2c-mux.txt in this directory.
|
||||
- Single I2C child bus node at reg 0. See i2c-mux.txt in this directory.
|
||||
|
||||
Optional properties:
|
||||
- slew-delay-us: microseconds to wait for a GPIO to go high. Default is 10 us.
|
||||
|
@ -27,7 +27,8 @@ Required properties:
|
||||
- i2c-bus-name: The name of this bus. Also needed as pinctrl-name for the I2C
|
||||
parents.
|
||||
|
||||
Furthermore, I2C mux properties and child nodes. See mux.txt in this directory.
|
||||
Furthermore, I2C mux properties and child nodes. See i2c-mux.txt in this
|
||||
directory.
|
||||
|
||||
Example:
|
||||
|
||||
|
@ -22,8 +22,8 @@ Required properties:
|
||||
- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
|
||||
port is connected to.
|
||||
- mux-gpios: list of gpios used to control the muxer
|
||||
* Standard I2C mux properties. See mux.txt in this directory.
|
||||
* I2C child bus nodes. See mux.txt in this directory.
|
||||
* Standard I2C mux properties. See i2c-mux.txt in this directory.
|
||||
* I2C child bus nodes. See i2c-mux.txt in this directory.
|
||||
|
||||
Optional properties:
|
||||
- idle-state: value to set the muxer to when idle. When no value is
|
||||
@ -33,7 +33,7 @@ For each i2c child node, an I2C child bus will be created. They will
|
||||
be numbered based on their order in the device tree.
|
||||
|
||||
Whenever an access is made to a device on a child bus, the value set
|
||||
in the revelant node's reg property will be output using the list of
|
||||
in the relevant node's reg property will be output using the list of
|
||||
GPIOs, the first in the list holding the least-significant value.
|
||||
|
||||
If an idle state is defined, using the idle-state (optional) property,
|
||||
|
@ -28,9 +28,9 @@ Also required are:
|
||||
* Standard pinctrl properties that specify the pin mux state for each child
|
||||
bus. See ../pinctrl/pinctrl-bindings.txt.
|
||||
|
||||
* Standard I2C mux properties. See mux.txt in this directory.
|
||||
* Standard I2C mux properties. See i2c-mux.txt in this directory.
|
||||
|
||||
* I2C child bus nodes. See mux.txt in this directory.
|
||||
* I2C child bus nodes. See i2c-mux.txt in this directory.
|
||||
|
||||
For each named state defined in the pinctrl-names property, an I2C child bus
|
||||
will be created. I2C child bus numbers are assigned based on the index into
|
||||
|
@ -7,8 +7,8 @@ Required properties:
|
||||
- compatible: i2c-mux-reg
|
||||
- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
|
||||
port is connected to.
|
||||
* Standard I2C mux properties. See mux.txt in this directory.
|
||||
* I2C child bus nodes. See mux.txt in this directory.
|
||||
* Standard I2C mux properties. See i2c-mux.txt in this directory.
|
||||
* I2C child bus nodes. See i2c-mux.txt in this directory.
|
||||
|
||||
Optional properties:
|
||||
- reg: this pair of <offset size> specifies the register to control the mux.
|
||||
@ -24,7 +24,7 @@ Optional properties:
|
||||
given, it defaults to the last value used.
|
||||
|
||||
Whenever an access is made to a device on a child bus, the value set
|
||||
in the revelant node's reg property will be output to the register.
|
||||
in the relevant node's reg property will be output to the register.
|
||||
|
||||
If an idle state is defined, using the idle-state (optional) property,
|
||||
whenever an access is not being made to a device on a child bus, the
|
||||
|
@ -13,10 +13,10 @@ Optional properties:
|
||||
initialization. This is an array of 28 values(u8).
|
||||
|
||||
- marvell,wakeup-pin: It represents wakeup pin number of the bluetooth chip.
|
||||
firmware will use the pin to wakeup host system.
|
||||
firmware will use the pin to wakeup host system (u16).
|
||||
- marvell,wakeup-gap-ms: wakeup gap represents wakeup latency of the host
|
||||
platform. The value will be configured to firmware. This
|
||||
is needed to work chip's sleep feature as expected.
|
||||
is needed to work chip's sleep feature as expected (u16).
|
||||
- interrupt-parent: phandle of the parent interrupt controller
|
||||
- interrupts : interrupt pin number to the cpu. Driver will request an irq based
|
||||
on this interrupt number. During system suspend, the irq will be
|
||||
@ -50,7 +50,7 @@ calibration data is also available in below example.
|
||||
0x37 0x01 0x1c 0x00 0xff 0xff 0xff 0xff 0x01 0x7f 0x04 0x02
|
||||
0x00 0x00 0xba 0xce 0xc0 0xc6 0x2d 0x00 0x00 0x00 0x00 0x00
|
||||
0x00 0x00 0xf0 0x00>;
|
||||
marvell,wakeup-pin = <0x0d>;
|
||||
marvell,wakeup-gap-ms = <0x64>;
|
||||
marvell,wakeup-pin = /bits/ 16 <0x0d>;
|
||||
marvell,wakeup-gap-ms = /bits/ 16 <0x64>;
|
||||
};
|
||||
};
|
||||
|
@ -255,6 +255,7 @@ synology Synology, Inc.
|
||||
SUNW Sun Microsystems, Inc
|
||||
tbs TBS Technologies
|
||||
tcl Toby Churchill Ltd.
|
||||
technexion TechNexion
|
||||
technologic Technologic Systems
|
||||
thine THine Electronics, Inc.
|
||||
ti Texas Instruments
|
||||
@ -269,6 +270,7 @@ tronsmart Tronsmart
|
||||
truly Truly Semiconductors Limited
|
||||
tyan Tyan Computer Corporation
|
||||
upisemi uPI Semiconductor Corp.
|
||||
uniwest United Western Technologies Corp (UniWest)
|
||||
urt United Radiant Technology Corporation
|
||||
usi Universal Scientific Industrial Co., Ltd.
|
||||
v3 V3 Semiconductor
|
||||
|
@ -74,8 +74,8 @@ blink_set() function (see <linux/leds.h>). To set an LED to blinking,
|
||||
however, it is better to use the API function led_blink_set(), as it
|
||||
will check and implement software fallback if necessary.
|
||||
|
||||
To turn off blinking again, use the API function led_brightness_set()
|
||||
as that will not just set the LED brightness but also stop any software
|
||||
To turn off blinking, use the API function led_brightness_set()
|
||||
with brightness value LED_OFF, which should stop any software
|
||||
timers that may have been required for blinking.
|
||||
|
||||
The blink_set() function should choose a user friendly blinking value
|
||||
|
@ -263,19 +263,23 @@ scmd->allowed.
|
||||
|
||||
3. scmd recovered
|
||||
ACTION: scsi_eh_finish_cmd() is invoked to EH-finish scmd
|
||||
- shost->host_failed--
|
||||
- clear scmd->eh_eflags
|
||||
- scsi_setup_cmd_retry()
|
||||
- move from local eh_work_q to local eh_done_q
|
||||
LOCKING: none
|
||||
CONCURRENCY: at most one thread per separate eh_work_q to
|
||||
keep queue manipulation lockless
|
||||
|
||||
4. EH completes
|
||||
ACTION: scsi_eh_flush_done_q() retries scmds or notifies upper
|
||||
layer of failure.
|
||||
layer of failure. May be called concurrently but must have
|
||||
a no more than one thread per separate eh_work_q to
|
||||
manipulate the queue locklessly
|
||||
- scmd is removed from eh_done_q and scmd->eh_entry is cleared
|
||||
- if retry is necessary, scmd is requeued using
|
||||
scsi_queue_insert()
|
||||
- otherwise, scsi_finish_command() is invoked for scmd
|
||||
- zero shost->host_failed
|
||||
LOCKING: queue or finish function performs appropriate locking
|
||||
|
||||
|
||||
|
@ -45,7 +45,7 @@ is how we expect the compiler, application and kernel to work together.
|
||||
MPX-instrumented.
|
||||
3) The kernel detects that the CPU has MPX, allows the new prctl() to
|
||||
succeed, and notes the location of the bounds directory. Userspace is
|
||||
expected to keep the bounds directory at that locationWe note it
|
||||
expected to keep the bounds directory at that location. We note it
|
||||
instead of reading it each time because the 'xsave' operation needed
|
||||
to access the bounds directory register is an expensive operation.
|
||||
4) If the application needs to spill bounds out of the 4 registers, it
|
||||
@ -167,7 +167,7 @@ If a #BR is generated due to a bounds violation caused by MPX.
|
||||
We need to decode MPX instructions to get violation address and
|
||||
set this address into extended struct siginfo.
|
||||
|
||||
The _sigfault feild of struct siginfo is extended as follow:
|
||||
The _sigfault field of struct siginfo is extended as follow:
|
||||
|
||||
87 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
|
||||
88 struct {
|
||||
@ -240,5 +240,5 @@ them at the same bounds table.
|
||||
This is allowed architecturally. See more information "Intel(R) Architecture
|
||||
Instruction Set Extensions Programming Reference" (9.3.4).
|
||||
|
||||
However, if users did this, the kernel might be fooled in to unmaping an
|
||||
However, if users did this, the kernel might be fooled in to unmapping an
|
||||
in-use bounds table since it does not recognize sharing.
|
||||
|
@ -5,7 +5,7 @@ memory, it has two choices:
|
||||
from areas other than the one we are trying to flush will be
|
||||
destroyed and must be refilled later, at some cost.
|
||||
2. Use the invlpg instruction to invalidate a single page at a
|
||||
time. This could potentialy cost many more instructions, but
|
||||
time. This could potentially cost many more instructions, but
|
||||
it is a much more precise operation, causing no collateral
|
||||
damage to other TLB entries.
|
||||
|
||||
@ -19,7 +19,7 @@ Which method to do depends on a few things:
|
||||
work.
|
||||
3. The size of the TLB. The larger the TLB, the more collateral
|
||||
damage we do with a full flush. So, the larger the TLB, the
|
||||
more attrative an individual flush looks. Data and
|
||||
more attractive an individual flush looks. Data and
|
||||
instructions have separate TLBs, as do different page sizes.
|
||||
4. The microarchitecture. The TLB has become a multi-level
|
||||
cache on modern CPUs, and the global flushes have become more
|
||||
|
@ -36,7 +36,7 @@ between all CPUs.
|
||||
|
||||
check_interval
|
||||
How often to poll for corrected machine check errors, in seconds
|
||||
(Note output is hexademical). Default 5 minutes. When the poller
|
||||
(Note output is hexadecimal). Default 5 minutes. When the poller
|
||||
finds MCEs it triggers an exponential speedup (poll more often) on
|
||||
the polling interval. When the poller stops finding MCEs, it
|
||||
triggers an exponential backoff (poll less often) on the polling
|
||||
|
79
MAINTAINERS
79
MAINTAINERS
@ -595,6 +595,10 @@ S: Odd Fixes
|
||||
L: linux-alpha@vger.kernel.org
|
||||
F: arch/alpha/
|
||||
|
||||
ALPS PS/2 TOUCHPAD DRIVER
|
||||
R: Pali Rohár <pali.rohar@gmail.com>
|
||||
F: drivers/input/mouse/alps.*
|
||||
|
||||
ALTERA MAILBOX DRIVER
|
||||
M: Ley Foon Tan <lftan@altera.com>
|
||||
L: nios2-dev@lists.rocketboards.org (moderated for non-subscribers)
|
||||
@ -1159,6 +1163,7 @@ F: arch/arm/mach-footbridge/
|
||||
ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
|
||||
M: Shawn Guo <shawnguo@kernel.org>
|
||||
M: Sascha Hauer <kernel@pengutronix.de>
|
||||
R: Fabio Estevam <fabio.estevam@nxp.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
|
||||
@ -2242,7 +2247,8 @@ F: include/net/ax25.h
|
||||
F: net/ax25/
|
||||
|
||||
AZ6007 DVB DRIVER
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: https://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
@ -2709,7 +2715,8 @@ F: Documentation/filesystems/btrfs.txt
|
||||
F: fs/btrfs/
|
||||
|
||||
BTTV VIDEO4LINUX DRIVER
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: https://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
@ -2773,9 +2780,9 @@ F: include/net/caif/
|
||||
F: net/caif/
|
||||
|
||||
CALGARY x86-64 IOMMU
|
||||
M: Muli Ben-Yehuda <muli@il.ibm.com>
|
||||
M: "Jon D. Mason" <jdmason@kudzu.us>
|
||||
L: discuss@x86-64.org
|
||||
M: Muli Ben-Yehuda <mulix@mulix.org>
|
||||
M: Jon Mason <jdmason@kudzu.us>
|
||||
L: iommu@lists.linux-foundation.org
|
||||
S: Maintained
|
||||
F: arch/x86/kernel/pci-calgary_64.c
|
||||
F: arch/x86/kernel/tce_64.c
|
||||
@ -3344,7 +3351,8 @@ S: Maintained
|
||||
F: drivers/media/dvb-frontends/cx24120*
|
||||
|
||||
CX88 VIDEO4LINUX DRIVER
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: https://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
@ -3774,6 +3782,7 @@ Q: https://patchwork.kernel.org/project/linux-dmaengine/list/
|
||||
S: Maintained
|
||||
F: drivers/dma/
|
||||
F: include/linux/dmaengine.h
|
||||
F: Documentation/devicetree/bindings/dma/
|
||||
F: Documentation/dmaengine/
|
||||
T: git git://git.infradead.org/users/vkoul/slave-dma.git
|
||||
|
||||
@ -4291,7 +4300,8 @@ F: fs/ecryptfs/
|
||||
EDAC-CORE
|
||||
M: Doug Thompson <dougthompson@xmission.com>
|
||||
M: Borislav Petkov <bp@alien8.de>
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
L: linux-edac@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp.git for-next
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-edac.git linux_next
|
||||
@ -4336,7 +4346,8 @@ S: Maintained
|
||||
F: drivers/edac/e7xxx_edac.c
|
||||
|
||||
EDAC-GHES
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
L: linux-edac@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/edac/ghes_edac.c
|
||||
@ -4360,19 +4371,22 @@ S: Maintained
|
||||
F: drivers/edac/i5000_edac.c
|
||||
|
||||
EDAC-I5400
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
L: linux-edac@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/edac/i5400_edac.c
|
||||
|
||||
EDAC-I7300
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
L: linux-edac@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/edac/i7300_edac.c
|
||||
|
||||
EDAC-I7CORE
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
L: linux-edac@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/edac/i7core_edac.c
|
||||
@ -4409,7 +4423,8 @@ S: Maintained
|
||||
F: drivers/edac/r82600_edac.c
|
||||
|
||||
EDAC-SBRIDGE
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
L: linux-edac@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/edac/sb_edac.c
|
||||
@ -4468,7 +4483,8 @@ S: Maintained
|
||||
F: drivers/net/ethernet/ibm/ehea/
|
||||
|
||||
EM28XX VIDEO4LINUX DRIVER
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: https://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
@ -6487,6 +6503,7 @@ F: include/uapi/linux/sunrpc/
|
||||
|
||||
KERNEL SELFTEST FRAMEWORK
|
||||
M: Shuah Khan <shuahkh@osg.samsung.com>
|
||||
M: Shuah Khan <shuah@kernel.org>
|
||||
L: linux-kselftest@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/shuah/linux-kselftest
|
||||
S: Maintained
|
||||
@ -7358,7 +7375,8 @@ S: Supported
|
||||
F: drivers/media/pci/netup_unidvb/*
|
||||
|
||||
MEDIA INPUT INFRASTRUCTURE (V4L/DVB)
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
P: LinuxTV.org Project
|
||||
L: linux-media@vger.kernel.org
|
||||
W: https://linuxtv.org
|
||||
@ -7406,7 +7424,7 @@ F: drivers/scsi/megaraid.*
|
||||
F: drivers/scsi/megaraid/
|
||||
|
||||
MELLANOX ETHERNET DRIVER (mlx4_en)
|
||||
M: Eugenia Emantayev <eugenia@mellanox.com>
|
||||
M: Tariq Toukan <tariqt@mellanox.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.mellanox.com
|
||||
@ -8407,10 +8425,9 @@ F: drivers/i2c/busses/i2c-ocores.c
|
||||
OPEN FIRMWARE AND FLATTENED DEVICE TREE
|
||||
M: Rob Herring <robh+dt@kernel.org>
|
||||
M: Frank Rowand <frowand.list@gmail.com>
|
||||
M: Grant Likely <grant.likely@linaro.org>
|
||||
L: devicetree@vger.kernel.org
|
||||
W: http://www.devicetree.org/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git
|
||||
S: Maintained
|
||||
F: drivers/of/
|
||||
F: include/linux/of*.h
|
||||
@ -8418,12 +8435,10 @@ F: scripts/dtc/
|
||||
|
||||
OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
|
||||
M: Rob Herring <robh+dt@kernel.org>
|
||||
M: Pawel Moll <pawel.moll@arm.com>
|
||||
M: Mark Rutland <mark.rutland@arm.com>
|
||||
M: Ian Campbell <ijc+devicetree@hellion.org.uk>
|
||||
M: Kumar Gala <galak@codeaurora.org>
|
||||
L: devicetree@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git
|
||||
Q: http://patchwork.ozlabs.org/project/devicetree-bindings/list/
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/
|
||||
F: arch/*/boot/dts/
|
||||
@ -8948,6 +8963,7 @@ L: linux-gpio@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/pinctrl/
|
||||
F: Documentation/pinctrl.txt
|
||||
F: drivers/pinctrl/
|
||||
F: include/linux/pinctrl/
|
||||
|
||||
@ -9855,7 +9871,8 @@ S: Odd Fixes
|
||||
F: drivers/media/i2c/saa6588*
|
||||
|
||||
SAA7134 VIDEO4LINUX DRIVER
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: https://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
@ -10374,7 +10391,8 @@ S: Maintained
|
||||
F: drivers/media/radio/si4713/radio-usb-si4713.c
|
||||
|
||||
SIANO DVB DRIVER
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: https://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
@ -11140,7 +11158,8 @@ S: Maintained
|
||||
F: drivers/media/i2c/tda9840*
|
||||
|
||||
TEA5761 TUNER DRIVER
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: https://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
@ -11148,7 +11167,8 @@ S: Odd fixes
|
||||
F: drivers/media/tuners/tea5761.*
|
||||
|
||||
TEA5767 TUNER DRIVER
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: https://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
@ -11535,7 +11555,8 @@ F: include/linux/shmem_fs.h
|
||||
F: mm/shmem.c
|
||||
|
||||
TM6000 VIDEO4LINUX DRIVER
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: https://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
@ -11889,7 +11910,8 @@ F: drivers/usb/common/usb-otg-fsm.c
|
||||
|
||||
USB OVER IP DRIVER
|
||||
M: Valentina Manea <valentina.manea.m@gmail.com>
|
||||
M: Shuah Khan <shuah.kh@samsung.com>
|
||||
M: Shuah Khan <shuahkh@osg.samsung.com>
|
||||
M: Shuah Khan <shuah@kernel.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/usb/usbip_protocol.txt
|
||||
@ -11960,6 +11982,7 @@ L: linux-usb@vger.kernel.org
|
||||
W: http://www.linux-usb.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/usb/
|
||||
F: Documentation/usb/
|
||||
F: drivers/usb/
|
||||
F: include/linux/usb.h
|
||||
@ -12133,6 +12156,7 @@ VIRTIO CORE, NET AND BLOCK DRIVERS
|
||||
M: "Michael S. Tsirkin" <mst@redhat.com>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/virtio/
|
||||
F: drivers/virtio/
|
||||
F: tools/virtio/
|
||||
F: drivers/net/virtio_net.c
|
||||
@ -12521,7 +12545,8 @@ S: Maintained
|
||||
F: arch/x86/entry/vdso/
|
||||
|
||||
XC2028/3028 TUNER DRIVER
|
||||
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
|
||||
M: Mauro Carvalho Chehab <mchehab@kernel.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
W: https://linuxtv.org
|
||||
T: git git://linuxtv.org/media_tree.git
|
||||
|
4
Makefile
4
Makefile
@ -1,7 +1,7 @@
|
||||
VERSION = 4
|
||||
PATCHLEVEL = 7
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc2
|
||||
EXTRAVERSION = -rc6
|
||||
NAME = Psychotic Stoned Sheep
|
||||
|
||||
# *DOCUMENTATION*
|
||||
@ -363,11 +363,13 @@ CHECK = sparse
|
||||
|
||||
CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
|
||||
-Wbitwise -Wno-return-void $(CF)
|
||||
NOSTDINC_FLAGS =
|
||||
CFLAGS_MODULE =
|
||||
AFLAGS_MODULE =
|
||||
LDFLAGS_MODULE =
|
||||
CFLAGS_KERNEL =
|
||||
AFLAGS_KERNEL =
|
||||
LDFLAGS_vmlinux =
|
||||
CFLAGS_GCOV = -fprofile-arcs -ftest-coverage -fno-tree-loop-im -Wno-maybe-uninitialized
|
||||
CFLAGS_KCOV = -fsanitize-coverage=trace-pc
|
||||
|
||||
|
@ -226,8 +226,8 @@ config ARCH_INIT_TASK
|
||||
config ARCH_TASK_STRUCT_ALLOCATOR
|
||||
bool
|
||||
|
||||
# Select if arch has its private alloc_thread_info() function
|
||||
config ARCH_THREAD_INFO_ALLOCATOR
|
||||
# Select if arch has its private alloc_thread_stack() function
|
||||
config ARCH_THREAD_STACK_ALLOCATOR
|
||||
bool
|
||||
|
||||
# Select if arch wants to size task_struct dynamically via arch_task_struct_size:
|
||||
@ -606,6 +606,9 @@ config HAVE_ARCH_HASH
|
||||
file which provides platform-specific implementations of some
|
||||
functions in <linux/hash.h> or fs/namei.c.
|
||||
|
||||
config ISA_BUS_API
|
||||
def_bool ISA
|
||||
|
||||
#
|
||||
# ABI hall of shame
|
||||
#
|
||||
|
@ -40,7 +40,7 @@ pgd_free(struct mm_struct *mm, pgd_t *pgd)
|
||||
static inline pmd_t *
|
||||
pmd_alloc_one(struct mm_struct *mm, unsigned long address)
|
||||
{
|
||||
pmd_t *ret = (pmd_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
|
||||
pmd_t *ret = (pmd_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -53,7 +53,7 @@ pmd_free(struct mm_struct *mm, pmd_t *pmd)
|
||||
static inline pte_t *
|
||||
pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
|
||||
{
|
||||
pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
|
||||
pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
|
||||
return pte;
|
||||
}
|
||||
|
||||
|
@ -66,8 +66,6 @@ endif
|
||||
|
||||
endif
|
||||
|
||||
cflags-$(CONFIG_ARC_DW2_UNWIND) += -fasynchronous-unwind-tables
|
||||
|
||||
# By default gcc 4.8 generates dwarf4 which kernel unwinder can't grok
|
||||
ifeq ($(atleast_gcc48),y)
|
||||
cflags-$(CONFIG_ARC_DW2_UNWIND) += -gdwarf-2
|
||||
|
@ -95,7 +95,7 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
|
||||
{
|
||||
pte_t *pte;
|
||||
|
||||
pte = (pte_t *) __get_free_pages(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO,
|
||||
pte = (pte_t *) __get_free_pages(GFP_KERNEL | __GFP_ZERO,
|
||||
__get_order_pte());
|
||||
|
||||
return pte;
|
||||
@ -107,7 +107,7 @@ pte_alloc_one(struct mm_struct *mm, unsigned long address)
|
||||
pgtable_t pte_pg;
|
||||
struct page *page;
|
||||
|
||||
pte_pg = (pgtable_t)__get_free_pages(GFP_KERNEL | __GFP_REPEAT, __get_order_pte());
|
||||
pte_pg = (pgtable_t)__get_free_pages(GFP_KERNEL, __get_order_pte());
|
||||
if (!pte_pg)
|
||||
return 0;
|
||||
memzero((void *)pte_pg, PTRS_PER_PTE * sizeof(pte_t));
|
||||
|
@ -142,7 +142,7 @@ arc_unwind_core(struct task_struct *tsk, struct pt_regs *regs,
|
||||
* prelogue is setup (callee regs saved and then fp set and not other
|
||||
* way around
|
||||
*/
|
||||
pr_warn("CONFIG_ARC_DW2_UNWIND needs to be enabled\n");
|
||||
pr_warn_once("CONFIG_ARC_DW2_UNWIND needs to be enabled\n");
|
||||
return 0;
|
||||
|
||||
#endif
|
||||
|
@ -741,6 +741,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
|
||||
sun7i-a20-olimex-som-evb.dtb \
|
||||
sun7i-a20-olinuxino-lime.dtb \
|
||||
sun7i-a20-olinuxino-lime2.dtb \
|
||||
sun7i-a20-olinuxino-lime2-emmc.dtb \
|
||||
sun7i-a20-olinuxino-micro.dtb \
|
||||
sun7i-a20-orangepi.dtb \
|
||||
sun7i-a20-orangepi-mini.dtb \
|
||||
|
@ -418,7 +418,7 @@
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
clock-frequency = <400000>;
|
||||
clock-frequency = <100000>;
|
||||
|
||||
tps@24 {
|
||||
compatible = "ti,tps65218";
|
||||
|
@ -60,10 +60,26 @@
|
||||
|
||||
tps659038_pmic {
|
||||
compatible = "ti,tps659038-pmic";
|
||||
|
||||
smps12-in-supply = <&vmain>;
|
||||
smps3-in-supply = <&vmain>;
|
||||
smps45-in-supply = <&vmain>;
|
||||
smps6-in-supply = <&vmain>;
|
||||
smps7-in-supply = <&vmain>;
|
||||
smps8-in-supply = <&vmain>;
|
||||
smps9-in-supply = <&vmain>;
|
||||
ldo1-in-supply = <&vmain>;
|
||||
ldo2-in-supply = <&vmain>;
|
||||
ldo3-in-supply = <&vmain>;
|
||||
ldo4-in-supply = <&vmain>;
|
||||
ldo9-in-supply = <&vmain>;
|
||||
ldoln-in-supply = <&vmain>;
|
||||
ldousb-in-supply = <&vmain>;
|
||||
ldortc-in-supply = <&vmain>;
|
||||
|
||||
regulators {
|
||||
smps12_reg: smps12 {
|
||||
/* VDD_MPU */
|
||||
vin-supply = <&vmain>;
|
||||
regulator-name = "smps12";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
@ -73,7 +89,6 @@
|
||||
|
||||
smps3_reg: smps3 {
|
||||
/* VDD_DDR EMIF1 EMIF2 */
|
||||
vin-supply = <&vmain>;
|
||||
regulator-name = "smps3";
|
||||
regulator-min-microvolt = <1350000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
@ -84,7 +99,6 @@
|
||||
smps45_reg: smps45 {
|
||||
/* VDD_DSPEVE on AM572 */
|
||||
/* VDD_IVA + VDD_DSP on AM571 */
|
||||
vin-supply = <&vmain>;
|
||||
regulator-name = "smps45";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
@ -94,7 +108,6 @@
|
||||
|
||||
smps6_reg: smps6 {
|
||||
/* VDD_GPU */
|
||||
vin-supply = <&vmain>;
|
||||
regulator-name = "smps6";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
@ -104,7 +117,6 @@
|
||||
|
||||
smps7_reg: smps7 {
|
||||
/* VDD_CORE */
|
||||
vin-supply = <&vmain>;
|
||||
regulator-name = "smps7";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
@ -115,13 +127,11 @@
|
||||
smps8_reg: smps8 {
|
||||
/* 5728 - VDD_IVAHD */
|
||||
/* 5718 - N.C. test point */
|
||||
vin-supply = <&vmain>;
|
||||
regulator-name = "smps8";
|
||||
};
|
||||
|
||||
smps9_reg: smps9 {
|
||||
/* VDD_3_3D */
|
||||
vin-supply = <&vmain>;
|
||||
regulator-name = "smps9";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
@ -132,7 +142,6 @@
|
||||
ldo1_reg: ldo1 {
|
||||
/* VDDSHV8 - VSDMMC */
|
||||
/* NOTE: on rev 1.3a, data supply */
|
||||
vin-supply = <&vmain>;
|
||||
regulator-name = "ldo1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
@ -142,7 +151,6 @@
|
||||
|
||||
ldo2_reg: ldo2 {
|
||||
/* VDDSH18V */
|
||||
vin-supply = <&vmain>;
|
||||
regulator-name = "ldo2";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
@ -152,7 +160,6 @@
|
||||
|
||||
ldo3_reg: ldo3 {
|
||||
/* R1.3a 572x V1_8PHY_LDO3: USB, SATA */
|
||||
vin-supply = <&vmain>;
|
||||
regulator-name = "ldo3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
@ -162,7 +169,6 @@
|
||||
|
||||
ldo4_reg: ldo4 {
|
||||
/* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/
|
||||
vin-supply = <&vmain>;
|
||||
regulator-name = "ldo4";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
@ -174,7 +180,6 @@
|
||||
|
||||
ldo9_reg: ldo9 {
|
||||
/* VDD_RTC */
|
||||
vin-supply = <&vmain>;
|
||||
regulator-name = "ldo9";
|
||||
regulator-min-microvolt = <840000>;
|
||||
regulator-max-microvolt = <1160000>;
|
||||
@ -184,7 +189,6 @@
|
||||
|
||||
ldoln_reg: ldoln {
|
||||
/* VDDA_1V8_PLL */
|
||||
vin-supply = <&vmain>;
|
||||
regulator-name = "ldoln";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
@ -194,7 +198,6 @@
|
||||
|
||||
ldousb_reg: ldousb {
|
||||
/* VDDA_3V_USB: VDDA_USBHS33 */
|
||||
vin-supply = <&vmain>;
|
||||
regulator-name = "ldousb";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
@ -204,7 +207,6 @@
|
||||
|
||||
ldortc_reg: ldortc {
|
||||
/* VDDA_RTC */
|
||||
vin-supply = <&vmain>;
|
||||
regulator-name = "ldortc";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
@ -93,6 +93,10 @@
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sd1_pins>;
|
||||
@ -101,6 +105,10 @@
|
||||
cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pincntl {
|
||||
sd1_pins: pinmux_sd1_pins {
|
||||
pinctrl-single,pins = <
|
||||
|
@ -45,6 +45,14 @@
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sd2_pins>;
|
||||
@ -53,6 +61,7 @@
|
||||
dmas = <&edma_xbar 8 0 1 /* use SDTXEVT1 instead of MCASP0TX */
|
||||
&edma_xbar 9 0 2>; /* use SDRXEVT1 instead of MCASP0RX */
|
||||
dma-names = "tx", "rx";
|
||||
non-removable;
|
||||
};
|
||||
|
||||
&pincntl {
|
||||
|
@ -1451,6 +1451,8 @@
|
||||
ti,hwmods = "gpmc";
|
||||
reg = <0x50000000 0x37c>; /* device IO registers */
|
||||
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&edma_xbar 4 0>;
|
||||
dma-names = "rxtx";
|
||||
gpmc,num-cs = <8>;
|
||||
gpmc,num-waitpins = <2>;
|
||||
#address-cells = <2>;
|
||||
|
@ -107,8 +107,8 @@
|
||||
reg = <0x58000000 0x80>,
|
||||
<0x58004054 0x4>,
|
||||
<0x58004300 0x20>,
|
||||
<0x58005054 0x4>,
|
||||
<0x58005300 0x20>;
|
||||
<0x58009054 0x4>,
|
||||
<0x58009300 0x20>;
|
||||
reg-names = "dss", "pll1_clkctrl", "pll1",
|
||||
"pll2_clkctrl", "pll2";
|
||||
|
||||
|
@ -242,7 +242,7 @@
|
||||
hpd-gpios = <&gpx0 7 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
ports {
|
||||
port0 {
|
||||
port {
|
||||
dp_out: endpoint {
|
||||
remote-endpoint = <&bridge_in>;
|
||||
};
|
||||
@ -485,13 +485,20 @@
|
||||
edid-emulation = <5>;
|
||||
|
||||
ports {
|
||||
port0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
bridge_out: endpoint {
|
||||
remote-endpoint = <&panel_in>;
|
||||
};
|
||||
};
|
||||
|
||||
port1 {
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
bridge_in: endpoint {
|
||||
remote-endpoint = <&dp_out>;
|
||||
};
|
||||
|
@ -163,7 +163,7 @@
|
||||
hpd-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
ports {
|
||||
port0 {
|
||||
port {
|
||||
dp_out: endpoint {
|
||||
remote-endpoint = <&bridge_in>;
|
||||
};
|
||||
@ -631,13 +631,20 @@
|
||||
use-external-pwm;
|
||||
|
||||
ports {
|
||||
port0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
bridge_out: endpoint {
|
||||
remote-endpoint = <&panel_in>;
|
||||
};
|
||||
};
|
||||
|
||||
port1 {
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
bridge_in: endpoint {
|
||||
remote-endpoint = <&dp_out>;
|
||||
};
|
||||
|
@ -85,7 +85,7 @@
|
||||
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
|
||||
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x215e, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
|
||||
>;
|
||||
|
@ -188,6 +188,7 @@
|
||||
vmmc-supply = <&vmmc1>;
|
||||
vmmc_aux-supply = <&vsim>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
|
@ -194,6 +194,12 @@
|
||||
OMAP3630_CORE2_IOPAD(0x25f8, PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_wp_pins: pinmux_mmc1_cd_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT | MUX_MODE4) /* etk_d15.gpio_29 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
@ -250,3 +256,8 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
pinctrl-0 = <&mmc1_pins &mmc1_wp_pins>;
|
||||
wp-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; /* gpio_29 */
|
||||
};
|
||||
|
@ -288,7 +288,7 @@
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
|
||||
OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1) /* ssi1_flag_tx */
|
||||
OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* ssi1_wake_tx (cawake) */
|
||||
OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4) /* ssi1_wake_tx (cawake) */
|
||||
OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1) /* ssi1_dat_tx */
|
||||
OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1) /* ssi1_dat_rx */
|
||||
OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1) /* ssi1_flag_rx */
|
||||
@ -300,7 +300,7 @@
|
||||
modem_pins: pinmux_modem {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4) /* gpio 70 => cmt_apeslpx */
|
||||
OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* gpio 72 => ape_rst_rq */
|
||||
OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4) /* gpio 72 => ape_rst_rq */
|
||||
OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4) /* gpio 73 => cmt_rst_rq */
|
||||
OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4) /* gpio 74 => cmt_en */
|
||||
OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4) /* gpio 75 => cmt_rst */
|
||||
|
@ -97,7 +97,7 @@
|
||||
OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1) /* ssi1_dat_tx */
|
||||
OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1) /* ssi1_flag_tx */
|
||||
OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
|
||||
OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* ssi1_wake_tx (cawake) */
|
||||
OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4) /* ssi1_wake_tx (cawake) */
|
||||
OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1) /* ssi1_dat_rx */
|
||||
OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1) /* ssi1_flag_rx */
|
||||
OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1) /* ssi1_rdy_rx */
|
||||
@ -110,7 +110,7 @@
|
||||
OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE7) /* ssi1_dat_tx */
|
||||
OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE7) /* ssi1_flag_tx */
|
||||
OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLDOWN | MUX_MODE7) /* ssi1_rdy_tx */
|
||||
OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* ssi1_wake_tx (cawake) */
|
||||
OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4) /* ssi1_wake_tx (cawake) */
|
||||
OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE7) /* ssi1_dat_rx */
|
||||
OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE7) /* ssi1_flag_rx */
|
||||
OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE4) /* ssi1_rdy_rx */
|
||||
@ -120,7 +120,7 @@
|
||||
|
||||
modem_pins1: pinmux_modem_core1_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x207a, PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* gpio_34 (ape_rst_rq) */
|
||||
OMAP3_CORE1_IOPAD(0x207a, PIN_INPUT | MUX_MODE4) /* gpio_34 (ape_rst_rq) */
|
||||
OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE4) /* gpio_88 (cmt_rst_rq) */
|
||||
OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE4) /* gpio_93 (cmt_apeslpx) */
|
||||
>;
|
||||
|
@ -98,7 +98,7 @@
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
|
||||
OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
|
||||
OMAP3_CORE1_IOPAD(0x217a, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
|
||||
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
|
||||
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
|
||||
>;
|
||||
};
|
||||
@ -107,7 +107,7 @@
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
|
||||
OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
|
||||
OMAP3_CORE1_IOPAD(0x219e, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
>;
|
||||
};
|
||||
@ -125,7 +125,7 @@
|
||||
pinctrl-single,pins = <
|
||||
OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_clk.sdmmc3_clk */
|
||||
OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d4.sdmmc3_dat0 */
|
||||
OMAP3630_CORE2_IOPAD(0x25e6, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d5.sdmmc3_dat1 */
|
||||
OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d5.sdmmc3_dat1 */
|
||||
OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d6.sdmmc3_dat2 */
|
||||
OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d3.sdmmc3_dat3 */
|
||||
>;
|
||||
|
@ -14,6 +14,29 @@
|
||||
display0 = &hdmi0;
|
||||
};
|
||||
|
||||
vmain: fixedregulator-vmain {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmain";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
vsys_cobra: fixedregulator-vsys_cobra {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vsys_cobra";
|
||||
vin-supply = <&vmain>;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
vdds_1v8_main: fixedregulator-vdds_1v8_main {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdds_1v8_main";
|
||||
vin-supply = <&smps7_reg>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vmmcsd_fixed: fixedregulator-mmcsd {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmcsd_fixed";
|
||||
@ -309,7 +332,7 @@
|
||||
|
||||
wlcore_irq_pin: pinmux_wlcore_irq_pin {
|
||||
pinctrl-single,pins = <
|
||||
OMAP5_IOPAD(0x40, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE6) /* llia_wakereqin.gpio1_wk14 */
|
||||
OMAP5_IOPAD(0x40, PIN_INPUT_PULLUP | MUX_MODE6) /* llia_wakereqin.gpio1_wk14 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
@ -409,6 +432,26 @@
|
||||
|
||||
ti,ldo6-vibrator;
|
||||
|
||||
smps123-in-supply = <&vsys_cobra>;
|
||||
smps45-in-supply = <&vsys_cobra>;
|
||||
smps6-in-supply = <&vsys_cobra>;
|
||||
smps7-in-supply = <&vsys_cobra>;
|
||||
smps8-in-supply = <&vsys_cobra>;
|
||||
smps9-in-supply = <&vsys_cobra>;
|
||||
smps10_out2-in-supply = <&vsys_cobra>;
|
||||
smps10_out1-in-supply = <&vsys_cobra>;
|
||||
ldo1-in-supply = <&vsys_cobra>;
|
||||
ldo2-in-supply = <&vsys_cobra>;
|
||||
ldo3-in-supply = <&vdds_1v8_main>;
|
||||
ldo4-in-supply = <&vdds_1v8_main>;
|
||||
ldo5-in-supply = <&vsys_cobra>;
|
||||
ldo6-in-supply = <&vdds_1v8_main>;
|
||||
ldo7-in-supply = <&vsys_cobra>;
|
||||
ldo8-in-supply = <&vsys_cobra>;
|
||||
ldo9-in-supply = <&vmmcsd_fixed>;
|
||||
ldoln-in-supply = <&vsys_cobra>;
|
||||
ldousb-in-supply = <&vsys_cobra>;
|
||||
|
||||
regulators {
|
||||
smps123_reg: smps123 {
|
||||
/* VDD_OPP_MPU */
|
||||
@ -600,7 +643,8 @@
|
||||
pinctrl-0 = <&twl6040_pins>;
|
||||
|
||||
interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */
|
||||
ti,audpwron-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>; /* gpio line 141 */
|
||||
|
||||
/* audpwron gpio defined in the board specific dts */
|
||||
|
||||
vio-supply = <&smps7_reg>;
|
||||
v2v1-supply = <&smps9_reg>;
|
||||
|
@ -35,6 +35,22 @@
|
||||
};
|
||||
};
|
||||
|
||||
/* LDO4 is VPP1 - ball AD9 */
|
||||
&ldo4_reg {
|
||||
regulator-min-microvolt = <2000000>;
|
||||
regulator-max-microvolt = <2000000>;
|
||||
};
|
||||
|
||||
/*
|
||||
* LDO7 is used for HDMI: VDDA_DSIPORTA - ball AA33, VDDA_DSIPORTC - ball AE33,
|
||||
* VDDA_HDMI - ball AN25
|
||||
*/
|
||||
&ldo7_reg {
|
||||
status = "okay";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
&omap5_pmx_core {
|
||||
i2c4_pins: pinmux_i2c4_pins {
|
||||
pinctrl-single,pins = <
|
||||
@ -52,3 +68,13 @@
|
||||
<&gpio7 3 0>; /* 195, SDA */
|
||||
};
|
||||
|
||||
&twl6040 {
|
||||
ti,audpwron-gpio = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* gpio line 144 */
|
||||
};
|
||||
|
||||
&twl6040_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP5_IOPAD(0x1c4, PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_144 */
|
||||
OMAP5_IOPAD(0x1ca, PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */
|
||||
>;
|
||||
};
|
||||
|
@ -51,3 +51,13 @@
|
||||
<&gpio9 1 GPIO_ACTIVE_HIGH>, /* TCA6424A P00, LS OE */
|
||||
<&gpio7 1 GPIO_ACTIVE_HIGH>; /* GPIO 193, HPD */
|
||||
};
|
||||
|
||||
&twl6040 {
|
||||
ti,audpwron-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>; /* gpio line 141 */
|
||||
};
|
||||
|
||||
&twl6040_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP5_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */
|
||||
>;
|
||||
};
|
||||
|
@ -136,6 +136,7 @@
|
||||
&gmac1 {
|
||||
status = "okay";
|
||||
phy-mode = "rgmii";
|
||||
phy-handle = <&phy1>;
|
||||
|
||||
snps,reset-gpio = <&porta 0 GPIO_ACTIVE_LOW>;
|
||||
snps,reset-active-low;
|
||||
|
@ -24,18 +24,21 @@
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x40000000 0x01000000>;
|
||||
no-map;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gp1_reserved: rproc@41000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x41000000 0x01000000>;
|
||||
no-map;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
audio_reserved: rproc@42000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x42000000 0x01000000>;
|
||||
no-map;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dmu_reserved: rproc@43000000 {
|
||||
|
@ -176,8 +176,6 @@
|
||||
};
|
||||
|
||||
®_dc1sw {
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-name = "vcc-lcd";
|
||||
};
|
||||
|
||||
|
@ -135,8 +135,6 @@
|
||||
|
||||
®_dc1sw {
|
||||
regulator-name = "vcc-lcd-usb2";
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
};
|
||||
|
||||
®_dc5ldo {
|
||||
|
@ -82,6 +82,7 @@ CONFIG_TOUCHSCREEN_MMS114=y
|
||||
CONFIG_INPUT_MISC=y
|
||||
CONFIG_INPUT_MAX77693_HAPTIC=y
|
||||
CONFIG_INPUT_MAX8997_HAPTIC=y
|
||||
CONFIG_KEYBOARD_SAMSUNG=y
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_SAMSUNG=y
|
||||
CONFIG_SERIAL_SAMSUNG_CONSOLE=y
|
||||
|
@ -264,6 +264,7 @@ CONFIG_KEYBOARD_TEGRA=y
|
||||
CONFIG_KEYBOARD_SPEAR=y
|
||||
CONFIG_KEYBOARD_ST_KEYSCAN=y
|
||||
CONFIG_KEYBOARD_CROS_EC=m
|
||||
CONFIG_KEYBOARD_SAMSUNG=m
|
||||
CONFIG_MOUSE_PS2_ELANTECH=y
|
||||
CONFIG_MOUSE_CYAPA=m
|
||||
CONFIG_MOUSE_ELAN_I2C=y
|
||||
|
@ -29,7 +29,7 @@
|
||||
|
||||
static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
|
||||
{
|
||||
return (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_REPEAT);
|
||||
return (pmd_t *)get_zeroed_page(GFP_KERNEL);
|
||||
}
|
||||
|
||||
static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
|
||||
|
@ -193,6 +193,7 @@ static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
|
||||
|
||||
#define pmd_large(pmd) (pmd_val(pmd) & 2)
|
||||
#define pmd_bad(pmd) (pmd_val(pmd) & 2)
|
||||
#define pmd_present(pmd) (pmd_val(pmd))
|
||||
|
||||
#define copy_pmd(pmdpd,pmdps) \
|
||||
do { \
|
||||
|
@ -211,6 +211,7 @@ static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
|
||||
: !!(pmd_val(pmd) & (val)))
|
||||
#define pmd_isclear(pmd, val) (!(pmd_val(pmd) & (val)))
|
||||
|
||||
#define pmd_present(pmd) (pmd_isset((pmd), L_PMD_SECT_VALID))
|
||||
#define pmd_young(pmd) (pmd_isset((pmd), PMD_SECT_AF))
|
||||
#define pte_special(pte) (pte_isset((pte), L_PTE_SPECIAL))
|
||||
static inline pte_t pte_mkspecial(pte_t pte)
|
||||
@ -249,10 +250,10 @@ PMD_BIT_FUNC(mkyoung, |= PMD_SECT_AF);
|
||||
#define pfn_pmd(pfn,prot) (__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
|
||||
#define mk_pmd(page,prot) pfn_pmd(page_to_pfn(page),prot)
|
||||
|
||||
/* represent a notpresent pmd by zero, this is used by pmdp_invalidate */
|
||||
/* represent a notpresent pmd by faulting entry, this is used by pmdp_invalidate */
|
||||
static inline pmd_t pmd_mknotpresent(pmd_t pmd)
|
||||
{
|
||||
return __pmd(0);
|
||||
return __pmd(pmd_val(pmd) & ~L_PMD_SECT_VALID);
|
||||
}
|
||||
|
||||
static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
|
||||
|
@ -182,7 +182,6 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
|
||||
#define pgd_offset_k(addr) pgd_offset(&init_mm, addr)
|
||||
|
||||
#define pmd_none(pmd) (!pmd_val(pmd))
|
||||
#define pmd_present(pmd) (pmd_val(pmd))
|
||||
|
||||
static inline pte_t *pmd_page_vaddr(pmd_t pmd)
|
||||
{
|
||||
|
@ -486,7 +486,7 @@ static const char *ipi_types[NR_IPI] __tracepoint_string = {
|
||||
|
||||
static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
|
||||
{
|
||||
trace_ipi_raise(target, ipi_types[ipinr]);
|
||||
trace_ipi_raise_rcuidle(target, ipi_types[ipinr]);
|
||||
__smp_cross_call(target, ipinr);
|
||||
}
|
||||
|
||||
|
@ -263,6 +263,7 @@ void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
|
||||
kvm_timer_vcpu_terminate(vcpu);
|
||||
kvm_vgic_vcpu_destroy(vcpu);
|
||||
kvm_pmu_vcpu_destroy(vcpu);
|
||||
kvm_vcpu_uninit(vcpu);
|
||||
kmem_cache_free(kvm_vcpu_cache, vcpu);
|
||||
}
|
||||
|
||||
|
@ -61,7 +61,6 @@ config ARCH_EXYNOS4
|
||||
select CLKSRC_SAMSUNG_PWM if CPU_EXYNOS4210
|
||||
select CPU_EXYNOS4210
|
||||
select GIC_NON_BANKED
|
||||
select KEYBOARD_SAMSUNG if INPUT_KEYBOARD
|
||||
select MIGHT_HAVE_CACHE_L2X0
|
||||
help
|
||||
Samsung EXYNOS4 (Cortex-A9) SoC based systems
|
||||
|
@ -46,7 +46,7 @@ static int ksz8081_phy_fixup(struct phy_device *dev)
|
||||
static void __init imx6ul_enet_phy_init(void)
|
||||
{
|
||||
if (IS_BUILTIN(CONFIG_PHYLIB))
|
||||
phy_register_fixup_for_uid(PHY_ID_KSZ8081, 0xffffffff,
|
||||
phy_register_fixup_for_uid(PHY_ID_KSZ8081, MICREL_PHY_ID_MASK,
|
||||
ksz8081_phy_fixup);
|
||||
}
|
||||
|
||||
|
@ -43,8 +43,8 @@
|
||||
#define OTHERS_MASK (MODEM_IRQ_MASK | HOOK_SWITCH_MASK)
|
||||
|
||||
/* IRQ handler register bitmasks */
|
||||
#define DEFERRED_FIQ_MASK (0x1 << (INT_DEFERRED_FIQ % IH2_BASE))
|
||||
#define GPIO_BANK1_MASK (0x1 << INT_GPIO_BANK1)
|
||||
#define DEFERRED_FIQ_MASK OMAP_IRQ_BIT(INT_DEFERRED_FIQ)
|
||||
#define GPIO_BANK1_MASK OMAP_IRQ_BIT(INT_GPIO_BANK1)
|
||||
|
||||
/* Driver buffer byte offsets */
|
||||
#define BUF_MASK (FIQ_MASK * 4)
|
||||
@ -110,7 +110,7 @@ ENTRY(qwerty_fiqin_start)
|
||||
mov r8, #2 @ reset FIQ agreement
|
||||
str r8, [r12, #IRQ_CONTROL_REG_OFFSET]
|
||||
|
||||
cmp r10, #INT_GPIO_BANK1 @ is it GPIO bank interrupt?
|
||||
cmp r10, #(INT_GPIO_BANK1 - NR_IRQS_LEGACY) @ is it GPIO interrupt?
|
||||
beq gpio @ yes - process it
|
||||
|
||||
mov r8, #1
|
||||
|
@ -109,7 +109,8 @@ void __init ams_delta_init_fiq(void)
|
||||
* Since no set_type() method is provided by OMAP irq chip,
|
||||
* switch to edge triggered interrupt type manually.
|
||||
*/
|
||||
offset = IRQ_ILR0_REG_OFFSET + INT_DEFERRED_FIQ * 0x4;
|
||||
offset = IRQ_ILR0_REG_OFFSET +
|
||||
((INT_DEFERRED_FIQ - NR_IRQS_LEGACY) & 0x1f) * 0x4;
|
||||
val = omap_readl(DEFERRED_FIQ_IH_BASE + offset) & ~(1 << 1);
|
||||
omap_writel(val, DEFERRED_FIQ_IH_BASE + offset);
|
||||
|
||||
@ -149,7 +150,7 @@ void __init ams_delta_init_fiq(void)
|
||||
/*
|
||||
* Redirect GPIO interrupts to FIQ
|
||||
*/
|
||||
offset = IRQ_ILR0_REG_OFFSET + INT_GPIO_BANK1 * 0x4;
|
||||
offset = IRQ_ILR0_REG_OFFSET + (INT_GPIO_BANK1 - NR_IRQS_LEGACY) * 0x4;
|
||||
val = omap_readl(OMAP_IH1_BASE + offset) | 1;
|
||||
omap_writel(val, OMAP_IH1_BASE + offset);
|
||||
}
|
||||
|
@ -14,6 +14,8 @@
|
||||
#ifndef __AMS_DELTA_FIQ_H
|
||||
#define __AMS_DELTA_FIQ_H
|
||||
|
||||
#include <mach/irqs.h>
|
||||
|
||||
/*
|
||||
* Interrupt number used for passing control from FIQ to IRQ.
|
||||
* IRQ12, described as reserved, has been selected.
|
||||
|
@ -17,6 +17,7 @@ config ARCH_OMAP3
|
||||
select PM_OPP if PM
|
||||
select PM if CPU_IDLE
|
||||
select SOC_HAS_OMAP2_SDRC
|
||||
select ARM_ERRATA_430973
|
||||
|
||||
config ARCH_OMAP4
|
||||
bool "TI OMAP4"
|
||||
@ -36,6 +37,7 @@ config ARCH_OMAP4
|
||||
select PM if CPU_IDLE
|
||||
select ARM_ERRATA_754322
|
||||
select ARM_ERRATA_775420
|
||||
select OMAP_INTERCONNECT
|
||||
|
||||
config SOC_OMAP5
|
||||
bool "TI OMAP5"
|
||||
@ -67,6 +69,8 @@ config SOC_AM43XX
|
||||
select HAVE_ARM_SCU
|
||||
select GENERIC_CLOCKEVENTS_BROADCAST
|
||||
select HAVE_ARM_TWD
|
||||
select ARM_ERRATA_754322
|
||||
select ARM_ERRATA_775420
|
||||
|
||||
config SOC_DRA7XX
|
||||
bool "TI DRA7XX"
|
||||
@ -240,4 +244,12 @@ endmenu
|
||||
|
||||
endif
|
||||
|
||||
config OMAP5_ERRATA_801819
|
||||
bool "Errata 801819: An eviction from L1 data cache might stall indefinitely"
|
||||
depends on SOC_OMAP5 || SOC_DRA7XX
|
||||
help
|
||||
A livelock can occur in the L2 cache arbitration that might prevent
|
||||
a snoop from completing. Under certain conditions this can cause the
|
||||
system to deadlock.
|
||||
|
||||
endmenu
|
||||
|
@ -46,6 +46,7 @@
|
||||
|
||||
#define OMAP5_DRA7_MON_SET_CNTFRQ_INDEX 0x109
|
||||
#define OMAP5_MON_AMBA_IF_INDEX 0x108
|
||||
#define OMAP5_DRA7_MON_SET_ACR_INDEX 0x107
|
||||
|
||||
/* Secure PPA(Primary Protected Application) APIs */
|
||||
#define OMAP4_PPA_L2_POR_INDEX 0x23
|
||||
|
@ -50,6 +50,39 @@ void __iomem *omap4_get_scu_base(void)
|
||||
return scu_base;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OMAP5_ERRATA_801819
|
||||
void omap5_erratum_workaround_801819(void)
|
||||
{
|
||||
u32 acr, revidr;
|
||||
u32 acr_mask;
|
||||
|
||||
/* REVIDR[3] indicates erratum fix available on silicon */
|
||||
asm volatile ("mrc p15, 0, %0, c0, c0, 6" : "=r" (revidr));
|
||||
if (revidr & (0x1 << 3))
|
||||
return;
|
||||
|
||||
asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
|
||||
/*
|
||||
* BIT(27) - Disables streaming. All write-allocate lines allocate in
|
||||
* the L1 or L2 cache.
|
||||
* BIT(25) - Disables streaming. All write-allocate lines allocate in
|
||||
* the L1 cache.
|
||||
*/
|
||||
acr_mask = (0x3 << 25) | (0x3 << 27);
|
||||
/* do we already have it done.. if yes, skip expensive smc */
|
||||
if ((acr & acr_mask) == acr_mask)
|
||||
return;
|
||||
|
||||
acr |= acr_mask;
|
||||
omap_smc1(OMAP5_DRA7_MON_SET_ACR_INDEX, acr);
|
||||
|
||||
pr_debug("%s: ARM erratum workaround 801819 applied on CPU%d\n",
|
||||
__func__, smp_processor_id());
|
||||
}
|
||||
#else
|
||||
static inline void omap5_erratum_workaround_801819(void) { }
|
||||
#endif
|
||||
|
||||
static void omap4_secondary_init(unsigned int cpu)
|
||||
{
|
||||
/*
|
||||
@ -64,12 +97,15 @@ static void omap4_secondary_init(unsigned int cpu)
|
||||
omap_secure_dispatcher(OMAP4_PPA_CPU_ACTRL_SMP_INDEX,
|
||||
4, 0, 0, 0, 0, 0);
|
||||
|
||||
/*
|
||||
* Configure the CNTFRQ register for the secondary cpu's which
|
||||
* indicates the frequency of the cpu local timers.
|
||||
*/
|
||||
if (soc_is_omap54xx() || soc_is_dra7xx())
|
||||
if (soc_is_omap54xx() || soc_is_dra7xx()) {
|
||||
/*
|
||||
* Configure the CNTFRQ register for the secondary cpu's which
|
||||
* indicates the frequency of the cpu local timers.
|
||||
*/
|
||||
set_cntfreq();
|
||||
/* Configure ACR to disable streaming WA for 801819 */
|
||||
omap5_erratum_workaround_801819();
|
||||
}
|
||||
|
||||
/*
|
||||
* Synchronise with the boot thread.
|
||||
@ -218,6 +254,8 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
|
||||
|
||||
if (cpu_is_omap446x())
|
||||
startup_addr = omap4460_secondary_startup;
|
||||
if (soc_is_dra74x() || soc_is_omap54xx())
|
||||
omap5_erratum_workaround_801819();
|
||||
|
||||
/*
|
||||
* Write the address of secondary startup routine into the
|
||||
|
@ -186,8 +186,9 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
|
||||
trace_state = (PWRDM_TRACE_STATES_FLAG |
|
||||
((next & OMAP_POWERSTATE_MASK) << 8) |
|
||||
((prev & OMAP_POWERSTATE_MASK) << 0));
|
||||
trace_power_domain_target(pwrdm->name, trace_state,
|
||||
smp_processor_id());
|
||||
trace_power_domain_target_rcuidle(pwrdm->name,
|
||||
trace_state,
|
||||
smp_processor_id());
|
||||
}
|
||||
break;
|
||||
default:
|
||||
@ -523,8 +524,8 @@ int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
|
||||
|
||||
if (arch_pwrdm && arch_pwrdm->pwrdm_set_next_pwrst) {
|
||||
/* Trace the pwrdm desired target state */
|
||||
trace_power_domain_target(pwrdm->name, pwrst,
|
||||
smp_processor_id());
|
||||
trace_power_domain_target_rcuidle(pwrdm->name, pwrst,
|
||||
smp_processor_id());
|
||||
/* Program the pwrdm desired target state */
|
||||
ret = arch_pwrdm->pwrdm_set_next_pwrst(pwrdm, pwrst);
|
||||
}
|
||||
|
@ -36,14 +36,7 @@ static struct powerdomain iva_7xx_pwrdm = {
|
||||
.prcm_offs = DRA7XX_PRM_IVA_INST,
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.pwrsts_logic_ret = PWRSTS_OFF,
|
||||
.banks = 4,
|
||||
.pwrsts_mem_ret = {
|
||||
[0] = PWRSTS_OFF_RET, /* hwa_mem */
|
||||
[1] = PWRSTS_OFF_RET, /* sl2_mem */
|
||||
[2] = PWRSTS_OFF_RET, /* tcm1_mem */
|
||||
[3] = PWRSTS_OFF_RET, /* tcm2_mem */
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* hwa_mem */
|
||||
[1] = PWRSTS_ON, /* sl2_mem */
|
||||
@ -76,12 +69,7 @@ static struct powerdomain ipu_7xx_pwrdm = {
|
||||
.prcm_offs = DRA7XX_PRM_IPU_INST,
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.pwrsts_logic_ret = PWRSTS_OFF,
|
||||
.banks = 2,
|
||||
.pwrsts_mem_ret = {
|
||||
[0] = PWRSTS_OFF_RET, /* aessmem */
|
||||
[1] = PWRSTS_OFF_RET, /* periphmem */
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* aessmem */
|
||||
[1] = PWRSTS_ON, /* periphmem */
|
||||
@ -95,11 +83,7 @@ static struct powerdomain dss_7xx_pwrdm = {
|
||||
.prcm_offs = DRA7XX_PRM_DSS_INST,
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.pwrsts_logic_ret = PWRSTS_OFF,
|
||||
.banks = 1,
|
||||
.pwrsts_mem_ret = {
|
||||
[0] = PWRSTS_OFF_RET, /* dss_mem */
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* dss_mem */
|
||||
},
|
||||
@ -111,13 +95,8 @@ static struct powerdomain l4per_7xx_pwrdm = {
|
||||
.name = "l4per_pwrdm",
|
||||
.prcm_offs = DRA7XX_PRM_L4PER_INST,
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_RET_ON,
|
||||
.pwrsts_logic_ret = PWRSTS_RET,
|
||||
.pwrsts = PWRSTS_ON,
|
||||
.banks = 2,
|
||||
.pwrsts_mem_ret = {
|
||||
[0] = PWRSTS_OFF_RET, /* nonretained_bank */
|
||||
[1] = PWRSTS_OFF_RET, /* retained_bank */
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* nonretained_bank */
|
||||
[1] = PWRSTS_ON, /* retained_bank */
|
||||
@ -132,9 +111,6 @@ static struct powerdomain gpu_7xx_pwrdm = {
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.banks = 1,
|
||||
.pwrsts_mem_ret = {
|
||||
[0] = PWRSTS_OFF_RET, /* gpu_mem */
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* gpu_mem */
|
||||
},
|
||||
@ -148,8 +124,6 @@ static struct powerdomain wkupaon_7xx_pwrdm = {
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_ON,
|
||||
.banks = 1,
|
||||
.pwrsts_mem_ret = {
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* wkup_bank */
|
||||
},
|
||||
@ -161,15 +135,7 @@ static struct powerdomain core_7xx_pwrdm = {
|
||||
.prcm_offs = DRA7XX_PRM_CORE_INST,
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_ON,
|
||||
.pwrsts_logic_ret = PWRSTS_RET,
|
||||
.banks = 5,
|
||||
.pwrsts_mem_ret = {
|
||||
[0] = PWRSTS_OFF_RET, /* core_nret_bank */
|
||||
[1] = PWRSTS_OFF_RET, /* core_ocmram */
|
||||
[2] = PWRSTS_OFF_RET, /* core_other_bank */
|
||||
[3] = PWRSTS_OFF_RET, /* ipu_l2ram */
|
||||
[4] = PWRSTS_OFF_RET, /* ipu_unicache */
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* core_nret_bank */
|
||||
[1] = PWRSTS_ON, /* core_ocmram */
|
||||
@ -226,11 +192,7 @@ static struct powerdomain vpe_7xx_pwrdm = {
|
||||
.prcm_offs = DRA7XX_PRM_VPE_INST,
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.pwrsts_logic_ret = PWRSTS_OFF,
|
||||
.banks = 1,
|
||||
.pwrsts_mem_ret = {
|
||||
[0] = PWRSTS_OFF_RET, /* vpe_bank */
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* vpe_bank */
|
||||
},
|
||||
@ -260,14 +222,8 @@ static struct powerdomain l3init_7xx_pwrdm = {
|
||||
.name = "l3init_pwrdm",
|
||||
.prcm_offs = DRA7XX_PRM_L3INIT_INST,
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_RET_ON,
|
||||
.pwrsts_logic_ret = PWRSTS_RET,
|
||||
.pwrsts = PWRSTS_ON,
|
||||
.banks = 3,
|
||||
.pwrsts_mem_ret = {
|
||||
[0] = PWRSTS_OFF_RET, /* gmac_bank */
|
||||
[1] = PWRSTS_OFF_RET, /* l3init_bank1 */
|
||||
[2] = PWRSTS_OFF_RET, /* l3init_bank2 */
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* gmac_bank */
|
||||
[1] = PWRSTS_ON, /* l3init_bank1 */
|
||||
@ -283,9 +239,6 @@ static struct powerdomain eve3_7xx_pwrdm = {
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.banks = 1,
|
||||
.pwrsts_mem_ret = {
|
||||
[0] = PWRSTS_OFF_RET, /* eve3_bank */
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* eve3_bank */
|
||||
},
|
||||
@ -299,9 +252,6 @@ static struct powerdomain emu_7xx_pwrdm = {
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.banks = 1,
|
||||
.pwrsts_mem_ret = {
|
||||
[0] = PWRSTS_OFF_RET, /* emu_bank */
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* emu_bank */
|
||||
},
|
||||
@ -314,11 +264,6 @@ static struct powerdomain dsp2_7xx_pwrdm = {
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.banks = 3,
|
||||
.pwrsts_mem_ret = {
|
||||
[0] = PWRSTS_OFF_RET, /* dsp2_edma */
|
||||
[1] = PWRSTS_OFF_RET, /* dsp2_l1 */
|
||||
[2] = PWRSTS_OFF_RET, /* dsp2_l2 */
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* dsp2_edma */
|
||||
[1] = PWRSTS_ON, /* dsp2_l1 */
|
||||
@ -334,11 +279,6 @@ static struct powerdomain dsp1_7xx_pwrdm = {
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.banks = 3,
|
||||
.pwrsts_mem_ret = {
|
||||
[0] = PWRSTS_OFF_RET, /* dsp1_edma */
|
||||
[1] = PWRSTS_OFF_RET, /* dsp1_l1 */
|
||||
[2] = PWRSTS_OFF_RET, /* dsp1_l2 */
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* dsp1_edma */
|
||||
[1] = PWRSTS_ON, /* dsp1_l1 */
|
||||
@ -354,9 +294,6 @@ static struct powerdomain cam_7xx_pwrdm = {
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.banks = 1,
|
||||
.pwrsts_mem_ret = {
|
||||
[0] = PWRSTS_OFF_RET, /* vip_bank */
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* vip_bank */
|
||||
},
|
||||
@ -370,9 +307,6 @@ static struct powerdomain eve4_7xx_pwrdm = {
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.banks = 1,
|
||||
.pwrsts_mem_ret = {
|
||||
[0] = PWRSTS_OFF_RET, /* eve4_bank */
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* eve4_bank */
|
||||
},
|
||||
@ -386,9 +320,6 @@ static struct powerdomain eve2_7xx_pwrdm = {
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.banks = 1,
|
||||
.pwrsts_mem_ret = {
|
||||
[0] = PWRSTS_OFF_RET, /* eve2_bank */
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* eve2_bank */
|
||||
},
|
||||
@ -402,9 +333,6 @@ static struct powerdomain eve1_7xx_pwrdm = {
|
||||
.prcm_partition = DRA7XX_PRM_PARTITION,
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.banks = 1,
|
||||
.pwrsts_mem_ret = {
|
||||
[0] = PWRSTS_OFF_RET, /* eve1_bank */
|
||||
},
|
||||
.pwrsts_mem_on = {
|
||||
[0] = PWRSTS_ON, /* eve1_bank */
|
||||
},
|
||||
|
@ -496,8 +496,7 @@ void __init omap_init_time(void)
|
||||
__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
|
||||
2, "timer_sys_ck", NULL, false);
|
||||
|
||||
if (of_have_populated_dt())
|
||||
clocksource_probe();
|
||||
clocksource_probe();
|
||||
}
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX)
|
||||
@ -505,6 +504,8 @@ void __init omap3_secure_sync32k_timer_init(void)
|
||||
{
|
||||
__omap_sync32k_timer_init(12, "secure_32k_fck", "ti,timer-secure",
|
||||
2, "timer_sys_ck", NULL, false);
|
||||
|
||||
clocksource_probe();
|
||||
}
|
||||
#endif /* CONFIG_ARCH_OMAP3 */
|
||||
|
||||
@ -513,6 +514,8 @@ void __init omap3_gptimer_timer_init(void)
|
||||
{
|
||||
__omap_sync32k_timer_init(2, "timer_sys_ck", NULL,
|
||||
1, "timer_sys_ck", "ti,timer-alwon", true);
|
||||
|
||||
clocksource_probe();
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -68,7 +68,7 @@
|
||||
#include <linux/platform_data/asoc-s3c.h>
|
||||
#include <linux/platform_data/spi-s3c64xx.h>
|
||||
|
||||
static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
|
||||
#define samsung_device_dma_mask (*((u64[]) { DMA_BIT_MASK(32) }))
|
||||
|
||||
/* AC97 */
|
||||
#ifdef CONFIG_CPU_S3C2440
|
||||
|
@ -95,7 +95,7 @@ boot := arch/arm64/boot
|
||||
Image: vmlinux
|
||||
$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
|
||||
|
||||
Image.%: vmlinux
|
||||
Image.%: Image
|
||||
$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
|
||||
|
||||
zinstall install:
|
||||
|
@ -125,7 +125,7 @@
|
||||
#size-cells = <1>;
|
||||
#interrupts-cells = <3>;
|
||||
|
||||
compatible = "arm,amba-bus";
|
||||
compatible = "simple-bus";
|
||||
interrupt-parent = <&gic>;
|
||||
ranges;
|
||||
|
||||
|
@ -163,7 +163,7 @@
|
||||
};
|
||||
|
||||
amba {
|
||||
compatible = "arm,amba-bus";
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
@ -80,12 +80,14 @@
|
||||
#define APM_CPU_PART_POTENZA 0x000
|
||||
|
||||
#define CAVIUM_CPU_PART_THUNDERX 0x0A1
|
||||
#define CAVIUM_CPU_PART_THUNDERX_81XX 0x0A2
|
||||
|
||||
#define BRCM_CPU_PART_VULCAN 0x516
|
||||
|
||||
#define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53)
|
||||
#define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57)
|
||||
#define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
|
||||
#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
|
@ -38,25 +38,54 @@ extern int kgdb_fault_expected;
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
/*
|
||||
* gdb is expecting the following registers layout.
|
||||
* gdb remote procotol (well most versions of it) expects the following
|
||||
* register layout.
|
||||
*
|
||||
* General purpose regs:
|
||||
* r0-r30: 64 bit
|
||||
* sp,pc : 64 bit
|
||||
* pstate : 64 bit
|
||||
* Total: 34
|
||||
* pstate : 32 bit
|
||||
* Total: 33 + 1
|
||||
* FPU regs:
|
||||
* f0-f31: 128 bit
|
||||
* Total: 32
|
||||
* Extra regs
|
||||
* fpsr & fpcr: 32 bit
|
||||
* Total: 2
|
||||
* Total: 32 + 2
|
||||
*
|
||||
* To expand a little on the "most versions of it"... when the gdb remote
|
||||
* protocol for AArch64 was developed it depended on a statement in the
|
||||
* Architecture Reference Manual that claimed "SPSR_ELx is a 32-bit register".
|
||||
* and, as a result, allocated only 32-bits for the PSTATE in the remote
|
||||
* protocol. In fact this statement is still present in ARM DDI 0487A.i.
|
||||
*
|
||||
* Unfortunately "is a 32-bit register" has a very special meaning for
|
||||
* system registers. It means that "the upper bits, bits[63:32], are
|
||||
* RES0.". RES0 is heavily used in the ARM architecture documents as a
|
||||
* way to leave space for future architecture changes. So to translate a
|
||||
* little for people who don't spend their spare time reading ARM architecture
|
||||
* manuals, what "is a 32-bit register" actually means in this context is
|
||||
* "is a 64-bit register but one with no meaning allocated to any of the
|
||||
* upper 32-bits... *yet*".
|
||||
*
|
||||
* Perhaps then we should not be surprised that this has led to some
|
||||
* confusion. Specifically a patch, influenced by the above translation,
|
||||
* that extended PSTATE to 64-bit was accepted into gdb-7.7 but the patch
|
||||
* was reverted in gdb-7.8.1 and all later releases, when this was
|
||||
* discovered to be an undocumented protocol change.
|
||||
*
|
||||
* So... it is *not* wrong for us to only allocate 32-bits to PSTATE
|
||||
* here even though the kernel itself allocates 64-bits for the same
|
||||
* state. That is because this bit of code tells the kernel how the gdb
|
||||
* remote protocol (well most versions of it) describes the register state.
|
||||
*
|
||||
* Note that if you are using one of the versions of gdb that supports
|
||||
* the gdb-7.7 version of the protocol you cannot use kgdb directly
|
||||
* without providing a custom register description (gdb can load new
|
||||
* protocol descriptions at runtime).
|
||||
*/
|
||||
|
||||
#define _GP_REGS 34
|
||||
#define _GP_REGS 33
|
||||
#define _FP_REGS 32
|
||||
#define _EXTRA_REGS 2
|
||||
#define _EXTRA_REGS 3
|
||||
/*
|
||||
* general purpose registers size in bytes.
|
||||
* pstate is only 4 bytes. subtract 4 bytes
|
||||
|
@ -26,7 +26,7 @@
|
||||
|
||||
#define check_pgt_cache() do { } while (0)
|
||||
|
||||
#define PGALLOC_GFP (GFP_KERNEL | __GFP_NOTRACK | __GFP_REPEAT | __GFP_ZERO)
|
||||
#define PGALLOC_GFP (GFP_KERNEL | __GFP_NOTRACK | __GFP_ZERO)
|
||||
#define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t))
|
||||
|
||||
#if CONFIG_PGTABLE_LEVELS > 2
|
||||
|
@ -117,6 +117,8 @@ struct pt_regs {
|
||||
};
|
||||
u64 orig_x0;
|
||||
u64 syscallno;
|
||||
u64 orig_addr_limit;
|
||||
u64 unused; // maintain 16 byte alignment
|
||||
};
|
||||
|
||||
#define arch_has_single_step() (1)
|
||||
|
@ -124,6 +124,18 @@ static inline void cpu_panic_kernel(void)
|
||||
cpu_park_loop();
|
||||
}
|
||||
|
||||
/*
|
||||
* If a secondary CPU enters the kernel but fails to come online,
|
||||
* (e.g. due to mismatched features), and cannot exit the kernel,
|
||||
* we increment cpus_stuck_in_kernel and leave the CPU in a
|
||||
* quiesecent loop within the kernel text. The memory containing
|
||||
* this loop must not be re-used for anything else as the 'stuck'
|
||||
* core is executing it.
|
||||
*
|
||||
* This function is used to inhibit features like kexec and hibernate.
|
||||
*/
|
||||
bool cpus_are_stuck_in_kernel(void);
|
||||
|
||||
#endif /* ifndef __ASSEMBLY__ */
|
||||
|
||||
#endif /* ifndef __ASM_SMP_H */
|
||||
|
@ -30,22 +30,53 @@ static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
|
||||
{
|
||||
unsigned int tmp;
|
||||
arch_spinlock_t lockval;
|
||||
u32 owner;
|
||||
|
||||
/*
|
||||
* Ensure prior spin_lock operations to other locks have completed
|
||||
* on this CPU before we test whether "lock" is locked.
|
||||
*/
|
||||
smp_mb();
|
||||
owner = READ_ONCE(lock->owner) << 16;
|
||||
|
||||
asm volatile(
|
||||
" sevl\n"
|
||||
"1: wfe\n"
|
||||
"2: ldaxr %w0, %2\n"
|
||||
/* Is the lock free? */
|
||||
" eor %w1, %w0, %w0, ror #16\n"
|
||||
" cbnz %w1, 1b\n"
|
||||
" cbz %w1, 3f\n"
|
||||
/* Lock taken -- has there been a subsequent unlock->lock transition? */
|
||||
" eor %w1, %w3, %w0, lsl #16\n"
|
||||
" cbz %w1, 1b\n"
|
||||
/*
|
||||
* The owner has been updated, so there was an unlock->lock
|
||||
* transition that we missed. That means we can rely on the
|
||||
* store-release of the unlock operation paired with the
|
||||
* load-acquire of the lock operation to publish any of our
|
||||
* previous stores to the new lock owner and therefore don't
|
||||
* need to bother with the writeback below.
|
||||
*/
|
||||
" b 4f\n"
|
||||
"3:\n"
|
||||
/*
|
||||
* Serialise against any concurrent lockers by writing back the
|
||||
* unlocked lock value
|
||||
*/
|
||||
ARM64_LSE_ATOMIC_INSN(
|
||||
/* LL/SC */
|
||||
" stxr %w1, %w0, %2\n"
|
||||
" cbnz %w1, 2b\n", /* Serialise against any concurrent lockers */
|
||||
/* LSE atomics */
|
||||
" nop\n"
|
||||
" nop\n")
|
||||
" nop\n",
|
||||
/* LSE atomics */
|
||||
" mov %w1, %w0\n"
|
||||
" cas %w0, %w0, %2\n"
|
||||
" eor %w1, %w1, %w0\n")
|
||||
/* Somebody else wrote to the lock, GOTO 10 and reload the value */
|
||||
" cbnz %w1, 2b\n"
|
||||
"4:"
|
||||
: "=&r" (lockval), "=&r" (tmp), "+Q" (*lock)
|
||||
:
|
||||
: "r" (owner)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
@ -148,6 +179,7 @@ static inline int arch_spin_value_unlocked(arch_spinlock_t lock)
|
||||
|
||||
static inline int arch_spin_is_locked(arch_spinlock_t *lock)
|
||||
{
|
||||
smp_mb(); /* See arch_spin_unlock_wait */
|
||||
return !arch_spin_value_unlocked(READ_ONCE(*lock));
|
||||
}
|
||||
|
||||
|
@ -60,6 +60,7 @@ int main(void)
|
||||
DEFINE(S_PC, offsetof(struct pt_regs, pc));
|
||||
DEFINE(S_ORIG_X0, offsetof(struct pt_regs, orig_x0));
|
||||
DEFINE(S_SYSCALLNO, offsetof(struct pt_regs, syscallno));
|
||||
DEFINE(S_ORIG_ADDR_LIMIT, offsetof(struct pt_regs, orig_addr_limit));
|
||||
DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
|
||||
BLANK();
|
||||
DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id.counter));
|
||||
|
@ -98,6 +98,12 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
|
||||
MIDR_RANGE(MIDR_THUNDERX, 0x00,
|
||||
(1 << MIDR_VARIANT_SHIFT) | 1),
|
||||
},
|
||||
{
|
||||
/* Cavium ThunderX, T81 pass 1.0 */
|
||||
.desc = "Cavium erratum 27456",
|
||||
.capability = ARM64_WORKAROUND_CAVIUM_27456,
|
||||
MIDR_RANGE(MIDR_THUNDERX_81XX, 0x00, 0x00),
|
||||
},
|
||||
#endif
|
||||
{
|
||||
}
|
||||
|
@ -28,6 +28,7 @@
|
||||
#include <asm/errno.h>
|
||||
#include <asm/esr.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/memory.h>
|
||||
#include <asm/thread_info.h>
|
||||
#include <asm/unistd.h>
|
||||
|
||||
@ -97,7 +98,14 @@
|
||||
mov x29, xzr // fp pointed to user-space
|
||||
.else
|
||||
add x21, sp, #S_FRAME_SIZE
|
||||
.endif
|
||||
get_thread_info tsk
|
||||
/* Save the task's original addr_limit and set USER_DS (TASK_SIZE_64) */
|
||||
ldr x20, [tsk, #TI_ADDR_LIMIT]
|
||||
str x20, [sp, #S_ORIG_ADDR_LIMIT]
|
||||
mov x20, #TASK_SIZE_64
|
||||
str x20, [tsk, #TI_ADDR_LIMIT]
|
||||
ALTERNATIVE(nop, SET_PSTATE_UAO(0), ARM64_HAS_UAO, CONFIG_ARM64_UAO)
|
||||
.endif /* \el == 0 */
|
||||
mrs x22, elr_el1
|
||||
mrs x23, spsr_el1
|
||||
stp lr, x21, [sp, #S_LR]
|
||||
@ -128,6 +136,14 @@
|
||||
.endm
|
||||
|
||||
.macro kernel_exit, el
|
||||
.if \el != 0
|
||||
/* Restore the task's original addr_limit. */
|
||||
ldr x20, [sp, #S_ORIG_ADDR_LIMIT]
|
||||
str x20, [tsk, #TI_ADDR_LIMIT]
|
||||
|
||||
/* No need to restore UAO, it will be restored from SPSR_EL1 */
|
||||
.endif
|
||||
|
||||
ldp x21, x22, [sp, #S_PC] // load ELR, SPSR
|
||||
.if \el == 0
|
||||
ct_user_enter
|
||||
@ -406,7 +422,6 @@ el1_irq:
|
||||
bl trace_hardirqs_off
|
||||
#endif
|
||||
|
||||
get_thread_info tsk
|
||||
irq_handler
|
||||
|
||||
#ifdef CONFIG_PREEMPT
|
||||
|
@ -33,6 +33,7 @@
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/pgtable-hwdef.h>
|
||||
#include <asm/sections.h>
|
||||
#include <asm/smp.h>
|
||||
#include <asm/suspend.h>
|
||||
#include <asm/virt.h>
|
||||
|
||||
@ -236,6 +237,11 @@ int swsusp_arch_suspend(void)
|
||||
unsigned long flags;
|
||||
struct sleep_stack_data state;
|
||||
|
||||
if (cpus_are_stuck_in_kernel()) {
|
||||
pr_err("Can't hibernate: no mechanism to offline secondary CPUs.\n");
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
local_dbg_save(flags);
|
||||
|
||||
if (__cpu_suspend_enter(&state)) {
|
||||
|
@ -58,7 +58,17 @@ struct dbg_reg_def_t dbg_reg_def[DBG_MAX_REG_NUM] = {
|
||||
{ "x30", 8, offsetof(struct pt_regs, regs[30])},
|
||||
{ "sp", 8, offsetof(struct pt_regs, sp)},
|
||||
{ "pc", 8, offsetof(struct pt_regs, pc)},
|
||||
{ "pstate", 8, offsetof(struct pt_regs, pstate)},
|
||||
/*
|
||||
* struct pt_regs thinks PSTATE is 64-bits wide but gdb remote
|
||||
* protocol disagrees. Therefore we must extract only the lower
|
||||
* 32-bits. Look for the big comment in asm/kgdb.h for more
|
||||
* detail.
|
||||
*/
|
||||
{ "pstate", 4, offsetof(struct pt_regs, pstate)
|
||||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
+ 4
|
||||
#endif
|
||||
},
|
||||
{ "v0", 16, -1 },
|
||||
{ "v1", 16, -1 },
|
||||
{ "v2", 16, -1 },
|
||||
@ -128,6 +138,8 @@ sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *task)
|
||||
memset((char *)gdb_regs, 0, NUMREGBYTES);
|
||||
thread_regs = task_pt_regs(task);
|
||||
memcpy((void *)gdb_regs, (void *)thread_regs->regs, GP_REG_BYTES);
|
||||
/* Special case for PSTATE (check comments in asm/kgdb.h for details) */
|
||||
dbg_get_reg(33, gdb_regs + GP_REG_BYTES, thread_regs);
|
||||
}
|
||||
|
||||
void kgdb_arch_set_pc(struct pt_regs *regs, unsigned long pc)
|
||||
|
@ -909,3 +909,21 @@ int setup_profiling_timer(unsigned int multiplier)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static bool have_cpu_die(void)
|
||||
{
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
int any_cpu = raw_smp_processor_id();
|
||||
|
||||
if (cpu_ops[any_cpu]->cpu_die)
|
||||
return true;
|
||||
#endif
|
||||
return false;
|
||||
}
|
||||
|
||||
bool cpus_are_stuck_in_kernel(void)
|
||||
{
|
||||
bool smp_spin_tables = (num_possible_cpus() > 1 && !have_cpu_die());
|
||||
|
||||
return !!cpus_stuck_in_kernel || smp_spin_tables;
|
||||
}
|
||||
|
@ -64,8 +64,7 @@ static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
|
||||
|
||||
/*
|
||||
* We need to switch to kernel mode so that we can use __get_user
|
||||
* to safely read from kernel space. Note that we now dump the
|
||||
* code first, just in case the backtrace kills us.
|
||||
* to safely read from kernel space.
|
||||
*/
|
||||
fs = get_fs();
|
||||
set_fs(KERNEL_DS);
|
||||
@ -111,21 +110,12 @@ static void dump_backtrace_entry(unsigned long where)
|
||||
print_ip_sym(where);
|
||||
}
|
||||
|
||||
static void dump_instr(const char *lvl, struct pt_regs *regs)
|
||||
static void __dump_instr(const char *lvl, struct pt_regs *regs)
|
||||
{
|
||||
unsigned long addr = instruction_pointer(regs);
|
||||
mm_segment_t fs;
|
||||
char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
|
||||
int i;
|
||||
|
||||
/*
|
||||
* We need to switch to kernel mode so that we can use __get_user
|
||||
* to safely read from kernel space. Note that we now dump the
|
||||
* code first, just in case the backtrace kills us.
|
||||
*/
|
||||
fs = get_fs();
|
||||
set_fs(KERNEL_DS);
|
||||
|
||||
for (i = -4; i < 1; i++) {
|
||||
unsigned int val, bad;
|
||||
|
||||
@ -139,8 +129,18 @@ static void dump_instr(const char *lvl, struct pt_regs *regs)
|
||||
}
|
||||
}
|
||||
printk("%sCode: %s\n", lvl, str);
|
||||
}
|
||||
|
||||
set_fs(fs);
|
||||
static void dump_instr(const char *lvl, struct pt_regs *regs)
|
||||
{
|
||||
if (!user_mode(regs)) {
|
||||
mm_segment_t fs = get_fs();
|
||||
set_fs(KERNEL_DS);
|
||||
__dump_instr(lvl, regs);
|
||||
set_fs(fs);
|
||||
} else {
|
||||
__dump_instr(lvl, regs);
|
||||
}
|
||||
}
|
||||
|
||||
static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
|
||||
|
@ -179,7 +179,7 @@ static u64 new_context(struct mm_struct *mm, unsigned int cpu)
|
||||
&asid_generation);
|
||||
flush_context(cpu);
|
||||
|
||||
/* We have at least 1 ASID per CPU, so this will always succeed */
|
||||
/* We have more ASIDs than CPUs, so this will always succeed */
|
||||
asid = find_next_zero_bit(asid_map, NUM_USER_ASIDS, 1);
|
||||
|
||||
set_asid:
|
||||
@ -227,8 +227,11 @@ switch_mm_fastpath:
|
||||
static int asids_init(void)
|
||||
{
|
||||
asid_bits = get_cpu_asid_bits();
|
||||
/* If we end up with more CPUs than ASIDs, expect things to crash */
|
||||
WARN_ON(NUM_USER_ASIDS < num_possible_cpus());
|
||||
/*
|
||||
* Expect allocation after rollover to fail if we don't have at least
|
||||
* one more ASID than CPUs. ASID #0 is reserved for init_mm.
|
||||
*/
|
||||
WARN_ON(NUM_USER_ASIDS - 1 <= num_possible_cpus());
|
||||
atomic64_set(&asid_generation, ASID_FIRST_VERSION);
|
||||
asid_map = kzalloc(BITS_TO_LONGS(NUM_USER_ASIDS) * sizeof(*asid_map),
|
||||
GFP_KERNEL);
|
||||
|
@ -109,7 +109,7 @@ int ptep_set_access_flags(struct vm_area_struct *vma,
|
||||
* PTE_RDONLY is cleared by default in the asm below, so set it in
|
||||
* back if necessary (read-only or clean PTE).
|
||||
*/
|
||||
if (!pte_write(entry) || !dirty)
|
||||
if (!pte_write(entry) || !pte_sw_dirty(entry))
|
||||
pte_val(entry) |= PTE_RDONLY;
|
||||
|
||||
/*
|
||||
@ -280,7 +280,8 @@ static int __kprobes do_page_fault(unsigned long addr, unsigned int esr,
|
||||
}
|
||||
|
||||
if (permission_fault(esr) && (addr < USER_DS)) {
|
||||
if (get_fs() == KERNEL_DS)
|
||||
/* regs->orig_addr_limit may be 0 if we entered from EL0 */
|
||||
if (regs->orig_addr_limit == KERNEL_DS)
|
||||
die("Accessing user space memory with fs=KERNEL_DS", regs, esr);
|
||||
|
||||
if (!search_exception_tables(regs->pc))
|
||||
@ -441,7 +442,7 @@ static int do_bad(unsigned long addr, unsigned int esr, struct pt_regs *regs)
|
||||
return 1;
|
||||
}
|
||||
|
||||
static struct fault_info {
|
||||
static const struct fault_info {
|
||||
int (*fn)(unsigned long addr, unsigned int esr, struct pt_regs *regs);
|
||||
int sig;
|
||||
int code;
|
||||
|
@ -71,10 +71,6 @@ void __sync_icache_dcache(pte_t pte, unsigned long addr)
|
||||
{
|
||||
struct page *page = pte_page(pte);
|
||||
|
||||
/* no flushing needed for anonymous pages */
|
||||
if (!page_mapping(page))
|
||||
return;
|
||||
|
||||
if (!test_and_set_bit(PG_dcache_clean, &page->flags))
|
||||
sync_icache_aliases(page_address(page),
|
||||
PAGE_SIZE << compound_order(page));
|
||||
|
@ -43,7 +43,7 @@ static inline void pgd_ctor(void *x)
|
||||
*/
|
||||
static inline pgd_t *pgd_alloc(struct mm_struct *mm)
|
||||
{
|
||||
return quicklist_alloc(QUICK_PGD, GFP_KERNEL | __GFP_REPEAT, pgd_ctor);
|
||||
return quicklist_alloc(QUICK_PGD, GFP_KERNEL, pgd_ctor);
|
||||
}
|
||||
|
||||
static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
|
||||
@ -54,7 +54,7 @@ static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
|
||||
static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
|
||||
unsigned long address)
|
||||
{
|
||||
return quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL);
|
||||
return quicklist_alloc(QUICK_PT, GFP_KERNEL, NULL);
|
||||
}
|
||||
|
||||
static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
|
||||
@ -63,7 +63,7 @@ static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
|
||||
struct page *page;
|
||||
void *pg;
|
||||
|
||||
pg = quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL);
|
||||
pg = quicklist_alloc(QUICK_PT, GFP_KERNEL, NULL);
|
||||
if (!pg)
|
||||
return NULL;
|
||||
|
||||
|
@ -24,14 +24,14 @@ static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
|
||||
|
||||
static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
|
||||
{
|
||||
pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
|
||||
pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
|
||||
return pte;
|
||||
}
|
||||
|
||||
static inline pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
|
||||
{
|
||||
struct page *pte;
|
||||
pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, 0);
|
||||
pte = alloc_pages(GFP_KERNEL|__GFP_ZERO, 0);
|
||||
if (!pte)
|
||||
return NULL;
|
||||
if (!pgtable_page_ctor(pte)) {
|
||||
|
@ -22,7 +22,7 @@ pgd_t swapper_pg_dir[PTRS_PER_PGD] __attribute__((aligned(PAGE_SIZE)));
|
||||
|
||||
pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
|
||||
{
|
||||
pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT);
|
||||
pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL);
|
||||
if (pte)
|
||||
clear_page(pte);
|
||||
return pte;
|
||||
@ -33,9 +33,9 @@ pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
|
||||
struct page *page;
|
||||
|
||||
#ifdef CONFIG_HIGHPTE
|
||||
page = alloc_pages(GFP_KERNEL|__GFP_HIGHMEM|__GFP_REPEAT, 0);
|
||||
page = alloc_pages(GFP_KERNEL|__GFP_HIGHMEM, 0);
|
||||
#else
|
||||
page = alloc_pages(GFP_KERNEL|__GFP_REPEAT, 0);
|
||||
page = alloc_pages(GFP_KERNEL, 0);
|
||||
#endif
|
||||
if (!page)
|
||||
return NULL;
|
||||
|
@ -64,7 +64,7 @@ static inline struct page *pte_alloc_one(struct mm_struct *mm,
|
||||
{
|
||||
struct page *pte;
|
||||
|
||||
pte = alloc_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO);
|
||||
pte = alloc_page(GFP_KERNEL | __GFP_ZERO);
|
||||
if (!pte)
|
||||
return NULL;
|
||||
if (!pgtable_page_ctor(pte)) {
|
||||
@ -78,7 +78,7 @@ static inline struct page *pte_alloc_one(struct mm_struct *mm,
|
||||
static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
|
||||
unsigned long address)
|
||||
{
|
||||
gfp_t flags = GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO;
|
||||
gfp_t flags = GFP_KERNEL | __GFP_ZERO;
|
||||
return (pte_t *) __get_free_page(flags);
|
||||
}
|
||||
|
||||
|
@ -45,7 +45,7 @@ config IA64
|
||||
select GENERIC_SMP_IDLE_THREAD
|
||||
select ARCH_INIT_TASK
|
||||
select ARCH_TASK_STRUCT_ALLOCATOR
|
||||
select ARCH_THREAD_INFO_ALLOCATOR
|
||||
select ARCH_THREAD_STACK_ALLOCATOR
|
||||
select ARCH_CLOCKSOURCE_DATA
|
||||
select GENERIC_TIME_VSYSCALL_OLD
|
||||
select SYSCTL_ARCH_UNALIGN_NO_WARN
|
||||
|
@ -48,15 +48,15 @@ struct thread_info {
|
||||
#ifndef ASM_OFFSETS_C
|
||||
/* how to get the thread information struct from C */
|
||||
#define current_thread_info() ((struct thread_info *) ((char *) current + IA64_TASK_SIZE))
|
||||
#define alloc_thread_info_node(tsk, node) \
|
||||
((struct thread_info *) ((char *) (tsk) + IA64_TASK_SIZE))
|
||||
#define alloc_thread_stack_node(tsk, node) \
|
||||
((unsigned long *) ((char *) (tsk) + IA64_TASK_SIZE))
|
||||
#define task_thread_info(tsk) ((struct thread_info *) ((char *) (tsk) + IA64_TASK_SIZE))
|
||||
#else
|
||||
#define current_thread_info() ((struct thread_info *) 0)
|
||||
#define alloc_thread_info_node(tsk, node) ((struct thread_info *) 0)
|
||||
#define alloc_thread_stack_node(tsk, node) ((unsigned long *) 0)
|
||||
#define task_thread_info(tsk) ((struct thread_info *) 0)
|
||||
#endif
|
||||
#define free_thread_info(ti) /* nothing */
|
||||
#define free_thread_stack(ti) /* nothing */
|
||||
#define task_stack_page(tsk) ((void *)(tsk))
|
||||
|
||||
#define __HAVE_THREAD_FUNCTIONS
|
||||
|
@ -26,6 +26,7 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
|
||||
* handled. This is done by having a special ".data..init_task" section...
|
||||
*/
|
||||
#define init_thread_info init_task_mem.s.thread_info
|
||||
#define init_stack init_task_mem.stack
|
||||
|
||||
union {
|
||||
struct {
|
||||
|
@ -14,7 +14,7 @@ extern const char bad_pmd_string[];
|
||||
extern inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
|
||||
unsigned long address)
|
||||
{
|
||||
unsigned long page = __get_free_page(GFP_DMA|__GFP_REPEAT);
|
||||
unsigned long page = __get_free_page(GFP_DMA);
|
||||
|
||||
if (!page)
|
||||
return NULL;
|
||||
@ -51,7 +51,7 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t page,
|
||||
static inline struct page *pte_alloc_one(struct mm_struct *mm,
|
||||
unsigned long address)
|
||||
{
|
||||
struct page *page = alloc_pages(GFP_DMA|__GFP_REPEAT, 0);
|
||||
struct page *page = alloc_pages(GFP_DMA, 0);
|
||||
pte_t *pte;
|
||||
|
||||
if (!page)
|
||||
|
@ -11,7 +11,7 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long ad
|
||||
{
|
||||
pte_t *pte;
|
||||
|
||||
pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
|
||||
pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
|
||||
if (pte) {
|
||||
__flush_page_to_ram(pte);
|
||||
flush_tlb_kernel_page(pte);
|
||||
@ -32,7 +32,7 @@ static inline pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addres
|
||||
struct page *page;
|
||||
pte_t *pte;
|
||||
|
||||
page = alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, 0);
|
||||
page = alloc_pages(GFP_KERNEL|__GFP_ZERO, 0);
|
||||
if(!page)
|
||||
return NULL;
|
||||
if (!pgtable_page_ctor(page)) {
|
||||
|
@ -37,7 +37,7 @@ do { \
|
||||
static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
|
||||
unsigned long address)
|
||||
{
|
||||
unsigned long page = __get_free_page(GFP_KERNEL|__GFP_REPEAT);
|
||||
unsigned long page = __get_free_page(GFP_KERNEL);
|
||||
|
||||
if (!page)
|
||||
return NULL;
|
||||
@ -49,7 +49,7 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
|
||||
static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
|
||||
unsigned long address)
|
||||
{
|
||||
struct page *page = alloc_pages(GFP_KERNEL|__GFP_REPEAT, 0);
|
||||
struct page *page = alloc_pages(GFP_KERNEL, 0);
|
||||
|
||||
if (page == NULL)
|
||||
return NULL;
|
||||
|
@ -42,8 +42,7 @@ static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
|
||||
static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
|
||||
unsigned long address)
|
||||
{
|
||||
pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL | __GFP_REPEAT |
|
||||
__GFP_ZERO);
|
||||
pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
|
||||
return pte;
|
||||
}
|
||||
|
||||
@ -51,7 +50,7 @@ static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
|
||||
unsigned long address)
|
||||
{
|
||||
struct page *pte;
|
||||
pte = alloc_pages(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO, 0);
|
||||
pte = alloc_pages(GFP_KERNEL | __GFP_ZERO, 0);
|
||||
if (!pte)
|
||||
return NULL;
|
||||
if (!pgtable_page_ctor(pte)) {
|
||||
|
@ -116,9 +116,9 @@ static inline struct page *pte_alloc_one(struct mm_struct *mm,
|
||||
struct page *ptepage;
|
||||
|
||||
#ifdef CONFIG_HIGHPTE
|
||||
int flags = GFP_KERNEL | __GFP_HIGHMEM | __GFP_REPEAT;
|
||||
int flags = GFP_KERNEL | __GFP_HIGHMEM;
|
||||
#else
|
||||
int flags = GFP_KERNEL | __GFP_REPEAT;
|
||||
int flags = GFP_KERNEL;
|
||||
#endif
|
||||
|
||||
ptepage = alloc_pages(flags, 0);
|
||||
|
@ -239,8 +239,7 @@ __init_refok pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
|
||||
{
|
||||
pte_t *pte;
|
||||
if (mem_init_done) {
|
||||
pte = (pte_t *)__get_free_page(GFP_KERNEL |
|
||||
__GFP_REPEAT | __GFP_ZERO);
|
||||
pte = (pte_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
|
||||
} else {
|
||||
pte = (pte_t *)early_get_page();
|
||||
if (pte)
|
||||
|
@ -74,7 +74,7 @@
|
||||
#define KVM_GUEST_KUSEG 0x00000000UL
|
||||
#define KVM_GUEST_KSEG0 0x40000000UL
|
||||
#define KVM_GUEST_KSEG23 0x60000000UL
|
||||
#define KVM_GUEST_KSEGX(a) ((_ACAST32_(a)) & 0x60000000)
|
||||
#define KVM_GUEST_KSEGX(a) ((_ACAST32_(a)) & 0xe0000000)
|
||||
#define KVM_GUEST_CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff)
|
||||
|
||||
#define KVM_GUEST_CKSEG0ADDR(a) (KVM_GUEST_CPHYSADDR(a) | KVM_GUEST_KSEG0)
|
||||
@ -338,6 +338,7 @@ struct kvm_mips_tlb {
|
||||
#define KVM_MIPS_GUEST_TLB_SIZE 64
|
||||
struct kvm_vcpu_arch {
|
||||
void *host_ebase, *guest_ebase;
|
||||
int (*vcpu_run)(struct kvm_run *run, struct kvm_vcpu *vcpu);
|
||||
unsigned long host_stack;
|
||||
unsigned long host_gp;
|
||||
|
||||
|
@ -69,7 +69,7 @@ static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
|
||||
{
|
||||
pte_t *pte;
|
||||
|
||||
pte = (pte_t *) __get_free_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, PTE_ORDER);
|
||||
pte = (pte_t *) __get_free_pages(GFP_KERNEL|__GFP_ZERO, PTE_ORDER);
|
||||
|
||||
return pte;
|
||||
}
|
||||
@ -79,7 +79,7 @@ static inline struct page *pte_alloc_one(struct mm_struct *mm,
|
||||
{
|
||||
struct page *pte;
|
||||
|
||||
pte = alloc_pages(GFP_KERNEL | __GFP_REPEAT, PTE_ORDER);
|
||||
pte = alloc_pages(GFP_KERNEL, PTE_ORDER);
|
||||
if (!pte)
|
||||
return NULL;
|
||||
clear_highpage(pte);
|
||||
@ -113,7 +113,7 @@ static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
|
||||
{
|
||||
pmd_t *pmd;
|
||||
|
||||
pmd = (pmd_t *) __get_free_pages(GFP_KERNEL|__GFP_REPEAT, PMD_ORDER);
|
||||
pmd = (pmd_t *) __get_free_pages(GFP_KERNEL, PMD_ORDER);
|
||||
if (pmd)
|
||||
pmd_init((unsigned long)pmd, (unsigned long)invalid_pte_table);
|
||||
return pmd;
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user