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PCI: imx6: Add code to request/control "pcie_aux" clock for i.MX8MQ
The PCIe IP block has an additional clock, "pcie_aux", that needs to be controlled by the driver. Add code to support it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Leonard Crestez <leonard.crestez@nxp.com> Cc: "A.s. Dong" <aisheng.dong@nxp.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org
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@ -66,6 +66,7 @@ struct imx6_pcie {
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struct clk *pcie_phy;
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struct clk *pcie_inbound_axi;
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struct clk *pcie;
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struct clk *pcie_aux;
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struct regmap *iomuxc_gpr;
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u32 controller_id;
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struct reset_control *pciephy_reset;
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@ -459,6 +460,12 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
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case IMX7D:
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break;
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case IMX8MQ:
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ret = clk_prepare_enable(imx6_pcie->pcie_aux);
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if (ret) {
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dev_err(dev, "unable to enable pcie_aux clock\n");
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break;
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}
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offset = imx6_pcie_grp_offset(imx6_pcie);
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/*
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* Set the over ride low and enabled
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@ -976,6 +983,9 @@ static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
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IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,
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IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
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break;
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case IMX8MQ:
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clk_disable_unprepare(imx6_pcie->pcie_aux);
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break;
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default:
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break;
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}
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@ -1121,8 +1131,14 @@ static int imx6_pcie_probe(struct platform_device *pdev)
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return PTR_ERR(imx6_pcie->pcie_inbound_axi);
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}
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break;
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case IMX7D:
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case IMX8MQ:
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imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux");
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if (IS_ERR(imx6_pcie->pcie_aux)) {
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dev_err(dev, "pcie_aux clock source missing or invalid\n");
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return PTR_ERR(imx6_pcie->pcie_aux);
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}
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/* fall through */
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case IMX7D:
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if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR)
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imx6_pcie->controller_id = 1;
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