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ARM: imx: change the way imx-uarts are registered
For mx1_defconfig this yields: add/remove: 1/0 grow/shrink: 1/4 up/down: 49/-108 (-59) function old new delta imx1_imx_uart_data - 48 +48 kernel_config_data 7277 7278 +1 imx_add_imx_uart_1irq 132 128 -4 imx_add_imx_uart_3irq 164 156 -8 scb9328_init 96 64 -32 mx1ads_init 220 156 -64 for mx21_defconfig this yields: add/remove: 1/0 grow/shrink: 0/3 up/down: 64/-52 (12) function old new delta imx21_imx_uart_data - 64 +64 imx_add_imx_uart_3irq 160 156 -4 imx_add_imx_uart_1irq 140 136 -4 mx21ads_board_init 220 176 -44 for a random mx25 config this yields: add/remove: 1/0 grow/shrink: 0/5 up/down: 80/-56 (24) function old new delta imx25_imx_uart_data - 80 +80 imx_add_imx_uart_3irq 160 156 -4 imx_add_imx_uart_1irq 140 136 -4 mx25pdk_init 288 272 -16 eukrea_mbimxsd_baseboard_init 272 256 -16 eukrea_cpuimx25_init 252 236 -16 for mx27_defconfig this yields: add/remove: 1/0 grow/shrink: 0/10 up/down: 96/-280 (-184) function old new delta imx27_imx_uart_data - 96 +96 imx_add_imx_uart_3irq 160 156 -4 imx_add_imx_uart_1irq 140 136 -4 pca100_init 560 544 -16 mx27pdk_init 112 96 -16 mx27lite_init 92 76 -16 eukrea_cpuimx27_init 332 316 -16 pcm038_init 388 348 -40 mxt_td60_board_init 320 280 -40 eukrea_mbimx27_baseboard_init 476 436 -40 mx27ads_board_init 368 280 -88 and finally for mx3_defconfig: add/remove: 2/0 grow/shrink: 0/9 up/down: 128/-344 (-216) function old new delta imx31_imx_uart_data - 80 +80 imx35_imx_uart_data - 48 +48 imx_add_imx_uart_1irq 132 128 -4 imx_add_imx_uart_3irq 164 152 -12 mx31moboard_devboard_init 360 344 -16 mx31lite_db_init 176 160 -16 mx31moboard_smartbot_init 384 360 -24 kzm_board_init 232 208 -24 armadillo5x0_init 392 364 -28 mx31lilly_db_init 248 208 -40 mxc_board_init 3760 3580 -180 Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
This commit is contained in:
parent
35bab0589b
commit
5162de08d1
@ -12,7 +12,8 @@
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#define imx1_add_i2c_imx(pdata) \
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imx_add_imx_i2c(0, MX1_I2C_BASE_ADDR, SZ_4K, MX1_INT_I2C, pdata)
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#define imx1_add_imx_uart0(pdata) \
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imx_add_imx_uart_3irq(0, MX1_UART1_BASE_ADDR, 0xd0, MX1_INT_UART1RX, MX1_INT_UART1TX, MX1_INT_UART1RTS, pdata)
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#define imx1_add_imx_uart1(pdata) \
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imx_add_imx_uart_3irq(0, MX1_UART2_BASE_ADDR, 0xd0, MX1_INT_UART2RX, MX1_INT_UART2TX, MX1_INT_UART2RTS, pdata)
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extern const struct imx_imx_uart_3irq_data imx1_imx_uart_data[] __initconst;
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#define imx1_add_imx_uart(id, pdata) \
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imx_add_imx_uart_3irq(&imx1_imx_uart_data[id], pdata)
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#define imx1_add_imx_uart0(pdata) imx1_add_imx_uart(0, pdata)
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#define imx1_add_imx_uart1(pdata) imx1_add_imx_uart(1, pdata)
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@ -12,14 +12,13 @@
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#define imx21_add_i2c_imx(pdata) \
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imx_add_imx_i2c(0, MX2x_I2C_BASE_ADDR, SZ_4K, MX2x_INT_I2C, pdata)
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#define imx21_add_imx_uart0(pdata) \
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imx_add_imx_uart_1irq(0, MX21_UART1_BASE_ADDR, SZ_4K, MX21_INT_UART1, pdata)
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#define imx21_add_imx_uart1(pdata) \
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imx_add_imx_uart_1irq(1, MX21_UART2_BASE_ADDR, SZ_4K, MX21_INT_UART2, pdata)
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#define imx21_add_imx_uart2(pdata) \
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imx_add_imx_uart_1irq(2, MX21_UART3_BASE_ADDR, SZ_4K, MX21_INT_UART3, pdata)
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#define imx21_add_imx_uart3(pdata) \
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imx_add_imx_uart_1irq(3, MX21_UART4_BASE_ADDR, SZ_4K, MX21_INT_UART4, pdata)
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extern const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst;
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#define imx21_add_imx_uart(id, pdata) \
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imx_add_imx_uart_1irq(&imx21_imx_uart_data[id], pdata)
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#define imx21_add_imx_uart0(pdata) imx21_add_imx_uart(0, pdata)
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#define imx21_add_imx_uart1(pdata) imx21_add_imx_uart(1, pdata)
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#define imx21_add_imx_uart2(pdata) imx21_add_imx_uart(2, pdata)
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#define imx21_add_imx_uart3(pdata) imx21_add_imx_uart(3, pdata)
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#define imx21_add_mxc_nand(pdata) \
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imx_add_mxc_nand_v1(MX21_NFC_BASE_ADDR, MX21_INT_NANDFC, pdata)
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@ -14,18 +14,15 @@
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#define imx27_add_i2c_imx1(pdata) \
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imx_add_imx_i2c(1, MX27_I2C2_BASE_ADDR, SZ_4K, MX27_INT_I2C2, pdata)
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#define imx27_add_imx_uart0(pdata) \
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imx_add_imx_uart_1irq(0, MX27_UART1_BASE_ADDR, SZ_4K, MX27_INT_UART1, pdata)
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#define imx27_add_imx_uart1(pdata) \
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imx_add_imx_uart_1irq(1, MX27_UART2_BASE_ADDR, SZ_4K, MX27_INT_UART2, pdata)
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#define imx27_add_imx_uart2(pdata) \
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imx_add_imx_uart_1irq(2, MX27_UART3_BASE_ADDR, SZ_4K, MX27_INT_UART3, pdata)
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#define imx27_add_imx_uart3(pdata) \
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imx_add_imx_uart_1irq(3, MX27_UART4_BASE_ADDR, SZ_4K, MX27_INT_UART4, pdata)
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#define imx27_add_imx_uart4(pdata) \
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imx_add_imx_uart_1irq(4, MX27_UART5_BASE_ADDR, SZ_4K, MX27_INT_UART5, pdata)
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#define imx27_add_imx_uart5(pdata) \
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imx_add_imx_uart_1irq(5, MX27_UART6_BASE_ADDR, SZ_4K, MX27_INT_UART6, pdata)
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extern const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst;
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#define imx27_add_imx_uart(id, pdata) \
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imx_add_imx_uart_1irq(&imx27_imx_uart_data[id], pdata)
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#define imx27_add_imx_uart0(pdata) imx27_add_imx_uart(0, pdata)
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#define imx27_add_imx_uart1(pdata) imx27_add_imx_uart(1, pdata)
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#define imx27_add_imx_uart2(pdata) imx27_add_imx_uart(2, pdata)
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#define imx27_add_imx_uart3(pdata) imx27_add_imx_uart(3, pdata)
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#define imx27_add_imx_uart4(pdata) imx27_add_imx_uart(4, pdata)
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#define imx27_add_imx_uart5(pdata) imx27_add_imx_uart(5, pdata)
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#define imx27_add_mxc_nand(pdata) \
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imx_add_mxc_nand_v1(MX27_NFC_BASE_ADDR, MX27_INT_NANDFC, pdata)
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@ -21,16 +21,14 @@
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#define imx25_add_imx_i2c2(pdata) \
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imx_add_imx_i2c(2, MX25_I2C3_BASE_ADDR, SZ_16K, MX25_INT_I2C3, pdata)
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#define imx25_add_imx_uart0(pdata) \
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imx_add_imx_uart_1irq(0, MX25_UART1_BASE_ADDR, SZ_16K, MX25_INT_UART1, pdata)
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#define imx25_add_imx_uart1(pdata) \
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imx_add_imx_uart_1irq(1, MX25_UART2_BASE_ADDR, SZ_16K, MX25_INT_UART2, pdata)
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#define imx25_add_imx_uart2(pdata) \
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imx_add_imx_uart_1irq(2, MX25_UART3_BASE_ADDR, SZ_16K, MX25_INT_UART3, pdata)
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#define imx25_add_imx_uart3(pdata) \
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imx_add_imx_uart_1irq(3, MX25_UART4_BASE_ADDR, SZ_16K, MX25_INT_UART4, pdata)
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#define imx25_add_imx_uart4(pdata) \
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imx_add_imx_uart_1irq(4, MX25_UART5_BASE_ADDR, SZ_16K, MX25_INT_UART5, pdata)
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extern const struct imx_imx_uart_1irq_data imx25_imx_uart_data[] __initconst;
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#define imx25_add_imx_uart(id, pdata) \
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imx_add_imx_uart_1irq(&imx25_imx_uart_data[id], pdata)
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#define imx25_add_imx_uart0(pdata) imx25_add_imx_uart(0, pdata)
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#define imx25_add_imx_uart1(pdata) imx25_add_imx_uart(1, pdata)
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#define imx25_add_imx_uart2(pdata) imx25_add_imx_uart(2, pdata)
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#define imx25_add_imx_uart3(pdata) imx25_add_imx_uart(3, pdata)
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#define imx25_add_imx_uart4(pdata) imx25_add_imx_uart(4, pdata)
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#define imx25_add_mxc_nand(pdata) \
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imx_add_mxc_nand_v21(MX25_NFC_BASE_ADDR, MX25_INT_NANDFC, pdata)
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@ -16,16 +16,14 @@
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#define imx31_add_imx_i2c2(pdata) \
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imx_add_imx_i2c(2, MX31_I2C3_BASE_ADDR, SZ_4K, MX31_INT_I2C3, pdata)
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#define imx31_add_imx_uart0(pdata) \
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imx_add_imx_uart_1irq(0, MX31_UART1_BASE_ADDR, SZ_16K, MX31_INT_UART1, pdata)
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#define imx31_add_imx_uart1(pdata) \
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imx_add_imx_uart_1irq(1, MX31_UART2_BASE_ADDR, SZ_16K, MX31_INT_UART2, pdata)
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#define imx31_add_imx_uart2(pdata) \
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imx_add_imx_uart_1irq(2, MX31_UART3_BASE_ADDR, SZ_16K, MX31_INT_UART3, pdata)
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#define imx31_add_imx_uart3(pdata) \
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imx_add_imx_uart_1irq(3, MX31_UART4_BASE_ADDR, SZ_16K, MX31_INT_UART4, pdata)
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#define imx31_add_imx_uart4(pdata) \
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imx_add_imx_uart_1irq(4, MX31_UART5_BASE_ADDR, SZ_16K, MX31_INT_UART5, pdata)
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extern const struct imx_imx_uart_1irq_data imx31_imx_uart_data[] __initconst;
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#define imx31_add_imx_uart(id, pdata) \
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imx_add_imx_uart_1irq(&imx31_imx_uart_data[id], pdata)
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#define imx31_add_imx_uart0(pdata) imx31_add_imx_uart(0, pdata)
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#define imx31_add_imx_uart1(pdata) imx31_add_imx_uart(1, pdata)
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#define imx31_add_imx_uart2(pdata) imx31_add_imx_uart(2, pdata)
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#define imx31_add_imx_uart3(pdata) imx31_add_imx_uart(3, pdata)
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#define imx31_add_imx_uart4(pdata) imx31_add_imx_uart(4, pdata)
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#define imx31_add_mxc_nand(pdata) \
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imx_add_mxc_nand_v1(MX31_NFC_BASE_ADDR, MX31_INT_NANDFC, pdata)
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@ -21,12 +21,12 @@
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#define imx35_add_imx_i2c2(pdata) \
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imx_add_imx_i2c(2, MX35_I2C3_BASE_ADDR, SZ_4K, MX35_INT_I2C3, pdata)
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#define imx35_add_imx_uart0(pdata) \
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imx_add_imx_uart_1irq(0, MX35_UART1_BASE_ADDR, SZ_16K, MX35_INT_UART1, pdata)
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#define imx35_add_imx_uart1(pdata) \
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imx_add_imx_uart_1irq(1, MX35_UART2_BASE_ADDR, SZ_16K, MX35_INT_UART2, pdata)
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#define imx35_add_imx_uart2(pdata) \
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imx_add_imx_uart_1irq(2, MX35_UART3_BASE_ADDR, SZ_16K, MX35_INT_UART3, pdata)
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extern const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst;
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#define imx35_add_imx_uart(id, pdata) \
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imx_add_imx_uart_1irq(&imx35_imx_uart_data[id], pdata)
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#define imx35_add_imx_uart0(pdata) imx35_add_imx_uart(0, pdata)
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#define imx35_add_imx_uart1(pdata) imx35_add_imx_uart(1, pdata)
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#define imx35_add_imx_uart2(pdata) imx35_add_imx_uart(2, pdata)
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#define imx35_add_mxc_nand(pdata) \
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imx_add_mxc_nand_v21(MX35_NFC_BASE_ADDR, MX35_INT_NANDFC, pdata)
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@ -6,55 +6,138 @@
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* the terms of the GNU General Public License version 2 as published by the
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* Free Software Foundation.
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*/
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#include <mach/hardware.h>
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#include <mach/devices-common.h>
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struct platform_device *__init imx_add_imx_uart_3irq(int id,
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resource_size_t iobase, resource_size_t iosize,
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resource_size_t irqrx, resource_size_t irqtx,
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resource_size_t irqrts,
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#define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \
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[_id] = { \
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.id = _id, \
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.iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \
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.iosize = _size, \
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.irqrx = soc ## _INT_UART ## _hwid ## RX, \
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.irqtx = soc ## _INT_UART ## _hwid ## TX, \
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.irqrts = soc ## _INT_UART ## _hwid ## RTS, \
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}
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#define imx_imx_uart_1irq_data_entry(soc, _id, _hwid, _size) \
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[_id] = { \
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.id = _id, \
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.iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \
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.iosize = _size, \
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.irq = soc ## _INT_UART ## _hwid, \
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}
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#ifdef CONFIG_SOC_IMX1
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const struct imx_imx_uart_3irq_data imx1_imx_uart_data[] __initconst = {
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#define imx1_imx_uart_data_entry(_id, _hwid) \
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imx_imx_uart_3irq_data_entry(MX1, _id, _hwid, 0xd0)
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imx1_imx_uart_data_entry(0, 1),
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imx1_imx_uart_data_entry(1, 2),
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};
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#endif /* ifdef CONFIG_SOC_IMX1 */
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#ifdef CONFIG_SOC_IMX21
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const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst = {
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#define imx21_imx_uart_data_entry(_id, _hwid) \
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imx_imx_uart_1irq_data_entry(MX21, _id, _hwid, SZ_4K)
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imx21_imx_uart_data_entry(0, 1),
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imx21_imx_uart_data_entry(1, 2),
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imx21_imx_uart_data_entry(2, 3),
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imx21_imx_uart_data_entry(3, 4),
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};
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#endif
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#ifdef CONFIG_ARCH_MX25
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const struct imx_imx_uart_1irq_data imx25_imx_uart_data[] __initconst = {
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#define imx25_imx_uart_data_entry(_id, _hwid) \
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imx_imx_uart_1irq_data_entry(MX25, _id, _hwid, SZ_16K)
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imx25_imx_uart_data_entry(0, 1),
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imx25_imx_uart_data_entry(1, 2),
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imx25_imx_uart_data_entry(2, 3),
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imx25_imx_uart_data_entry(3, 4),
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imx25_imx_uart_data_entry(4, 5),
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};
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#endif /* ifdef CONFIG_ARCH_MX25 */
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#ifdef CONFIG_SOC_IMX27
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const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst = {
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#define imx27_imx_uart_data_entry(_id, _hwid) \
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imx_imx_uart_1irq_data_entry(MX27, _id, _hwid, SZ_4K)
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imx27_imx_uart_data_entry(0, 1),
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imx27_imx_uart_data_entry(1, 2),
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imx27_imx_uart_data_entry(2, 3),
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imx27_imx_uart_data_entry(3, 4),
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imx27_imx_uart_data_entry(4, 5),
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imx27_imx_uart_data_entry(5, 6),
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};
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#endif /* ifdef CONFIG_SOC_IMX27 */
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#ifdef CONFIG_ARCH_MX31
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const struct imx_imx_uart_1irq_data imx31_imx_uart_data[] __initconst = {
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#define imx31_imx_uart_data_entry(_id, _hwid) \
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imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_4K)
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imx31_imx_uart_data_entry(0, 1),
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imx31_imx_uart_data_entry(1, 2),
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imx31_imx_uart_data_entry(2, 3),
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imx31_imx_uart_data_entry(3, 4),
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imx31_imx_uart_data_entry(4, 5),
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};
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#endif /* ifdef CONFIG_ARCH_MX31 */
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#ifdef CONFIG_ARCH_MX35
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const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst = {
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#define imx35_imx_uart_data_entry(_id, _hwid) \
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imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_16K)
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imx35_imx_uart_data_entry(0, 1),
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imx35_imx_uart_data_entry(1, 2),
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imx35_imx_uart_data_entry(2, 3),
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};
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#endif /* ifdef CONFIG_ARCH_MX35 */
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struct platform_device *__init imx_add_imx_uart_3irq(
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const struct imx_imx_uart_3irq_data *data,
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const struct imxuart_platform_data *pdata)
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{
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struct resource res[] = {
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{
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.start = iobase,
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.end = iobase + iosize - 1,
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.start = data->iobase,
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.end = data->iobase + data->iosize - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = irqrx,
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.end = irqrx,
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.start = data->irqrx,
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.end = data->irqrx,
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.flags = IORESOURCE_IRQ,
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}, {
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.start = irqtx,
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.end = irqtx,
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.start = data->irqtx,
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.end = data->irqtx,
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.flags = IORESOURCE_IRQ,
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}, {
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||||
.start = irqrts,
|
||||
.end = irqrx,
|
||||
.start = data->irqrts,
|
||||
.end = data->irqrx,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
return imx_add_platform_device("imx-uart", id, res, ARRAY_SIZE(res),
|
||||
pdata, sizeof(*pdata));
|
||||
return imx_add_platform_device("imx-uart", data->id, res,
|
||||
ARRAY_SIZE(res), pdata, sizeof(*pdata));
|
||||
}
|
||||
|
||||
struct platform_device *__init imx_add_imx_uart_1irq(int id,
|
||||
resource_size_t iobase, resource_size_t iosize,
|
||||
resource_size_t irq,
|
||||
struct platform_device *__init imx_add_imx_uart_1irq(
|
||||
const struct imx_imx_uart_1irq_data *data,
|
||||
const struct imxuart_platform_data *pdata)
|
||||
{
|
||||
struct resource res[] = {
|
||||
{
|
||||
.start = iobase,
|
||||
.end = iobase + iosize - 1,
|
||||
.start = data->iobase,
|
||||
.end = data->iobase + data->iosize - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}, {
|
||||
.start = irq,
|
||||
.end = irq,
|
||||
.start = data->irq,
|
||||
.end = data->irq,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
return imx_add_platform_device("imx-uart", id, res, ARRAY_SIZE(res),
|
||||
return imx_add_platform_device("imx-uart", data->id, res, ARRAY_SIZE(res),
|
||||
pdata, sizeof(*pdata));
|
||||
}
|
||||
|
@ -26,14 +26,26 @@ struct platform_device *__init imx_add_imx_i2c(int id,
|
||||
const struct imxi2c_platform_data *pdata);
|
||||
|
||||
#include <mach/imx-uart.h>
|
||||
struct platform_device *__init imx_add_imx_uart_3irq(int id,
|
||||
resource_size_t iobase, resource_size_t iosize,
|
||||
resource_size_t irqrx, resource_size_t irqtx,
|
||||
resource_size_t irqrts,
|
||||
struct imx_imx_uart_3irq_data {
|
||||
int id;
|
||||
resource_size_t iobase;
|
||||
resource_size_t iosize;
|
||||
resource_size_t irqrx;
|
||||
resource_size_t irqtx;
|
||||
resource_size_t irqrts;
|
||||
};
|
||||
struct platform_device *__init imx_add_imx_uart_3irq(
|
||||
const struct imx_imx_uart_3irq_data *data,
|
||||
const struct imxuart_platform_data *pdata);
|
||||
struct platform_device *__init imx_add_imx_uart_1irq(int id,
|
||||
resource_size_t iobase, resource_size_t iosize,
|
||||
resource_size_t irq,
|
||||
|
||||
struct imx_imx_uart_1irq_data {
|
||||
int id;
|
||||
resource_size_t iobase;
|
||||
resource_size_t iosize;
|
||||
resource_size_t irq;
|
||||
};
|
||||
struct platform_device *__init imx_add_imx_uart_1irq(
|
||||
const struct imx_imx_uart_1irq_data *data,
|
||||
const struct imxuart_platform_data *pdata);
|
||||
|
||||
#include <mach/mxc_nand.h>
|
||||
|
Loading…
Reference in New Issue
Block a user