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mmc: dt-bindings: update Mediatek MMC bindings
Add description for mediatek,hs200-cmd-int-delay Add description for mediatek,hs400-cmd-int-delay Add description for mediatek,hs400-cmd-resp-sel-rising Signed-off-by: Yong Mao <yong.mao@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -21,6 +21,15 @@ Optional properties:
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- assigned-clocks: PLL of the source clock
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- assigned-clock-parents: parent of source clock, used for HS400 mode to get 400Mhz source clock
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- hs400-ds-delay: HS400 DS delay setting
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- mediatek,hs200-cmd-int-delay: HS200 command internal delay setting.
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This field has total 32 stages.
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The value is an integer from 0 to 31.
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- mediatek,hs400-cmd-int-delay: HS400 command internal delay setting
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This field has total 32 stages.
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The value is an integer from 0 to 31.
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- mediatek,hs400-cmd-resp-sel-rising: HS400 command response sample selection
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If present,HS400 command responses are sampled on rising edges.
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If not present,HS400 command responses are sampled on falling edges.
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Examples:
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mmc0: mmc@11230000 {
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@ -38,4 +47,7 @@ mmc0: mmc@11230000 {
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assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
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assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
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hs400-ds-delay = <0x14015>;
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mediatek,hs200-cmd-int-delay = <26>;
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mediatek,hs400-cmd-int-delay = <14>;
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mediatek,hs400-cmd-resp-sel-rising;
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};
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