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ath9k: Initialize and configure tx status for EDMA
Also add a function to clean up tx status ring. Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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4adfcdedd4
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5088c2f1a2
@ -114,8 +114,10 @@ enum buffer_type {
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#define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY)
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#define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
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#define ATH_TXSTATUS_RING_SIZE 64
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struct ath_descdma {
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struct ath_desc *dd_desc;
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void *dd_desc;
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dma_addr_t dd_desc_paddr;
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u32 dd_desc_len;
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struct ath_buf *dd_bufptr;
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@ -515,6 +517,8 @@ struct ath_softc {
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struct ath_beacon_config cur_beacon_conf;
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struct delayed_work tx_complete_work;
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struct ath_btcoex btcoex;
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struct ath_descdma txsdma;
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};
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struct ath_wiphy {
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@ -2093,6 +2093,7 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
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pCap->rx_lp_qdepth = ATH9K_HW_RX_LP_QDEPTH;
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pCap->rx_status_len = sizeof(struct ar9003_rxs);
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pCap->tx_desc_len = sizeof(struct ar9003_txc);
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pCap->txs_len = sizeof(struct ar9003_txs);
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} else {
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pCap->tx_desc_len = sizeof(struct ath_desc);
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}
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@ -209,6 +209,7 @@ struct ath9k_hw_capabilities {
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u8 rx_lp_qdepth;
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u8 rx_status_len;
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u8 tx_desc_len;
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u8 txs_len;
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};
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struct ath9k_ops_config {
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@ -2144,6 +2144,41 @@ void ath_tx_tasklet(struct ath_softc *sc)
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/* Init, Cleanup */
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/*****************/
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static int ath_txstatus_setup(struct ath_softc *sc, int size)
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{
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struct ath_descdma *dd = &sc->txsdma;
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u8 txs_len = sc->sc_ah->caps.txs_len;
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dd->dd_desc_len = size * txs_len;
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dd->dd_desc = dma_alloc_coherent(sc->dev, dd->dd_desc_len,
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&dd->dd_desc_paddr, GFP_KERNEL);
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if (!dd->dd_desc)
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return -ENOMEM;
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return 0;
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}
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static int ath_tx_edma_init(struct ath_softc *sc)
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{
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int err;
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err = ath_txstatus_setup(sc, ATH_TXSTATUS_RING_SIZE);
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if (!err)
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ath9k_hw_setup_statusring(sc->sc_ah, sc->txsdma.dd_desc,
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sc->txsdma.dd_desc_paddr,
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ATH_TXSTATUS_RING_SIZE);
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return err;
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}
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static void ath_tx_edma_cleanup(struct ath_softc *sc)
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{
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struct ath_descdma *dd = &sc->txsdma;
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dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
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dd->dd_desc_paddr);
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}
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int ath_tx_init(struct ath_softc *sc, int nbufs)
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{
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struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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@ -2160,7 +2195,7 @@ int ath_tx_init(struct ath_softc *sc, int nbufs)
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}
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error = ath_descdma_setup(sc, &sc->beacon.bdma, &sc->beacon.bbuf,
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"beacon", ATH_BCBUF, 1, 0);
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"beacon", ATH_BCBUF, 1, 1);
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if (error != 0) {
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ath_print(common, ATH_DBG_FATAL,
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"Failed to allocate beacon descriptors: %d\n", error);
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@ -2169,6 +2204,12 @@ int ath_tx_init(struct ath_softc *sc, int nbufs)
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INIT_DELAYED_WORK(&sc->tx_complete_work, ath_tx_complete_poll_work);
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if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
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error = ath_tx_edma_init(sc);
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if (error)
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goto err;
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}
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err:
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if (error != 0)
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ath_tx_cleanup(sc);
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@ -2183,6 +2224,9 @@ void ath_tx_cleanup(struct ath_softc *sc)
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if (sc->tx.txdma.dd_desc_len != 0)
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ath_descdma_cleanup(sc, &sc->tx.txdma, &sc->tx.txbuf);
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if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
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ath_tx_edma_cleanup(sc);
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}
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void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an)
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