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drm/i915: there's no PIPESTAT on HAS_PCH_SPLIT platforms

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So don't read it when capturing the error state. This solves
"unclaimed register" messages on Haswell when we have a GPU hang.

V2: Check for HAS_PCH_SPLIT instead of Gen5+ because VLV still has
this register.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Paulo Zanoni 2013-03-22 14:24:16 -03:00 committed by Daniel Vetter
parent 80ca378b76
commit 4f3308b975
1 changed files with 3 additions and 2 deletions
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5
drivers/gpu/drm/i915/i915_irq.c
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@ -1387,8 +1387,9 @@ static void i915_capture_error_state(struct drm_device *dev)
else if (INTEL_INFO(dev)->gen == 6)
error->forcewake = I915_READ(FORCEWAKE);
for_each_pipe(pipe)
error->pipestat[pipe] = I915_READ(PIPESTAT(pipe));
if (!HAS_PCH_SPLIT(dev))
for_each_pipe(pipe)
error->pipestat[pipe] = I915_READ(PIPESTAT(pipe));
if (INTEL_INFO(dev)->gen >= 6) {
error->error = I915_READ(ERROR_GEN6);